Commit | Line | Data |
---|---|---|
b63128e8 TL |
1 | /* |
2 | * Helper module for board specific I2C bus registration | |
3 | * | |
4 | * Copyright (C) 2009 Nokia Corporation. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * version 2 as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, but | |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
18 | * 02110-1301 USA | |
19 | * | |
20 | */ | |
21 | ||
3a8761c0 | 22 | #include <linux/i2c-omap.h> |
70c494c3 | 23 | #include <mach/mux.h> |
e4c060db | 24 | #include "soc.h" |
b63128e8 | 25 | |
01480bad | 26 | #include <plat/i2c.h> |
3a8761c0 TL |
27 | |
28 | #define OMAP_I2C_SIZE 0x3f | |
29 | #define OMAP1_I2C_BASE 0xfffb3800 | |
30 | #define OMAP1_INT_I2C (32 + 4) | |
31 | ||
32 | static const char name[] = "omap_i2c"; | |
33 | ||
34 | static struct resource i2c_resources[2] = { | |
35 | }; | |
36 | ||
37 | static struct platform_device omap_i2c_devices[1] = { | |
38 | }; | |
39 | ||
40 | static void __init omap1_i2c_mux_pins(int bus_id) | |
b63128e8 | 41 | { |
bf92a407 CM |
42 | if (cpu_is_omap7xx()) { |
43 | omap_cfg_reg(I2C_7XX_SDA); | |
44 | omap_cfg_reg(I2C_7XX_SCL); | |
45 | } else { | |
46 | omap_cfg_reg(I2C_SDA); | |
47 | omap_cfg_reg(I2C_SCL); | |
48 | } | |
b63128e8 | 49 | } |
3a8761c0 TL |
50 | |
51 | int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata, | |
52 | int bus_id) | |
53 | { | |
54 | struct platform_device *pdev; | |
55 | struct resource *res; | |
56 | ||
c34f7c69 TL |
57 | if (bus_id > 1) |
58 | return -EINVAL; | |
59 | ||
3a8761c0 TL |
60 | omap1_i2c_mux_pins(bus_id); |
61 | ||
62 | pdev = &omap_i2c_devices[bus_id - 1]; | |
63 | pdev->id = bus_id; | |
64 | pdev->name = name; | |
65 | pdev->num_resources = ARRAY_SIZE(i2c_resources); | |
66 | res = i2c_resources; | |
67 | res[0].start = OMAP1_I2C_BASE; | |
68 | res[0].end = res[0].start + OMAP_I2C_SIZE; | |
69 | res[0].flags = IORESOURCE_MEM; | |
70 | res[1].start = OMAP1_INT_I2C; | |
71 | res[1].flags = IORESOURCE_IRQ; | |
72 | pdev->resource = res; | |
73 | ||
74 | /* all OMAP1 have IP version 1 register set */ | |
75 | pdata->rev = OMAP_I2C_IP_VERSION_1; | |
76 | ||
77 | /* all OMAP1 I2C are implemented like this */ | |
78 | pdata->flags = OMAP_I2C_FLAG_NO_FIFO | | |
79 | OMAP_I2C_FLAG_SIMPLE_CLOCK | | |
80 | OMAP_I2C_FLAG_16BIT_DATA_REG | | |
81 | OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK; | |
82 | ||
83 | /* how the cpu bus is wired up differs for 7xx only */ | |
84 | ||
85 | if (cpu_is_omap7xx()) | |
86 | pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1; | |
87 | else | |
88 | pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2; | |
89 | ||
90 | pdev->dev.platform_data = pdata; | |
91 | ||
92 | return platform_device_register(pdev); | |
93 | } | |
a6cf912c TL |
94 | |
95 | static int __init omap_i2c_cmdline(void) | |
96 | { | |
97 | return omap_register_i2c_bus_cmdline(); | |
98 | } | |
99 | subsys_initcall(omap_i2c_cmdline); |