[linux-2.6-block.git] / arch / arm / mach-omap1 / devices.c

/*
 * linux/arch/arm/mach-omap1/devices.c
 *
 * OMAP1 platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/dma-mapping.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>

#include <asm/mach/map.h>

#include <plat/tc.h>
#include <plat/board.h>
#include <plat/mux.h>
#include <plat/mmc.h>
#include <plat/omap7xx.h>

#include <mach/camera.h>
#include <mach/hardware.h>

#include "common.h"
#include "clock.h"

#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)

static struct platform_device omap_pcm = {
	.name	= "omap-pcm-audio",
	.id	= -1,
};

static void omap_init_audio(void)
{
	platform_device_register(&omap_pcm);
}

#else
static inline void omap_init_audio(void) {}
#endif

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)

#define	OMAP_RTC_BASE		0xfffb4800

static struct resource rtc_resources[] = {
	{
		.start		= OMAP_RTC_BASE,
		.end		= OMAP_RTC_BASE + 0x5f,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= INT_RTC_TIMER,
		.flags		= IORESOURCE_IRQ,
	},
	{
		.start		= INT_RTC_ALARM,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device omap_rtc_device = {
	.name           = "omap_rtc",
	.id             = -1,
	.num_resources	= ARRAY_SIZE(rtc_resources),
	.resource	= rtc_resources,
};

static void omap_init_rtc(void)
{
	(void) platform_device_register(&omap_rtc_device);
}
#else
static inline void omap_init_rtc(void) {}
#endif

static inline void omap_init_mbox(void) { }

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)

static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
			int controller_nr)
{
	if (controller_nr == 0) {
		if (cpu_is_omap7xx()) {
			omap_cfg_reg(MMC_7XX_CMD);
			omap_cfg_reg(MMC_7XX_CLK);
			omap_cfg_reg(MMC_7XX_DAT0);
		} else {
			omap_cfg_reg(MMC_CMD);
			omap_cfg_reg(MMC_CLK);
			omap_cfg_reg(MMC_DAT0);
		}

		if (cpu_is_omap1710()) {
			omap_cfg_reg(M15_1710_MMC_CLKI);
			omap_cfg_reg(P19_1710_MMC_CMDDIR);
			omap_cfg_reg(P20_1710_MMC_DATDIR0);
		}
		if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
			omap_cfg_reg(MMC_DAT1);
			/* NOTE: DAT2 can be on W10 (here) or M15 */
			if (!mmc_controller->slots[0].nomux)
				omap_cfg_reg(MMC_DAT2);
			omap_cfg_reg(MMC_DAT3);
		}
	}

	/* Block 2 is on newer chips, and has many pinout options */
	if (cpu_is_omap16xx() && controller_nr == 1) {
		if (!mmc_controller->slots[1].nomux) {
			omap_cfg_reg(Y8_1610_MMC2_CMD);
			omap_cfg_reg(Y10_1610_MMC2_CLK);
			omap_cfg_reg(R18_1610_MMC2_CLKIN);
			omap_cfg_reg(W8_1610_MMC2_DAT0);
			if (mmc_controller->slots[1].wires == 4) {
				omap_cfg_reg(V8_1610_MMC2_DAT1);
				omap_cfg_reg(W15_1610_MMC2_DAT2);
				omap_cfg_reg(R10_1610_MMC2_DAT3);
			}

			/* These are needed for the level shifter */
			omap_cfg_reg(V9_1610_MMC2_CMDDIR);
			omap_cfg_reg(V5_1610_MMC2_DATDIR0);
			omap_cfg_reg(W19_1610_MMC2_DATDIR1);
		}

		/* Feedback clock must be set on OMAP-1710 MMC2 */
		if (cpu_is_omap1710())
			omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
					MOD_CONF_CTRL_1);
	}
}

void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
			int nr_controllers)
{
	int i;

	for (i = 0; i < nr_controllers; i++) {
		unsigned long base, size;
		unsigned int irq = 0;

		if (!mmc_data[i])
			continue;

		omap1_mmc_mux(mmc_data[i], i);

		switch (i) {
		case 0:
			base = OMAP1_MMC1_BASE;
			irq = INT_MMC;
			break;
		case 1:
			if (!cpu_is_omap16xx())
				return;
			base = OMAP1_MMC2_BASE;
			irq = INT_1610_MMC2;
			break;
		default:
			continue;
		}
		size = OMAP1_MMC_SIZE;

		omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);
	};
}

#endif

/*-------------------------------------------------------------------------*/

/* OMAP7xx SPI support */
#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)

struct platform_device omap_spi1 = {
	.name           = "omap1_spi100k",
	.id             = 1,
};

struct platform_device omap_spi2 = {
	.name           = "omap1_spi100k",
	.id             = 2,
};

static void omap_init_spi100k(void)
{
	omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
	if (omap_spi1.dev.platform_data)
		platform_device_register(&omap_spi1);

	omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
	if (omap_spi2.dev.platform_data)
		platform_device_register(&omap_spi2);
}

#else
static inline void omap_init_spi100k(void)
{
}
#endif


#define OMAP1_CAMERA_BASE	0xfffb6800
#define OMAP1_CAMERA_IOSIZE	0x1c

static struct resource omap1_camera_resources[] = {
	[0] = {
		.start	= OMAP1_CAMERA_BASE,
		.end	= OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= INT_CAMERA,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);

static struct platform_device omap1_camera_device = {
	.name		= "omap1-camera",
	.id		= 0, /* This is used to put cameras on this interface */
	.dev		= {
		.dma_mask		= &omap1_camera_dma_mask,
		.coherent_dma_mask	= DMA_BIT_MASK(32),
	},
	.num_resources	= ARRAY_SIZE(omap1_camera_resources),
	.resource	= omap1_camera_resources,
};

void __init omap1_camera_init(void *info)
{
	struct platform_device *dev = &omap1_camera_device;
	int ret;

	dev->dev.platform_data = info;

	ret = platform_device_register(dev);
	if (ret)
		dev_err(&dev->dev, "unable to register device: %d\n", ret);
}


/*-------------------------------------------------------------------------*/

static inline void omap_init_sti(void) {}

/*
 * This gets called after board-specific INIT_MACHINE, and initializes most
 * on-chip peripherals accessible on this board (except for few like USB):
 *
 *  (a) Does any "standard config" pin muxing needed.  Board-specific
 *	code will have muxed GPIO pins and done "nonstandard" setup;
 *	that code could live in the boot loader.
 *  (b) Populating board-specific platform_data with the data drivers
 *	rely on to handle wiring variations.
 *  (c) Creating platform devices as meaningful on this board and
 *	with this kernel configuration.
 *
 * Claiming GPIOs, and setting their direction and initial values, is the
 * responsibility of the device drivers.  So is responding to probe().
 *
 * Board-specific knowledge like creating devices or pin setup is to be
 * kept out of drivers as much as possible.  In particular, pin setup
 * may be handled by the boot loader, and drivers should expect it will
 * normally have been done by the time they're probed.
 */
static int __init omap1_init_devices(void)
{
	if (!cpu_class_is_omap1())
		return -ENODEV;

	omap_sram_init();
	omap1_clk_late_init();

	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */

	omap_init_audio();
	omap_init_mbox();
	omap_init_rtc();
	omap_init_spi100k();
	omap_init_sti();

	return 0;
}
arch_initcall(omap1_init_devices);

#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)

static struct resource wdt_resources[] = {
	{
		.start		= 0xfffeb000,
		.end		= 0xfffeb07F,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_wdt_device = {
	.name	   = "omap_wdt",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

static int __init omap_init_wdt(void)
{
	if (!cpu_is_omap16xx())
		return -ENODEV;

	return platform_device_register(&omap_wdt_device);
}
subsys_initcall(omap_init_wdt);
#endif
Commit	Line	Data
7c38cf02 TL	1	/*
	2	* linux/arch/arm/mach-omap1/devices.c
	3	*
	4	* OMAP1 platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
1a96edd7	12	#include <linux/dma-mapping.h>
2f8163ba	13	#include <linux/gpio.h>
7c38cf02 TL	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
d052d1be	17	#include <linux/platform_device.h>
c5c4dce4	18	#include <linux/spi/spi.h>
7c38cf02	19
7c38cf02 TL	20	#include <asm/mach/map.h>
7c38cf02 TL	21
ce491cf8 TL	22	#include <plat/tc.h>
	23	#include <plat/board.h>
	24	#include <plat/mux.h>
ce491cf8	25	#include <plat/mmc.h>
c5c4dce4	26	#include <plat/omap7xx.h>
7c38cf02	27
2e3ee9f4 TL	28	#include <mach/camera.h>
	29	#include <mach/hardware.h>
	30
	31	#include "common.h"
e9b7086b TL	32	#include "clock.h"
e9b7086b TL	33
fcc76a85 TL	34	#if defined(CONFIG_SND_SOC) \|\| defined(CONFIG_SND_SOC_MODULE)
	35
	36	static struct platform_device omap_pcm = {
	37	.name = "omap-pcm-audio",
	38	.id = -1,
	39	};
	40
	41	static void omap_init_audio(void)
	42	{
	43	platform_device_register(&omap_pcm);
	44	}
	45
	46	#else
	47	static inline void omap_init_audio(void) {}
	48	#endif
	49
7c38cf02 TL	50	/-------------------------------------------------------------------------/
7c38cf02 TL	51
db68b189	52	#if defined(CONFIG_RTC_DRV_OMAP) \|\| defined(CONFIG_RTC_DRV_OMAP_MODULE)
7c38cf02 TL	53
	54	#define OMAP_RTC_BASE 0xfffb4800
	55
	56	static struct resource rtc_resources[] = {
	57	{
	58	.start = OMAP_RTC_BASE,
	59	.end = OMAP_RTC_BASE + 0x5f,
	60	.flags = IORESOURCE_MEM,
	61	},
	62	{
	63	.start = INT_RTC_TIMER,
	64	.flags = IORESOURCE_IRQ,
	65	},
	66	{
	67	.start = INT_RTC_ALARM,
	68	.flags = IORESOURCE_IRQ,
	69	},
	70	};
	71
	72	static struct platform_device omap_rtc_device = {
	73	.name = "omap_rtc",
	74	.id = -1,
7c38cf02 TL	75	.num_resources = ARRAY_SIZE(rtc_resources),
	76	.resource = rtc_resources,
	77	};
	78
	79	static void omap_init_rtc(void)
	80	{
	81	(void) platform_device_register(&omap_rtc_device);
	82	}
	83	#else
	84	static inline void omap_init_rtc(void) {}
	85	#endif
	86
c40fae95	87	static inline void omap_init_mbox(void) { }
c40fae95	88
d8874665 TL	89	/-------------------------------------------------------------------------/
	90
	91	#if defined(CONFIG_MMC_OMAP) \|\| defined(CONFIG_MMC_OMAP_MODULE)
	92
	93	static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
	94	int controller_nr)
	95	{
	96	if (controller_nr == 0) {
490a5665 CM	97	if (cpu_is_omap7xx()) {
	98	omap_cfg_reg(MMC_7XX_CMD);
	99	omap_cfg_reg(MMC_7XX_CLK);
	100	omap_cfg_reg(MMC_7XX_DAT0);
	101	} else {
	102	omap_cfg_reg(MMC_CMD);
	103	omap_cfg_reg(MMC_CLK);
	104	omap_cfg_reg(MMC_DAT0);
	105	}
	106
d8874665 TL	107	if (cpu_is_omap1710()) {
	108	omap_cfg_reg(M15_1710_MMC_CLKI);
	109	omap_cfg_reg(P19_1710_MMC_CMDDIR);
	110	omap_cfg_reg(P20_1710_MMC_DATDIR0);
	111	}
490a5665	112	if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
d8874665 TL	113	omap_cfg_reg(MMC_DAT1);
	114	/* NOTE: DAT2 can be on W10 (here) or M15 */
	115	if (!mmc_controller->slots[0].nomux)
	116	omap_cfg_reg(MMC_DAT2);
	117	omap_cfg_reg(MMC_DAT3);
	118	}
	119	}
	120
	121	/* Block 2 is on newer chips, and has many pinout options */
	122	if (cpu_is_omap16xx() && controller_nr == 1) {
	123	if (!mmc_controller->slots[1].nomux) {
	124	omap_cfg_reg(Y8_1610_MMC2_CMD);
	125	omap_cfg_reg(Y10_1610_MMC2_CLK);
	126	omap_cfg_reg(R18_1610_MMC2_CLKIN);
	127	omap_cfg_reg(W8_1610_MMC2_DAT0);
90c62bf0	128	if (mmc_controller->slots[1].wires == 4) {
d8874665 TL	129	omap_cfg_reg(V8_1610_MMC2_DAT1);
	130	omap_cfg_reg(W15_1610_MMC2_DAT2);
	131	omap_cfg_reg(R10_1610_MMC2_DAT3);
	132	}
	133
	134	/* These are needed for the level shifter */
	135	omap_cfg_reg(V9_1610_MMC2_CMDDIR);
	136	omap_cfg_reg(V5_1610_MMC2_DATDIR0);
	137	omap_cfg_reg(W19_1610_MMC2_DATDIR1);
	138	}
	139
	140	/* Feedback clock must be set on OMAP-1710 MMC2 */
	141	if (cpu_is_omap1710())
	142	omap_writel(omap_readl(MOD_CONF_CTRL_1) \| (1 << 24),
	143	MOD_CONF_CTRL_1);
	144	}
	145	}
	146
	147	void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
	148	int nr_controllers)
	149	{
	150	int i;
	151
	152	for (i = 0; i < nr_controllers; i++) {
	153	unsigned long base, size;
	154	unsigned int irq = 0;
	155
	156	if (!mmc_data[i])
	157	continue;
	158
	159	omap1_mmc_mux(mmc_data[i], i);
	160
	161	switch (i) {
	162	case 0:
	163	base = OMAP1_MMC1_BASE;
	164	irq = INT_MMC;
	165	break;
	166	case 1:
	167	if (!cpu_is_omap16xx())
	168	return;
	169	base = OMAP1_MMC2_BASE;
	170	irq = INT_1610_MMC2;
	171	break;
	172	default:
	173	continue;
	174	}
	175	size = OMAP1_MMC_SIZE;
	176
0dffb5c5	177	omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);
d8874665 TL	178	};
	179	}
	180
	181	#endif
	182
	183	/-------------------------------------------------------------------------/
	184
c5c4dce4 CM	185	/* OMAP7xx SPI support */
	186	#if defined(CONFIG_SPI_OMAP_100K) \|\| defined(CONFIG_SPI_OMAP_100K_MODULE)
	187
	188	struct platform_device omap_spi1 = {
	189	.name = "omap1_spi100k",
	190	.id = 1,
	191	};
	192
	193	struct platform_device omap_spi2 = {
	194	.name = "omap1_spi100k",
	195	.id = 2,
	196	};
	197
	198	static void omap_init_spi100k(void)
	199	{
	200	omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
	201	if (omap_spi1.dev.platform_data)
	202	platform_device_register(&omap_spi1);
	203
	204	omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
	205	if (omap_spi2.dev.platform_data)
	206	platform_device_register(&omap_spi2);
	207	}
	208
	209	#else
	210	static inline void omap_init_spi100k(void)
	211	{
	212	}
	213	#endif
	214
1a96edd7 JK	215
	216	#define OMAP1_CAMERA_BASE 0xfffb6800
	217	#define OMAP1_CAMERA_IOSIZE 0x1c
	218
	219	static struct resource omap1_camera_resources[] = {
	220	[0] = {
	221	.start = OMAP1_CAMERA_BASE,
	222	.end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
	223	.flags = IORESOURCE_MEM,
	224	},
	225	[1] = {
	226	.start = INT_CAMERA,
	227	.flags = IORESOURCE_IRQ,
	228	},
	229	};
	230
	231	static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
	232
	233	static struct platform_device omap1_camera_device = {
	234	.name = "omap1-camera",
	235	.id = 0, /* This is used to put cameras on this interface */
	236	.dev = {
	237	.dma_mask = &omap1_camera_dma_mask,
	238	.coherent_dma_mask = DMA_BIT_MASK(32),
	239	},
	240	.num_resources = ARRAY_SIZE(omap1_camera_resources),
	241	.resource = omap1_camera_resources,
	242	};
	243
	244	void __init omap1_camera_init(void *info)
	245	{
	246	struct platform_device *dev = &omap1_camera_device;
	247	int ret;
	248
	249	dev->dev.platform_data = info;
	250
	251	ret = platform_device_register(dev);
	252	if (ret)
	253	dev_err(&dev->dev, "unable to register device: %d\n", ret);
	254	}
	255
	256
c5c4dce4 CM	257	/-------------------------------------------------------------------------/
c5c4dce4 CM	258
9b6553cd	259	static inline void omap_init_sti(void) {}
7c38cf02	260
7c38cf02 TL	261	/*
	262	* This gets called after board-specific INIT_MACHINE, and initializes most
	263	* on-chip peripherals accessible on this board (except for few like USB):
	264	*
	265	* (a) Does any "standard config" pin muxing needed. Board-specific
	266	* code will have muxed GPIO pins and done "nonstandard" setup;
	267	* that code could live in the boot loader.
	268	* (b) Populating board-specific platform_data with the data drivers
	269	* rely on to handle wiring variations.
	270	* (c) Creating platform devices as meaningful on this board and
	271	* with this kernel configuration.
	272	*
	273	* Claiming GPIOs, and setting their direction and initial values, is the
	274	* responsibility of the device drivers. So is responding to probe().
	275	*
25985edc	276	* Board-specific knowledge like creating devices or pin setup is to be
7c38cf02 TL	277	* kept out of drivers as much as possible. In particular, pin setup
	278	* may be handled by the boot loader, and drivers should expect it will
	279	* normally have been done by the time they're probed.
	280	*/
3179a019	281	static int __init omap1_init_devices(void)
7c38cf02	282	{
7f9187c2 TL	283	if (!cpu_class_is_omap1())
	284	return -ENODEV;
	285
a66cb345	286	omap_sram_init();
e9b7086b	287	omap1_clk_late_init();
a66cb345	288
7c38cf02 TL	289	/* please keep these calls, and their implementations above,
	290	* in alphabetical order so they're easier to sort through.
	291	*/
c40fae95	292
fcc76a85	293	omap_init_audio();
c40fae95	294	omap_init_mbox();
7c38cf02	295	omap_init_rtc();
c5c4dce4	296	omap_init_spi100k();
9b6553cd	297	omap_init_sti();
7c38cf02 TL	298
	299	return 0;
	300	}
3179a019	301	arch_initcall(omap1_init_devices);
7c38cf02	302
f2ce6231 VC	303	#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)
	304
	305	static struct resource wdt_resources[] = {
	306	{
	307	.start = 0xfffeb000,
	308	.end = 0xfffeb07F,
	309	.flags = IORESOURCE_MEM,
	310	},
	311	};
	312
	313	static struct platform_device omap_wdt_device = {
	314	.name = "omap_wdt",
	315	.id = -1,
	316	.num_resources = ARRAY_SIZE(wdt_resources),
	317	.resource = wdt_resources,
	318	};
	319
	320	static int __init omap_init_wdt(void)
	321	{
	322	if (!cpu_is_omap16xx())
dfcccd3a	323	return -ENODEV;
f2ce6231	324
dfcccd3a	325	return platform_device_register(&omap_wdt_device);
f2ce6231 VC	326	}
	327	subsys_initcall(omap_init_wdt);
	328	#endif