Commit | Line | Data |
---|---|---|
7c38cf02 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap1/devices.c | |
3 | * | |
4 | * OMAP1 platform device setup/initialization | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/config.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
d052d1be | 16 | #include <linux/platform_device.h> |
7c38cf02 TL |
17 | |
18 | #include <asm/hardware.h> | |
19 | #include <asm/io.h> | |
20 | #include <asm/mach-types.h> | |
21 | #include <asm/mach/map.h> | |
22 | ||
23 | #include <asm/arch/tc.h> | |
24 | #include <asm/arch/board.h> | |
25 | #include <asm/arch/mux.h> | |
26 | #include <asm/arch/gpio.h> | |
27 | ||
28 | ||
29 | static void omap_nop_release(struct device *dev) | |
30 | { | |
31 | /* Nothing */ | |
32 | } | |
33 | ||
34 | /*-------------------------------------------------------------------------*/ | |
35 | ||
36 | #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) | |
37 | ||
38 | #define OMAP_I2C_BASE 0xfffb3800 | |
39 | ||
40 | static struct resource i2c_resources[] = { | |
41 | { | |
42 | .start = OMAP_I2C_BASE, | |
43 | .end = OMAP_I2C_BASE + 0x3f, | |
44 | .flags = IORESOURCE_MEM, | |
45 | }, | |
46 | { | |
47 | .start = INT_I2C, | |
48 | .flags = IORESOURCE_IRQ, | |
49 | }, | |
50 | }; | |
51 | ||
52 | /* DMA not used; works around erratum writing to non-empty i2c fifo */ | |
53 | ||
54 | static struct platform_device omap_i2c_device = { | |
55 | .name = "i2c_omap", | |
56 | .id = -1, | |
57 | .dev = { | |
58 | .release = omap_nop_release, | |
59 | }, | |
60 | .num_resources = ARRAY_SIZE(i2c_resources), | |
61 | .resource = i2c_resources, | |
62 | }; | |
63 | ||
64 | static void omap_init_i2c(void) | |
65 | { | |
66 | /* FIXME define and use a boot tag, in case of boards that | |
67 | * either don't wire up I2C, or chips that mux it differently... | |
68 | * it can include clocking and address info, maybe more. | |
69 | */ | |
70 | omap_cfg_reg(I2C_SCL); | |
71 | omap_cfg_reg(I2C_SDA); | |
72 | ||
73 | (void) platform_device_register(&omap_i2c_device); | |
74 | } | |
75 | #else | |
76 | static inline void omap_init_i2c(void) {} | |
77 | #endif | |
78 | ||
79 | /*-------------------------------------------------------------------------*/ | |
80 | ||
81 | #if defined(CONFIG_OMAP1610_IR) || defined(CONFIG_OMAP161O_IR_MODULE) | |
82 | ||
83 | static u64 irda_dmamask = 0xffffffff; | |
84 | ||
85 | static struct platform_device omap1610ir_device = { | |
86 | .name = "omap1610-ir", | |
87 | .id = -1, | |
88 | .dev = { | |
89 | .release = omap_nop_release, | |
90 | .dma_mask = &irda_dmamask, | |
91 | }, | |
92 | }; | |
93 | ||
94 | static void omap_init_irda(void) | |
95 | { | |
96 | /* FIXME define and use a boot tag, members something like: | |
97 | * u8 uart; // uart1, or uart3 | |
98 | * ... but driver only handles uart3 for now | |
99 | * s16 fir_sel; // gpio for SIR vs FIR | |
100 | * ... may prefer a callback for SIR/MIR/FIR mode select; | |
101 | * while h2 uses a GPIO, H3 uses a gpio expander | |
102 | */ | |
103 | if (machine_is_omap_h2() | |
104 | || machine_is_omap_h3()) | |
105 | (void) platform_device_register(&omap1610ir_device); | |
106 | } | |
107 | #else | |
108 | static inline void omap_init_irda(void) {} | |
109 | #endif | |
110 | ||
111 | /*-------------------------------------------------------------------------*/ | |
112 | ||
113 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) | |
114 | ||
115 | #define OMAP_MMC1_BASE 0xfffb7800 | |
116 | #define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */ | |
117 | ||
118 | static struct omap_mmc_conf mmc1_conf; | |
119 | ||
120 | static u64 mmc1_dmamask = 0xffffffff; | |
121 | ||
122 | static struct resource mmc1_resources[] = { | |
123 | { | |
124 | .start = IO_ADDRESS(OMAP_MMC1_BASE), | |
125 | .end = IO_ADDRESS(OMAP_MMC1_BASE) + 0x7f, | |
126 | .flags = IORESOURCE_MEM, | |
127 | }, | |
128 | { | |
129 | .start = INT_MMC, | |
130 | .flags = IORESOURCE_IRQ, | |
131 | }, | |
132 | }; | |
133 | ||
134 | static struct platform_device mmc_omap_device1 = { | |
135 | .name = "mmci-omap", | |
136 | .id = 1, | |
137 | .dev = { | |
138 | .release = omap_nop_release, | |
139 | .dma_mask = &mmc1_dmamask, | |
140 | .platform_data = &mmc1_conf, | |
141 | }, | |
142 | .num_resources = ARRAY_SIZE(mmc1_resources), | |
143 | .resource = mmc1_resources, | |
144 | }; | |
145 | ||
146 | #ifdef CONFIG_ARCH_OMAP16XX | |
147 | ||
148 | static struct omap_mmc_conf mmc2_conf; | |
149 | ||
150 | static u64 mmc2_dmamask = 0xffffffff; | |
151 | ||
152 | static struct resource mmc2_resources[] = { | |
153 | { | |
154 | .start = IO_ADDRESS(OMAP_MMC2_BASE), | |
155 | .end = IO_ADDRESS(OMAP_MMC2_BASE) + 0x7f, | |
156 | .flags = IORESOURCE_MEM, | |
157 | }, | |
158 | { | |
159 | .start = INT_1610_MMC2, | |
160 | .flags = IORESOURCE_IRQ, | |
161 | }, | |
162 | }; | |
163 | ||
164 | static struct platform_device mmc_omap_device2 = { | |
165 | .name = "mmci-omap", | |
166 | .id = 2, | |
167 | .dev = { | |
168 | .release = omap_nop_release, | |
169 | .dma_mask = &mmc2_dmamask, | |
170 | .platform_data = &mmc2_conf, | |
171 | }, | |
172 | .num_resources = ARRAY_SIZE(mmc2_resources), | |
173 | .resource = mmc2_resources, | |
174 | }; | |
175 | #endif | |
176 | ||
177 | static void __init omap_init_mmc(void) | |
178 | { | |
179 | const struct omap_mmc_config *mmc_conf; | |
180 | const struct omap_mmc_conf *mmc; | |
181 | ||
182 | /* NOTE: assumes MMC was never (wrongly) enabled */ | |
183 | mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config); | |
184 | if (!mmc_conf) | |
185 | return; | |
186 | ||
187 | /* block 1 is always available and has just one pinout option */ | |
188 | mmc = &mmc_conf->mmc[0]; | |
189 | if (mmc->enabled) { | |
190 | omap_cfg_reg(MMC_CMD); | |
191 | omap_cfg_reg(MMC_CLK); | |
192 | omap_cfg_reg(MMC_DAT0); | |
193 | if (cpu_is_omap1710()) { | |
194 | omap_cfg_reg(M15_1710_MMC_CLKI); | |
195 | omap_cfg_reg(P19_1710_MMC_CMDDIR); | |
196 | omap_cfg_reg(P20_1710_MMC_DATDIR0); | |
197 | } | |
198 | if (mmc->wire4) { | |
199 | omap_cfg_reg(MMC_DAT1); | |
200 | /* NOTE: DAT2 can be on W10 (here) or M15 */ | |
201 | if (!mmc->nomux) | |
202 | omap_cfg_reg(MMC_DAT2); | |
203 | omap_cfg_reg(MMC_DAT3); | |
204 | } | |
205 | mmc1_conf = *mmc; | |
206 | (void) platform_device_register(&mmc_omap_device1); | |
207 | } | |
208 | ||
209 | #ifdef CONFIG_ARCH_OMAP16XX | |
210 | /* block 2 is on newer chips, and has many pinout options */ | |
211 | mmc = &mmc_conf->mmc[1]; | |
212 | if (mmc->enabled) { | |
213 | if (!mmc->nomux) { | |
214 | omap_cfg_reg(Y8_1610_MMC2_CMD); | |
215 | omap_cfg_reg(Y10_1610_MMC2_CLK); | |
216 | omap_cfg_reg(R18_1610_MMC2_CLKIN); | |
217 | omap_cfg_reg(W8_1610_MMC2_DAT0); | |
218 | if (mmc->wire4) { | |
219 | omap_cfg_reg(V8_1610_MMC2_DAT1); | |
220 | omap_cfg_reg(W15_1610_MMC2_DAT2); | |
221 | omap_cfg_reg(R10_1610_MMC2_DAT3); | |
222 | } | |
223 | ||
224 | /* These are needed for the level shifter */ | |
225 | omap_cfg_reg(V9_1610_MMC2_CMDDIR); | |
226 | omap_cfg_reg(V5_1610_MMC2_DATDIR0); | |
227 | omap_cfg_reg(W19_1610_MMC2_DATDIR1); | |
228 | } | |
229 | ||
230 | /* Feedback clock must be set on OMAP-1710 MMC2 */ | |
231 | if (cpu_is_omap1710()) | |
232 | omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), | |
233 | MOD_CONF_CTRL_1); | |
234 | mmc2_conf = *mmc; | |
235 | (void) platform_device_register(&mmc_omap_device2); | |
236 | } | |
237 | #endif | |
238 | return; | |
239 | } | |
240 | #else | |
241 | static inline void omap_init_mmc(void) {} | |
242 | #endif | |
243 | ||
244 | #if defined(CONFIG_OMAP_RTC) || defined(CONFIG_OMAP_RTC) | |
245 | ||
246 | #define OMAP_RTC_BASE 0xfffb4800 | |
247 | ||
248 | static struct resource rtc_resources[] = { | |
249 | { | |
250 | .start = OMAP_RTC_BASE, | |
251 | .end = OMAP_RTC_BASE + 0x5f, | |
252 | .flags = IORESOURCE_MEM, | |
253 | }, | |
254 | { | |
255 | .start = INT_RTC_TIMER, | |
256 | .flags = IORESOURCE_IRQ, | |
257 | }, | |
258 | { | |
259 | .start = INT_RTC_ALARM, | |
260 | .flags = IORESOURCE_IRQ, | |
261 | }, | |
262 | }; | |
263 | ||
264 | static struct platform_device omap_rtc_device = { | |
265 | .name = "omap_rtc", | |
266 | .id = -1, | |
267 | .dev = { | |
268 | .release = omap_nop_release, | |
269 | }, | |
270 | .num_resources = ARRAY_SIZE(rtc_resources), | |
271 | .resource = rtc_resources, | |
272 | }; | |
273 | ||
274 | static void omap_init_rtc(void) | |
275 | { | |
276 | (void) platform_device_register(&omap_rtc_device); | |
277 | } | |
278 | #else | |
279 | static inline void omap_init_rtc(void) {} | |
280 | #endif | |
281 | ||
282 | /*-------------------------------------------------------------------------*/ | |
283 | ||
284 | #if defined(CONFIG_OMAP16XX_WATCHDOG) || defined(CONFIG_OMAP16XX_WATCHDOG_MODULE) | |
285 | ||
286 | #define OMAP_WDT_BASE 0xfffeb000 | |
287 | ||
288 | static struct resource wdt_resources[] = { | |
289 | { | |
290 | .start = OMAP_WDT_BASE, | |
291 | .end = OMAP_WDT_BASE + 0x4f, | |
292 | .flags = IORESOURCE_MEM, | |
293 | }, | |
294 | }; | |
295 | ||
296 | static struct platform_device omap_wdt_device = { | |
297 | .name = "omap1610_wdt", | |
298 | .id = -1, | |
299 | .dev = { | |
300 | .release = omap_nop_release, | |
301 | }, | |
302 | .num_resources = ARRAY_SIZE(wdt_resources), | |
303 | .resource = wdt_resources, | |
304 | }; | |
305 | ||
306 | static void omap_init_wdt(void) | |
307 | { | |
308 | (void) platform_device_register(&omap_wdt_device); | |
309 | } | |
310 | #else | |
311 | static inline void omap_init_wdt(void) {} | |
312 | #endif | |
313 | ||
314 | ||
315 | /*-------------------------------------------------------------------------*/ | |
316 | ||
317 | /* | |
318 | * This gets called after board-specific INIT_MACHINE, and initializes most | |
319 | * on-chip peripherals accessible on this board (except for few like USB): | |
320 | * | |
321 | * (a) Does any "standard config" pin muxing needed. Board-specific | |
322 | * code will have muxed GPIO pins and done "nonstandard" setup; | |
323 | * that code could live in the boot loader. | |
324 | * (b) Populating board-specific platform_data with the data drivers | |
325 | * rely on to handle wiring variations. | |
326 | * (c) Creating platform devices as meaningful on this board and | |
327 | * with this kernel configuration. | |
328 | * | |
329 | * Claiming GPIOs, and setting their direction and initial values, is the | |
330 | * responsibility of the device drivers. So is responding to probe(). | |
331 | * | |
332 | * Board-specific knowlege like creating devices or pin setup is to be | |
333 | * kept out of drivers as much as possible. In particular, pin setup | |
334 | * may be handled by the boot loader, and drivers should expect it will | |
335 | * normally have been done by the time they're probed. | |
336 | */ | |
337 | static int __init omap_init_devices(void) | |
338 | { | |
339 | /* please keep these calls, and their implementations above, | |
340 | * in alphabetical order so they're easier to sort through. | |
341 | */ | |
342 | omap_init_i2c(); | |
343 | omap_init_irda(); | |
344 | omap_init_mmc(); | |
345 | omap_init_rtc(); | |
346 | omap_init_wdt(); | |
347 | ||
348 | return 0; | |
349 | } | |
350 | arch_initcall(omap_init_devices); | |
351 |