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2ec1d359 AR |
1 | /* |
2 | * Generic GPIO driver for logic cells found in the Nomadik SoC | |
3 | * | |
4 | * Copyright (C) 2008,2009 STMicroelectronics | |
5 | * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it> | |
6 | * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/device.h> | |
16 | #include <linux/amba/bus.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/gpio.h> | |
19 | #include <linux/spinlock.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/irq.h> | |
22 | ||
23 | #include <mach/hardware.h> | |
24 | #include <mach/gpio.h> | |
25 | ||
26 | /* | |
27 | * The GPIO module in the Nomadik family of Systems-on-Chip is an | |
28 | * AMBA device, managing 32 pins and alternate functions. The logic block | |
29 | * is currently only used in the Nomadik. | |
30 | * | |
31 | * Symbols in this file are called "nmk_gpio" for "nomadik gpio" | |
32 | */ | |
33 | ||
34 | #define NMK_GPIO_PER_CHIP 32 | |
35 | struct nmk_gpio_chip { | |
36 | struct gpio_chip chip; | |
37 | void __iomem *addr; | |
38 | unsigned int parent_irq; | |
39 | spinlock_t *lock; | |
40 | /* Keep track of configured edges */ | |
41 | u32 edge_rising; | |
42 | u32 edge_falling; | |
43 | }; | |
44 | ||
45 | /* Mode functions */ | |
46 | int nmk_gpio_set_mode(int gpio, int gpio_mode) | |
47 | { | |
48 | struct nmk_gpio_chip *nmk_chip; | |
49 | unsigned long flags; | |
50 | u32 afunc, bfunc, bit; | |
51 | ||
52 | nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); | |
53 | if (!nmk_chip) | |
54 | return -EINVAL; | |
55 | ||
56 | bit = 1 << (gpio - nmk_chip->chip.base); | |
57 | ||
58 | spin_lock_irqsave(&nmk_chip->lock, flags); | |
59 | afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit; | |
60 | bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit; | |
61 | if (gpio_mode & NMK_GPIO_ALT_A) | |
62 | afunc |= bit; | |
63 | if (gpio_mode & NMK_GPIO_ALT_B) | |
64 | bfunc |= bit; | |
65 | writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA); | |
66 | writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB); | |
67 | spin_unlock_irqrestore(&nmk_chip->lock, flags); | |
68 | ||
69 | return 0; | |
70 | } | |
71 | EXPORT_SYMBOL(nmk_gpio_set_mode); | |
72 | ||
73 | int nmk_gpio_get_mode(int gpio) | |
74 | { | |
75 | struct nmk_gpio_chip *nmk_chip; | |
76 | u32 afunc, bfunc, bit; | |
77 | ||
78 | nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio)); | |
79 | if (!nmk_chip) | |
80 | return -EINVAL; | |
81 | ||
82 | bit = 1 << (gpio - nmk_chip->chip.base); | |
83 | ||
84 | afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit; | |
85 | bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit; | |
86 | ||
87 | return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0); | |
88 | } | |
89 | EXPORT_SYMBOL(nmk_gpio_get_mode); | |
90 | ||
91 | ||
92 | /* IRQ functions */ | |
93 | static inline int nmk_gpio_get_bitmask(int gpio) | |
94 | { | |
95 | return 1 << (gpio % 32); | |
96 | } | |
97 | ||
98 | static void nmk_gpio_irq_ack(unsigned int irq) | |
99 | { | |
100 | int gpio; | |
101 | struct nmk_gpio_chip *nmk_chip; | |
102 | ||
103 | gpio = NOMADIK_IRQ_TO_GPIO(irq); | |
104 | nmk_chip = get_irq_chip_data(irq); | |
105 | if (!nmk_chip) | |
106 | return; | |
107 | writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC); | |
108 | } | |
109 | ||
110 | static void nmk_gpio_irq_mask(unsigned int irq) | |
111 | { | |
112 | int gpio; | |
113 | struct nmk_gpio_chip *nmk_chip; | |
114 | unsigned long flags; | |
115 | u32 bitmask, reg; | |
116 | ||
117 | gpio = NOMADIK_IRQ_TO_GPIO(irq); | |
118 | nmk_chip = get_irq_chip_data(irq); | |
119 | bitmask = nmk_gpio_get_bitmask(gpio); | |
120 | if (!nmk_chip) | |
121 | return; | |
122 | ||
123 | /* we must individually clear the two edges */ | |
124 | spin_lock_irqsave(&nmk_chip->lock, flags); | |
125 | if (nmk_chip->edge_rising & bitmask) { | |
126 | reg = readl(nmk_chip->addr + NMK_GPIO_RWIMSC); | |
127 | reg &= ~bitmask; | |
128 | writel(reg, nmk_chip->addr + NMK_GPIO_RWIMSC); | |
129 | } | |
130 | if (nmk_chip->edge_falling & bitmask) { | |
131 | reg = readl(nmk_chip->addr + NMK_GPIO_FWIMSC); | |
132 | reg &= ~bitmask; | |
133 | writel(reg, nmk_chip->addr + NMK_GPIO_FWIMSC); | |
134 | } | |
135 | spin_unlock_irqrestore(&nmk_chip->lock, flags); | |
136 | }; | |
137 | ||
138 | static void nmk_gpio_irq_unmask(unsigned int irq) | |
139 | { | |
140 | int gpio; | |
141 | struct nmk_gpio_chip *nmk_chip; | |
142 | unsigned long flags; | |
143 | u32 bitmask, reg; | |
144 | ||
145 | gpio = NOMADIK_IRQ_TO_GPIO(irq); | |
146 | nmk_chip = get_irq_chip_data(irq); | |
147 | bitmask = nmk_gpio_get_bitmask(gpio); | |
148 | if (!nmk_chip) | |
149 | return; | |
150 | ||
151 | /* we must individually set the two edges */ | |
152 | spin_lock_irqsave(&nmk_chip->lock, flags); | |
153 | if (nmk_chip->edge_rising & bitmask) { | |
154 | reg = readl(nmk_chip->addr + NMK_GPIO_RWIMSC); | |
155 | reg |= bitmask; | |
156 | writel(reg, nmk_chip->addr + NMK_GPIO_RWIMSC); | |
157 | } | |
158 | if (nmk_chip->edge_falling & bitmask) { | |
159 | reg = readl(nmk_chip->addr + NMK_GPIO_FWIMSC); | |
160 | reg |= bitmask; | |
161 | writel(reg, nmk_chip->addr + NMK_GPIO_FWIMSC); | |
162 | } | |
163 | spin_unlock_irqrestore(&nmk_chip->lock, flags); | |
164 | } | |
165 | ||
166 | static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type) | |
167 | { | |
168 | int gpio; | |
169 | struct nmk_gpio_chip *nmk_chip; | |
170 | unsigned long flags; | |
171 | u32 bitmask; | |
172 | ||
173 | gpio = NOMADIK_IRQ_TO_GPIO(irq); | |
174 | nmk_chip = get_irq_chip_data(irq); | |
175 | bitmask = nmk_gpio_get_bitmask(gpio); | |
176 | if (!nmk_chip) | |
177 | return -EINVAL; | |
178 | ||
179 | if (type & IRQ_TYPE_LEVEL_HIGH) | |
180 | return -EINVAL; | |
181 | if (type & IRQ_TYPE_LEVEL_LOW) | |
182 | return -EINVAL; | |
183 | ||
184 | spin_lock_irqsave(&nmk_chip->lock, flags); | |
185 | ||
186 | nmk_chip->edge_rising &= ~bitmask; | |
187 | if (type & IRQ_TYPE_EDGE_RISING) | |
188 | nmk_chip->edge_rising |= bitmask; | |
189 | writel(nmk_chip->edge_rising, nmk_chip->addr + NMK_GPIO_RIMSC); | |
190 | ||
191 | nmk_chip->edge_falling &= ~bitmask; | |
192 | if (type & IRQ_TYPE_EDGE_FALLING) | |
193 | nmk_chip->edge_falling |= bitmask; | |
194 | writel(nmk_chip->edge_falling, nmk_chip->addr + NMK_GPIO_FIMSC); | |
195 | ||
196 | spin_unlock_irqrestore(&nmk_chip->lock, flags); | |
197 | ||
198 | nmk_gpio_irq_unmask(irq); | |
199 | ||
200 | return 0; | |
201 | } | |
202 | ||
203 | static struct irq_chip nmk_gpio_irq_chip = { | |
204 | .name = "Nomadik-GPIO", | |
205 | .ack = nmk_gpio_irq_ack, | |
206 | .mask = nmk_gpio_irq_mask, | |
207 | .unmask = nmk_gpio_irq_unmask, | |
208 | .set_type = nmk_gpio_irq_set_type, | |
209 | }; | |
210 | ||
211 | static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |
212 | { | |
213 | struct nmk_gpio_chip *nmk_chip; | |
214 | struct irq_chip *host_chip; | |
215 | unsigned int gpio_irq; | |
216 | u32 pending; | |
217 | unsigned int first_irq; | |
218 | ||
219 | nmk_chip = get_irq_data(irq); | |
220 | first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); | |
221 | while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) { | |
222 | gpio_irq = first_irq + __ffs(pending); | |
223 | generic_handle_irq(gpio_irq); | |
224 | } | |
225 | if (0) {/* don't ack parent irq, as ack == disable */ | |
226 | host_chip = get_irq_chip(irq); | |
227 | host_chip->ack(irq); | |
228 | } | |
229 | } | |
230 | ||
231 | static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip) | |
232 | { | |
233 | unsigned int first_irq; | |
234 | int i; | |
235 | ||
236 | first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base); | |
237 | for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) { | |
238 | set_irq_chip(i, &nmk_gpio_irq_chip); | |
239 | set_irq_handler(i, handle_edge_irq); | |
240 | set_irq_flags(i, IRQF_VALID); | |
241 | set_irq_chip_data(i, nmk_chip); | |
242 | } | |
243 | set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler); | |
244 | set_irq_data(nmk_chip->parent_irq, nmk_chip); | |
245 | return 0; | |
246 | } | |
247 | ||
248 | /* I/O Functions */ | |
249 | static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset) | |
250 | { | |
251 | struct nmk_gpio_chip *nmk_chip = | |
252 | container_of(chip, struct nmk_gpio_chip, chip); | |
253 | ||
254 | writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC); | |
255 | return 0; | |
256 | } | |
257 | ||
258 | static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset, | |
259 | int val) | |
260 | { | |
261 | struct nmk_gpio_chip *nmk_chip = | |
262 | container_of(chip, struct nmk_gpio_chip, chip); | |
263 | ||
264 | writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS); | |
265 | return 0; | |
266 | } | |
267 | ||
268 | static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset) | |
269 | { | |
270 | struct nmk_gpio_chip *nmk_chip = | |
271 | container_of(chip, struct nmk_gpio_chip, chip); | |
272 | u32 bit = 1 << offset; | |
273 | ||
274 | return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0; | |
275 | } | |
276 | ||
277 | static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset, | |
278 | int val) | |
279 | { | |
280 | struct nmk_gpio_chip *nmk_chip = | |
281 | container_of(chip, struct nmk_gpio_chip, chip); | |
282 | u32 bit = 1 << offset; | |
283 | ||
284 | if (val) | |
285 | writel(bit, nmk_chip->addr + NMK_GPIO_DATS); | |
286 | else | |
287 | writel(bit, nmk_chip->addr + NMK_GPIO_DATC); | |
288 | } | |
289 | ||
290 | /* This structure is replicated for each GPIO block allocated at probe time */ | |
291 | static struct gpio_chip nmk_gpio_template = { | |
292 | .direction_input = nmk_gpio_make_input, | |
293 | .get = nmk_gpio_get_input, | |
294 | .direction_output = nmk_gpio_make_output, | |
295 | .set = nmk_gpio_set_output, | |
296 | .ngpio = NMK_GPIO_PER_CHIP, | |
297 | .can_sleep = 0, | |
298 | }; | |
299 | ||
300 | static int __init nmk_gpio_probe(struct amba_device *dev, struct amba_id *id) | |
301 | { | |
302 | struct nmk_gpio_platform_data *pdata; | |
303 | struct nmk_gpio_chip *nmk_chip; | |
304 | struct gpio_chip *chip; | |
305 | int ret; | |
306 | ||
307 | pdata = dev->dev.platform_data; | |
308 | ret = amba_request_regions(dev, pdata->name); | |
309 | if (ret) | |
310 | return ret; | |
311 | ||
312 | nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL); | |
313 | if (!nmk_chip) { | |
314 | ret = -ENOMEM; | |
315 | goto out_amba; | |
316 | } | |
317 | /* | |
318 | * The virt address in nmk_chip->addr is in the nomadik register space, | |
319 | * so we can simply convert the resource address, without remapping | |
320 | */ | |
321 | nmk_chip->addr = io_p2v(dev->res.start); | |
322 | nmk_chip->chip = nmk_gpio_template; | |
323 | nmk_chip->parent_irq = pdata->parent_irq; | |
324 | ||
325 | chip = &nmk_chip->chip; | |
326 | chip->base = pdata->first_gpio; | |
327 | chip->label = pdata->name; | |
328 | chip->dev = &dev->dev; | |
329 | chip->owner = THIS_MODULE; | |
330 | ||
331 | ret = gpiochip_add(&nmk_chip->chip); | |
332 | if (ret) | |
333 | goto out_free; | |
334 | ||
335 | amba_set_drvdata(dev, nmk_chip); | |
336 | ||
337 | nmk_gpio_init_irq(nmk_chip); | |
338 | ||
339 | dev_info(&dev->dev, "Bits %i-%i at address %p\n", | |
340 | nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr); | |
341 | return 0; | |
342 | ||
343 | out_free: | |
344 | kfree(nmk_chip); | |
345 | out_amba: | |
346 | amba_release_regions(dev); | |
347 | dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret, | |
348 | pdata->first_gpio, pdata->first_gpio+31); | |
349 | return ret; | |
350 | } | |
351 | ||
352 | static int nmk_gpio_remove(struct amba_device *dev) | |
353 | { | |
354 | struct nmk_gpio_chip *nmk_chip; | |
355 | ||
356 | nmk_chip = amba_get_drvdata(dev); | |
357 | gpiochip_remove(&nmk_chip->chip); | |
358 | kfree(nmk_chip); | |
359 | amba_release_regions(dev); | |
360 | return 0; | |
361 | } | |
362 | ||
363 | ||
364 | /* We have 0x1f080060 and 0x1f180060, accept both using the mask */ | |
365 | static struct amba_id nmk_gpio_ids[] = { | |
366 | { | |
367 | .id = 0x1f080060, | |
368 | .mask = 0xffefffff, | |
369 | }, | |
370 | {0, 0}, | |
371 | }; | |
372 | ||
373 | static struct amba_driver nmk_gpio_driver = { | |
374 | .drv = { | |
375 | .owner = THIS_MODULE, | |
376 | .name = "gpio", | |
377 | }, | |
378 | .probe = nmk_gpio_probe, | |
379 | .remove = nmk_gpio_remove, | |
380 | .suspend = NULL, /* to be done */ | |
381 | .resume = NULL, | |
382 | .id_table = nmk_gpio_ids, | |
383 | }; | |
384 | ||
385 | static int __init nmk_gpio_init(void) | |
386 | { | |
387 | return amba_driver_register(&nmk_gpio_driver); | |
388 | } | |
389 | ||
390 | arch_initcall(nmk_gpio_init); | |
391 | ||
392 | MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini"); | |
393 | MODULE_DESCRIPTION("Nomadik GPIO Driver"); | |
394 | MODULE_LICENSE("GPL"); | |
395 | ||
396 |