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4afbbb7c SG |
1 | /* |
2 | * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | */ | |
14 | ||
15 | #include <linux/delay.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/gpio.h> | |
53b8ff9d | 18 | #include <linux/leds.h> |
4afbbb7c | 19 | #include <linux/clk.h> |
074c54f4 | 20 | #include <linux/i2c.h> |
e55e48ff WS |
21 | #include <linux/regulator/machine.h> |
22 | #include <linux/regulator/fixed.h> | |
4afbbb7c SG |
23 | |
24 | #include <asm/mach-types.h> | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach/time.h> | |
27 | ||
28 | #include <mach/common.h> | |
29 | #include <mach/iomux-mx28.h> | |
30 | ||
31 | #include "devices-mx28.h" | |
4afbbb7c | 32 | |
acc9cdca | 33 | #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13) |
4afbbb7c | 34 | #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15) |
53b8ff9d | 35 | #define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5) |
0590a790 SG |
36 | #define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18) |
37 | #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) | |
4afbbb7c SG |
38 | #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) |
39 | ||
5bb2c828 SG |
40 | #define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12) |
41 | #define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28) | |
42 | #define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28) | |
43 | #define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29) | |
44 | ||
4afbbb7c SG |
45 | static const iomux_cfg_t mx28evk_pads[] __initconst = { |
46 | /* duart */ | |
db63a493 SG |
47 | MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, |
48 | MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL, | |
4afbbb7c | 49 | |
15808182 | 50 | /* auart0 */ |
db63a493 SG |
51 | MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL, |
52 | MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL, | |
53 | MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL, | |
54 | MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL, | |
15808182 | 55 | /* auart3 */ |
db63a493 SG |
56 | MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL, |
57 | MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL, | |
58 | MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL, | |
59 | MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL, | |
15808182 | 60 | |
db63a493 | 61 | #define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP) |
4afbbb7c | 62 | /* fec0 */ |
db63a493 SG |
63 | MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC, |
64 | MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC, | |
65 | MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC, | |
66 | MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC, | |
67 | MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC, | |
68 | MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC, | |
69 | MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC, | |
70 | MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC, | |
71 | MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC, | |
48f76ed1 | 72 | /* fec1 */ |
db63a493 SG |
73 | MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC, |
74 | MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC, | |
75 | MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC, | |
76 | MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC, | |
77 | MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC, | |
78 | MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC, | |
4afbbb7c | 79 | /* phy power line */ |
db63a493 | 80 | MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL, |
4afbbb7c | 81 | /* phy reset line */ |
db63a493 | 82 | MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL, |
acc9cdca SG |
83 | |
84 | /* flexcan0 */ | |
85 | MX28_PAD_GPMI_RDY2__CAN0_TX, | |
86 | MX28_PAD_GPMI_RDY3__CAN0_RX, | |
87 | /* flexcan1 */ | |
88 | MX28_PAD_GPMI_CE2N__CAN1_TX, | |
89 | MX28_PAD_GPMI_CE3N__CAN1_RX, | |
90 | /* transceiver power control */ | |
91 | MX28_PAD_SSP1_CMD__GPIO_2_13, | |
0590a790 SG |
92 | |
93 | /* mxsfb (lcdif) */ | |
94 | MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL, | |
95 | MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL, | |
96 | MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL, | |
97 | MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL, | |
98 | MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL, | |
99 | MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL, | |
100 | MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL, | |
101 | MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL, | |
102 | MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL, | |
103 | MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL, | |
104 | MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL, | |
105 | MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL, | |
106 | MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL, | |
107 | MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL, | |
108 | MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL, | |
109 | MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL, | |
110 | MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL, | |
111 | MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL, | |
112 | MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL, | |
113 | MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL, | |
114 | MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL, | |
115 | MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL, | |
116 | MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL, | |
117 | MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL, | |
118 | MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL, | |
119 | MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL, | |
120 | MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL, | |
121 | MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL, | |
122 | /* LCD panel enable */ | |
123 | MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL, | |
124 | /* backlight control */ | |
125 | MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL, | |
5bb2c828 SG |
126 | /* mmc0 */ |
127 | MX28_PAD_SSP0_DATA0__SSP0_D0 | | |
128 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
129 | MX28_PAD_SSP0_DATA1__SSP0_D1 | | |
130 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
131 | MX28_PAD_SSP0_DATA2__SSP0_D2 | | |
132 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
133 | MX28_PAD_SSP0_DATA3__SSP0_D3 | | |
134 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
135 | MX28_PAD_SSP0_DATA4__SSP0_D4 | | |
136 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
137 | MX28_PAD_SSP0_DATA5__SSP0_D5 | | |
138 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
139 | MX28_PAD_SSP0_DATA6__SSP0_D6 | | |
140 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
141 | MX28_PAD_SSP0_DATA7__SSP0_D7 | | |
142 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
143 | MX28_PAD_SSP0_CMD__SSP0_CMD | | |
144 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
145 | MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | | |
146 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
147 | MX28_PAD_SSP0_SCK__SSP0_SCK | | |
148 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
149 | /* write protect */ | |
150 | MX28_PAD_SSP1_SCK__GPIO_2_12 | | |
151 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
152 | /* slot power enable */ | |
153 | MX28_PAD_PWM3__GPIO_3_28 | | |
154 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
155 | ||
156 | /* mmc1 */ | |
157 | MX28_PAD_GPMI_D00__SSP1_D0 | | |
158 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
159 | MX28_PAD_GPMI_D01__SSP1_D1 | | |
160 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
161 | MX28_PAD_GPMI_D02__SSP1_D2 | | |
162 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
163 | MX28_PAD_GPMI_D03__SSP1_D3 | | |
164 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
165 | MX28_PAD_GPMI_D04__SSP1_D4 | | |
166 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
167 | MX28_PAD_GPMI_D05__SSP1_D5 | | |
168 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
169 | MX28_PAD_GPMI_D06__SSP1_D6 | | |
170 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
171 | MX28_PAD_GPMI_D07__SSP1_D7 | | |
172 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
173 | MX28_PAD_GPMI_RDY1__SSP1_CMD | | |
174 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
175 | MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT | | |
176 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
177 | MX28_PAD_GPMI_WRN__SSP1_SCK | | |
178 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
179 | /* write protect */ | |
180 | MX28_PAD_GPMI_RESETN__GPIO_0_28 | | |
181 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
182 | /* slot power enable */ | |
183 | MX28_PAD_PWM4__GPIO_3_29 | | |
184 | (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), | |
53b8ff9d SG |
185 | |
186 | /* led */ | |
187 | MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL, | |
c8ebcac8 | 188 | |
074c54f4 DA |
189 | /* I2C */ |
190 | MX28_PAD_I2C0_SCL__I2C0_SCL | | |
191 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
192 | MX28_PAD_I2C0_SDA__I2C0_SDA | | |
193 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
194 | ||
c8ebcac8 DA |
195 | /* saif0 & saif1 */ |
196 | MX28_PAD_SAIF0_MCLK__SAIF0_MCLK | | |
197 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
198 | MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK | | |
199 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
200 | MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK | | |
201 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
202 | MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 | | |
203 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
204 | MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 | | |
205 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | |
53b8ff9d SG |
206 | }; |
207 | ||
208 | /* led */ | |
209 | static const struct gpio_led mx28evk_leds[] __initconst = { | |
210 | { | |
211 | .name = "GPIO-LED", | |
212 | .default_trigger = "heartbeat", | |
213 | .gpio = MX28EVK_GPIO_LED, | |
214 | }, | |
215 | }; | |
216 | ||
217 | static const struct gpio_led_platform_data mx28evk_led_data __initconst = { | |
218 | .leds = mx28evk_leds, | |
219 | .num_leds = ARRAY_SIZE(mx28evk_leds), | |
4afbbb7c SG |
220 | }; |
221 | ||
222 | /* fec */ | |
223 | static void __init mx28evk_fec_reset(void) | |
224 | { | |
225 | int ret; | |
226 | struct clk *clk; | |
227 | ||
228 | /* Enable fec phy clock */ | |
229 | clk = clk_get_sys("pll2", NULL); | |
230 | if (!IS_ERR(clk)) | |
231 | clk_enable(clk); | |
232 | ||
233 | /* Power up fec phy */ | |
234 | ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power"); | |
235 | if (ret) { | |
236 | pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret); | |
237 | return; | |
238 | } | |
239 | ||
240 | ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0); | |
241 | if (ret) { | |
242 | pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret); | |
243 | return; | |
244 | } | |
245 | ||
246 | /* Reset fec phy */ | |
247 | ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset"); | |
248 | if (ret) { | |
249 | pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret); | |
250 | return; | |
251 | } | |
252 | ||
253 | gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0); | |
254 | if (ret) { | |
255 | pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret); | |
256 | return; | |
257 | } | |
258 | ||
259 | mdelay(1); | |
260 | gpio_set_value(MX28EVK_FEC_PHY_RESET, 1); | |
261 | } | |
262 | ||
a320b279 | 263 | static struct fec_platform_data mx28_fec_pdata[] __initdata = { |
48f76ed1 SG |
264 | { |
265 | /* fec0 */ | |
266 | .phy = PHY_INTERFACE_MODE_RMII, | |
267 | }, { | |
268 | /* fec1 */ | |
269 | .phy = PHY_INTERFACE_MODE_RMII, | |
270 | }, | |
4afbbb7c SG |
271 | }; |
272 | ||
a320b279 SG |
273 | static int __init mx28evk_fec_get_mac(void) |
274 | { | |
275 | int i; | |
276 | u32 val; | |
277 | const u32 *ocotp = mxs_get_ocotp(); | |
278 | ||
279 | if (!ocotp) | |
280 | goto error; | |
281 | ||
282 | /* | |
283 | * OCOTP only stores the last 4 octets for each mac address, | |
284 | * so hard-code Freescale OUI (00:04:9f) here. | |
285 | */ | |
286 | for (i = 0; i < 2; i++) { | |
287 | val = ocotp[i * 4]; | |
288 | mx28_fec_pdata[i].mac[0] = 0x00; | |
289 | mx28_fec_pdata[i].mac[1] = 0x04; | |
290 | mx28_fec_pdata[i].mac[2] = 0x9f; | |
291 | mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff; | |
292 | mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff; | |
293 | mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff; | |
294 | } | |
295 | ||
296 | return 0; | |
297 | ||
298 | error: | |
299 | pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__); | |
300 | return -ETIMEDOUT; | |
301 | } | |
302 | ||
acc9cdca SG |
303 | /* |
304 | * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers | |
305 | */ | |
306 | static int flexcan0_en, flexcan1_en; | |
307 | ||
308 | static void mx28evk_flexcan_switch(void) | |
309 | { | |
310 | if (flexcan0_en || flexcan1_en) | |
311 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1); | |
312 | else | |
313 | gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0); | |
314 | } | |
315 | ||
316 | static void mx28evk_flexcan0_switch(int enable) | |
317 | { | |
318 | flexcan0_en = enable; | |
319 | mx28evk_flexcan_switch(); | |
320 | } | |
321 | ||
322 | static void mx28evk_flexcan1_switch(int enable) | |
323 | { | |
324 | flexcan1_en = enable; | |
325 | mx28evk_flexcan_switch(); | |
326 | } | |
327 | ||
328 | static const struct flexcan_platform_data | |
329 | mx28evk_flexcan_pdata[] __initconst = { | |
330 | { | |
331 | .transceiver_switch = mx28evk_flexcan0_switch, | |
332 | }, { | |
333 | .transceiver_switch = mx28evk_flexcan1_switch, | |
334 | } | |
335 | }; | |
336 | ||
0590a790 SG |
337 | /* mxsfb (lcdif) */ |
338 | static struct fb_videomode mx28evk_video_modes[] = { | |
339 | { | |
340 | .name = "Seiko-43WVF1G", | |
341 | .refresh = 60, | |
342 | .xres = 800, | |
343 | .yres = 480, | |
344 | .pixclock = 29851, /* picosecond (33.5 MHz) */ | |
345 | .left_margin = 89, | |
346 | .right_margin = 164, | |
347 | .upper_margin = 23, | |
348 | .lower_margin = 10, | |
349 | .hsync_len = 10, | |
350 | .vsync_len = 10, | |
351 | .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT | | |
352 | FB_SYNC_DOTCLK_FAILING_ACT, | |
353 | }, | |
354 | }; | |
355 | ||
356 | static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = { | |
357 | .mode_list = mx28evk_video_modes, | |
358 | .mode_count = ARRAY_SIZE(mx28evk_video_modes), | |
359 | .default_bpp = 32, | |
360 | .ld_intf_width = STMLCDIF_24BIT, | |
361 | }; | |
362 | ||
5bb2c828 SG |
363 | static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = { |
364 | { | |
365 | /* mmc0 */ | |
366 | .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT, | |
367 | .flags = SLOTF_8_BIT_CAPABLE, | |
368 | }, { | |
369 | /* mmc1 */ | |
370 | .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT, | |
371 | .flags = SLOTF_8_BIT_CAPABLE, | |
372 | }, | |
373 | }; | |
374 | ||
074c54f4 DA |
375 | static struct i2c_board_info mxs_i2c0_board_info[] __initdata = { |
376 | { | |
377 | I2C_BOARD_INFO("sgtl5000", 0x0a), | |
378 | }, | |
379 | }; | |
380 | ||
e55e48ff WS |
381 | #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE) |
382 | static struct regulator_consumer_supply mx28evk_audio_consumer_supplies[] = { | |
383 | REGULATOR_SUPPLY("VDDA", "0-000a"), | |
384 | REGULATOR_SUPPLY("VDDIO", "0-000a"), | |
385 | }; | |
386 | ||
387 | static struct regulator_init_data mx28evk_vdd_reg_init_data = { | |
388 | .constraints = { | |
389 | .name = "3V3", | |
390 | .always_on = 1, | |
391 | }, | |
392 | .consumer_supplies = mx28evk_audio_consumer_supplies, | |
393 | .num_consumer_supplies = ARRAY_SIZE(mx28evk_audio_consumer_supplies), | |
394 | }; | |
395 | ||
396 | static struct fixed_voltage_config mx28evk_vdd_pdata = { | |
397 | .supply_name = "board-3V3", | |
398 | .microvolts = 3300000, | |
399 | .gpio = -EINVAL, | |
400 | .enabled_at_boot = 1, | |
401 | .init_data = &mx28evk_vdd_reg_init_data, | |
402 | }; | |
403 | static struct platform_device mx28evk_voltage_regulator = { | |
404 | .name = "reg-fixed-voltage", | |
405 | .id = -1, | |
406 | .num_resources = 0, | |
407 | .dev = { | |
408 | .platform_data = &mx28evk_vdd_pdata, | |
409 | }, | |
410 | }; | |
411 | static void __init mx28evk_add_regulators(void) | |
412 | { | |
413 | platform_device_register(&mx28evk_voltage_regulator); | |
414 | } | |
415 | #else | |
416 | static void __init mx28evk_add_regulators(void) {} | |
417 | #endif | |
418 | ||
a35b9147 FE |
419 | static struct gpio mx28evk_lcd_gpios[] = { |
420 | { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" }, | |
421 | { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, | |
422 | }; | |
423 | ||
4afbbb7c SG |
424 | static void __init mx28evk_init(void) |
425 | { | |
acc9cdca SG |
426 | int ret; |
427 | ||
4afbbb7c SG |
428 | mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads)); |
429 | ||
430 | mx28_add_duart(); | |
15808182 SG |
431 | mx28_add_auart0(); |
432 | mx28_add_auart3(); | |
4afbbb7c | 433 | |
a320b279 SG |
434 | if (mx28evk_fec_get_mac()) |
435 | pr_warn("%s: failed on fec mac setup\n", __func__); | |
436 | ||
4afbbb7c | 437 | mx28evk_fec_reset(); |
48f76ed1 SG |
438 | mx28_add_fec(0, &mx28_fec_pdata[0]); |
439 | mx28_add_fec(1, &mx28_fec_pdata[1]); | |
acc9cdca SG |
440 | |
441 | ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT, | |
442 | "flexcan-switch"); | |
443 | if (ret) { | |
444 | pr_err("failed to request gpio flexcan-switch: %d\n", ret); | |
445 | } else { | |
446 | mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]); | |
447 | mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]); | |
448 | } | |
0590a790 | 449 | |
a35b9147 FE |
450 | ret = gpio_request_array(mx28evk_lcd_gpios, |
451 | ARRAY_SIZE(mx28evk_lcd_gpios)); | |
0590a790 | 452 | if (ret) |
a35b9147 | 453 | pr_warn("failed to request gpio pins for lcd: %d\n", ret); |
0590a790 | 454 | else |
a35b9147 | 455 | mx28_add_mxsfb(&mx28evk_mxsfb_pdata); |
5bb2c828 | 456 | |
c8ebcac8 DA |
457 | mx28_add_saif(0); |
458 | mx28_add_saif(1); | |
459 | ||
074c54f4 DA |
460 | mx28_add_mxs_i2c(0); |
461 | i2c_register_board_info(0, mxs_i2c0_board_info, | |
462 | ARRAY_SIZE(mxs_i2c0_board_info)); | |
463 | ||
e55e48ff WS |
464 | mx28evk_add_regulators(); |
465 | ||
ce9b8e6f DA |
466 | mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0, |
467 | NULL, 0); | |
468 | ||
5bb2c828 | 469 | /* power on mmc slot by writing 0 to the gpio */ |
c7dae181 | 470 | ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, |
5bb2c828 SG |
471 | "mmc0-slot-power"); |
472 | if (ret) | |
473 | pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); | |
e94e05ea SG |
474 | else |
475 | mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); | |
5bb2c828 | 476 | |
c7dae181 | 477 | ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, |
5bb2c828 SG |
478 | "mmc1-slot-power"); |
479 | if (ret) | |
480 | pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); | |
a35b9147 FE |
481 | else |
482 | mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); | |
53b8ff9d | 483 | |
87d022cc | 484 | mx28_add_rtc_stmp3xxx(); |
53b8ff9d SG |
485 | |
486 | gpio_led_register_device(0, &mx28evk_led_data); | |
4afbbb7c SG |
487 | } |
488 | ||
489 | static void __init mx28evk_timer_init(void) | |
490 | { | |
491 | mx28_clocks_init(); | |
492 | } | |
493 | ||
494 | static struct sys_timer mx28evk_timer = { | |
495 | .init = mx28evk_timer_init, | |
496 | }; | |
497 | ||
498 | MACHINE_START(MX28EVK, "Freescale MX28 EVK") | |
499 | /* Maintainer: Freescale Semiconductor, Inc. */ | |
500 | .map_io = mx28_map_io, | |
501 | .init_irq = mx28_init_irq, | |
4afbbb7c | 502 | .timer = &mx28evk_timer, |
2db3fcf1 | 503 | .init_machine = mx28evk_init, |
4afbbb7c | 504 | MACHINE_END |