[linux-2.6-block.git] / arch / arm / mach-mxs / mach-mx28evk.c

/*
 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/clk.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>

#include <mach/common.h>
#include <mach/iomux-mx28.h>

#include "devices-mx28.h"
#include "gpio.h"

#define MX28EVK_FEC_PHY_POWER	MXS_GPIO_NR(2, 15)
#define MX28EVK_FEC_PHY_RESET	MXS_GPIO_NR(4, 13)

static const iomux_cfg_t mx28evk_pads[] __initconst = {
	/* duart */
	MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
	MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,

	/* auart0 */
	MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
	MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
	MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
	MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
	/* auart3 */
	MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
	MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
	MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
	MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,

#define MXS_PAD_FEC	(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
	/* fec0 */
	MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
	MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
	MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
	MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
	MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
	MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
	MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
	MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
	MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
	/* fec1 */
	MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
	MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
	MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
	MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
	MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
	MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
	/* phy power line */
	MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
	/* phy reset line */
	MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
};

/* fec */
static void __init mx28evk_fec_reset(void)
{
	int ret;
	struct clk *clk;

	/* Enable fec phy clock */
	clk = clk_get_sys("pll2", NULL);
	if (!IS_ERR(clk))
		clk_enable(clk);

	/* Power up fec phy */
	ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
	if (ret) {
		pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
		return;
	}

	ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
	if (ret) {
		pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
		return;
	}

	/* Reset fec phy */
	ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
	if (ret) {
		pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
		return;
	}

	gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
	if (ret) {
		pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
		return;
	}

	mdelay(1);
	gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
}

static struct fec_platform_data mx28_fec_pdata[] __initdata = {
	{
		/* fec0 */
		.phy = PHY_INTERFACE_MODE_RMII,
	}, {
		/* fec1 */
		.phy = PHY_INTERFACE_MODE_RMII,
	},
};

static int __init mx28evk_fec_get_mac(void)
{
	int i;
	u32 val;
	const u32 *ocotp = mxs_get_ocotp();

	if (!ocotp)
		goto error;

	/*
	 * OCOTP only stores the last 4 octets for each mac address,
	 * so hard-code Freescale OUI (00:04:9f) here.
	 */
	for (i = 0; i < 2; i++) {
		val = ocotp[i * 4];
		mx28_fec_pdata[i].mac[0] = 0x00;
		mx28_fec_pdata[i].mac[1] = 0x04;
		mx28_fec_pdata[i].mac[2] = 0x9f;
		mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
		mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
		mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
	}

	return 0;

error:
	pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
	return -ETIMEDOUT;
}

static void __init mx28evk_init(void)
{
	mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));

	mx28_add_duart();
	mx28_add_auart0();
	mx28_add_auart3();

	if (mx28evk_fec_get_mac())
		pr_warn("%s: failed on fec mac setup\n", __func__);

	mx28evk_fec_reset();
	mx28_add_fec(0, &mx28_fec_pdata[0]);
	mx28_add_fec(1, &mx28_fec_pdata[1]);
}

static void __init mx28evk_timer_init(void)
{
	mx28_clocks_init();
}

static struct sys_timer mx28evk_timer = {
	.init	= mx28evk_timer_init,
};

MACHINE_START(MX28EVK, "Freescale MX28 EVK")
	/* Maintainer: Freescale Semiconductor, Inc. */
	.map_io		= mx28_map_io,
	.init_irq	= mx28_init_irq,
	.init_machine	= mx28evk_init,
	.timer		= &mx28evk_timer,
MACHINE_END
Commit	Line	Data
4afbbb7c SG	1	/*
	2	* Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*/
	14
	15	#include <linux/delay.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/gpio.h>
	18	#include <linux/irq.h>
	19	#include <linux/clk.h>
	20
	21	#include <asm/mach-types.h>
	22	#include <asm/mach/arch.h>
	23	#include <asm/mach/time.h>
	24
	25	#include <mach/common.h>
	26	#include <mach/iomux-mx28.h>
	27
	28	#include "devices-mx28.h"
	29	#include "gpio.h"
	30
	31	#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
	32	#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
	33
	34	static const iomux_cfg_t mx28evk_pads[] __initconst = {
	35	/* duart */
db63a493 SG	36	MX28_PAD_PWM0__DUART_RX \| MXS_PAD_CTRL,
db63a493 SG	37	MX28_PAD_PWM1__DUART_TX \| MXS_PAD_CTRL,
4afbbb7c	38
15808182	39	/* auart0 */
db63a493 SG	40	MX28_PAD_AUART0_RX__AUART0_RX \| MXS_PAD_CTRL,
	41	MX28_PAD_AUART0_TX__AUART0_TX \| MXS_PAD_CTRL,
	42	MX28_PAD_AUART0_CTS__AUART0_CTS \| MXS_PAD_CTRL,
	43	MX28_PAD_AUART0_RTS__AUART0_RTS \| MXS_PAD_CTRL,
15808182	44	/* auart3 */
db63a493 SG	45	MX28_PAD_AUART3_RX__AUART3_RX \| MXS_PAD_CTRL,
	46	MX28_PAD_AUART3_TX__AUART3_TX \| MXS_PAD_CTRL,
	47	MX28_PAD_AUART3_CTS__AUART3_CTS \| MXS_PAD_CTRL,
	48	MX28_PAD_AUART3_RTS__AUART3_RTS \| MXS_PAD_CTRL,
15808182	49
db63a493	50	#define MXS_PAD_FEC (MXS_PAD_8MA \| MXS_PAD_3V3 \| MXS_PAD_PULLUP)
4afbbb7c	51	/* fec0 */
db63a493 SG	52	MX28_PAD_ENET0_MDC__ENET0_MDC \| MXS_PAD_FEC,
	53	MX28_PAD_ENET0_MDIO__ENET0_MDIO \| MXS_PAD_FEC,
	54	MX28_PAD_ENET0_RX_EN__ENET0_RX_EN \| MXS_PAD_FEC,
	55	MX28_PAD_ENET0_RXD0__ENET0_RXD0 \| MXS_PAD_FEC,
	56	MX28_PAD_ENET0_RXD1__ENET0_RXD1 \| MXS_PAD_FEC,
	57	MX28_PAD_ENET0_TX_EN__ENET0_TX_EN \| MXS_PAD_FEC,
	58	MX28_PAD_ENET0_TXD0__ENET0_TXD0 \| MXS_PAD_FEC,
	59	MX28_PAD_ENET0_TXD1__ENET0_TXD1 \| MXS_PAD_FEC,
	60	MX28_PAD_ENET_CLK__CLKCTRL_ENET \| MXS_PAD_FEC,
48f76ed1	61	/* fec1 */
db63a493 SG	62	MX28_PAD_ENET0_CRS__ENET1_RX_EN \| MXS_PAD_FEC,
	63	MX28_PAD_ENET0_RXD2__ENET1_RXD0 \| MXS_PAD_FEC,
	64	MX28_PAD_ENET0_RXD3__ENET1_RXD1 \| MXS_PAD_FEC,
	65	MX28_PAD_ENET0_COL__ENET1_TX_EN \| MXS_PAD_FEC,
	66	MX28_PAD_ENET0_TXD2__ENET1_TXD0 \| MXS_PAD_FEC,
	67	MX28_PAD_ENET0_TXD3__ENET1_TXD1 \| MXS_PAD_FEC,
4afbbb7c	68	/* phy power line */
db63a493	69	MX28_PAD_SSP1_DATA3__GPIO_2_15 \| MXS_PAD_CTRL,
4afbbb7c	70	/* phy reset line */
db63a493	71	MX28_PAD_ENET0_RX_CLK__GPIO_4_13 \| MXS_PAD_CTRL,
4afbbb7c SG	72	};
	73
	74	/* fec */
	75	static void __init mx28evk_fec_reset(void)
	76	{
	77	int ret;
	78	struct clk *clk;
	79
	80	/* Enable fec phy clock */
	81	clk = clk_get_sys("pll2", NULL);
	82	if (!IS_ERR(clk))
	83	clk_enable(clk);
	84
	85	/* Power up fec phy */
	86	ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
	87	if (ret) {
	88	pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
	89	return;
	90	}
	91
	92	ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
	93	if (ret) {
	94	pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
	95	return;
	96	}
	97
	98	/* Reset fec phy */
	99	ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
	100	if (ret) {
	101	pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
	102	return;
	103	}
	104
	105	gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
	106	if (ret) {
	107	pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
	108	return;
	109	}
	110
	111	mdelay(1);
	112	gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
	113	}
	114
a320b279	115	static struct fec_platform_data mx28_fec_pdata[] __initdata = {
48f76ed1 SG	116	{
	117	/* fec0 */
	118	.phy = PHY_INTERFACE_MODE_RMII,
	119	}, {
	120	/* fec1 */
	121	.phy = PHY_INTERFACE_MODE_RMII,
	122	},
4afbbb7c SG	123	};
4afbbb7c SG	124
a320b279 SG	125	static int __init mx28evk_fec_get_mac(void)
	126	{
	127	int i;
	128	u32 val;
	129	const u32 *ocotp = mxs_get_ocotp();
	130
	131	if (!ocotp)
	132	goto error;
	133
	134	/*
	135	* OCOTP only stores the last 4 octets for each mac address,
	136	* so hard-code Freescale OUI (00:04:9f) here.
	137	*/
	138	for (i = 0; i < 2; i++) {
	139	val = ocotp[i * 4];
	140	mx28_fec_pdata[i].mac[0] = 0x00;
	141	mx28_fec_pdata[i].mac[1] = 0x04;
	142	mx28_fec_pdata[i].mac[2] = 0x9f;
	143	mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
	144	mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
	145	mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
	146	}
	147
	148	return 0;
	149
	150	error:
	151	pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
	152	return -ETIMEDOUT;
	153	}
	154
4afbbb7c SG	155	static void __init mx28evk_init(void)
	156	{
	157	mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
	158
	159	mx28_add_duart();
15808182 SG	160	mx28_add_auart0();
15808182 SG	161	mx28_add_auart3();
4afbbb7c	162
a320b279 SG	163	if (mx28evk_fec_get_mac())
	164	pr_warn("%s: failed on fec mac setup\n", __func__);
	165
4afbbb7c	166	mx28evk_fec_reset();
48f76ed1 SG	167	mx28_add_fec(0, &mx28_fec_pdata[0]);
48f76ed1 SG	168	mx28_add_fec(1, &mx28_fec_pdata[1]);
4afbbb7c SG	169	}
	170
	171	static void __init mx28evk_timer_init(void)
	172	{
	173	mx28_clocks_init();
	174	}
	175
	176	static struct sys_timer mx28evk_timer = {
	177	.init = mx28evk_timer_init,
	178	};
	179
	180	MACHINE_START(MX28EVK, "Freescale MX28 EVK")
	181	/* Maintainer: Freescale Semiconductor, Inc. */
	182	.map_io = mx28_map_io,
	183	.init_irq = mx28_init_irq,
	184	.init_machine = mx28evk_init,
	185	.timer = &mx28evk_timer,
	186	MACHINE_END