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ce8ffef0 SH |
1 | /* |
2 | * Copyright (C) 2008 Sascha Hauer, Pengutronix | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #include <linux/types.h> | |
20 | #include <linux/init.h> | |
21 | ||
22 | #include <linux/platform_device.h> | |
23 | #include <linux/mtd/physmap.h> | |
3dad21a9 | 24 | #include <linux/mtd/plat-ram.h> |
ce8ffef0 | 25 | #include <linux/memory.h> |
ba54b958 | 26 | #include <linux/gpio.h> |
4353318e | 27 | #include <linux/smsc911x.h> |
ba54b958 | 28 | #include <linux/interrupt.h> |
79206750 SH |
29 | #include <linux/i2c.h> |
30 | #include <linux/i2c/at24.h> | |
dddd4a49 SH |
31 | #include <linux/delay.h> |
32 | #include <linux/spi/spi.h> | |
33 | #include <linux/irq.h> | |
ce8ffef0 | 34 | |
a09e64fb | 35 | #include <mach/hardware.h> |
ce8ffef0 SH |
36 | #include <asm/mach-types.h> |
37 | #include <asm/mach/arch.h> | |
38 | #include <asm/mach/time.h> | |
39 | #include <asm/mach/map.h> | |
a09e64fb RK |
40 | #include <mach/common.h> |
41 | #include <mach/imx-uart.h> | |
42 | #include <mach/iomux-mx3.h> | |
43 | #include <mach/board-pcm037.h> | |
3287abbd | 44 | #include <mach/mxc_nand.h> |
f2cb641f | 45 | #include <mach/mmc.h> |
79206750 SH |
46 | #ifdef CONFIG_I2C_IMX |
47 | #include <mach/i2c.h> | |
48 | #endif | |
ce8ffef0 | 49 | |
5cf09421 SH |
50 | #include "devices.h" |
51 | ||
01ac7d58 SH |
52 | static unsigned int pcm037_pins[] = { |
53 | /* I2C */ | |
54 | MX31_PIN_CSPI2_MOSI__SCL, | |
55 | MX31_PIN_CSPI2_MISO__SDA, | |
56 | /* SDHC1 */ | |
57 | MX31_PIN_SD1_DATA3__SD1_DATA3, | |
58 | MX31_PIN_SD1_DATA2__SD1_DATA2, | |
59 | MX31_PIN_SD1_DATA1__SD1_DATA1, | |
60 | MX31_PIN_SD1_DATA0__SD1_DATA0, | |
61 | MX31_PIN_SD1_CLK__SD1_CLK, | |
62 | MX31_PIN_SD1_CMD__SD1_CMD, | |
63 | IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */ | |
64 | IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */ | |
65 | /* SPI1 */ | |
66 | MX31_PIN_CSPI1_MOSI__MOSI, | |
67 | MX31_PIN_CSPI1_MISO__MISO, | |
68 | MX31_PIN_CSPI1_SCLK__SCLK, | |
69 | MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, | |
70 | MX31_PIN_CSPI1_SS0__SS0, | |
71 | MX31_PIN_CSPI1_SS1__SS1, | |
72 | MX31_PIN_CSPI1_SS2__SS2, | |
73 | /* UART1 */ | |
74 | MX31_PIN_CTS1__CTS1, | |
75 | MX31_PIN_RTS1__RTS1, | |
76 | MX31_PIN_TXD1__TXD1, | |
77 | MX31_PIN_RXD1__RXD1, | |
78 | /* UART2 */ | |
79 | MX31_PIN_TXD2__TXD2, | |
80 | MX31_PIN_RXD2__RXD2, | |
81 | MX31_PIN_CTS2__CTS2, | |
82 | MX31_PIN_RTS2__RTS2, | |
83 | /* UART3 */ | |
84 | MX31_PIN_CSPI3_MOSI__RXD3, | |
85 | MX31_PIN_CSPI3_MISO__TXD3, | |
86 | MX31_PIN_CSPI3_SCLK__RTS3, | |
87 | MX31_PIN_CSPI3_SPI_RDY__CTS3, | |
88 | /* LAN9217 irq pin */ | |
89 | IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), | |
90 | /* Onewire */ | |
91 | MX31_PIN_BATT_LINE__OWIRE, | |
92 | /* Framebuffer */ | |
93 | MX31_PIN_LD0__LD0, | |
94 | MX31_PIN_LD1__LD1, | |
95 | MX31_PIN_LD2__LD2, | |
96 | MX31_PIN_LD3__LD3, | |
97 | MX31_PIN_LD4__LD4, | |
98 | MX31_PIN_LD5__LD5, | |
99 | MX31_PIN_LD6__LD6, | |
100 | MX31_PIN_LD7__LD7, | |
101 | MX31_PIN_LD8__LD8, | |
102 | MX31_PIN_LD9__LD9, | |
103 | MX31_PIN_LD10__LD10, | |
104 | MX31_PIN_LD11__LD11, | |
105 | MX31_PIN_LD12__LD12, | |
106 | MX31_PIN_LD13__LD13, | |
107 | MX31_PIN_LD14__LD14, | |
108 | MX31_PIN_LD15__LD15, | |
109 | MX31_PIN_LD16__LD16, | |
110 | MX31_PIN_LD17__LD17, | |
111 | MX31_PIN_VSYNC3__VSYNC3, | |
112 | MX31_PIN_HSYNC__HSYNC, | |
113 | MX31_PIN_FPSHIFT__FPSHIFT, | |
114 | MX31_PIN_DRDY0__DRDY0, | |
115 | MX31_PIN_D3_REV__D3_REV, | |
116 | MX31_PIN_CONTRAST__CONTRAST, | |
117 | MX31_PIN_D3_SPL__D3_SPL, | |
118 | MX31_PIN_D3_CLS__D3_CLS, | |
119 | MX31_PIN_LCS0__GPI03_23, | |
120 | }; | |
121 | ||
ce8ffef0 SH |
122 | static struct physmap_flash_data pcm037_flash_data = { |
123 | .width = 2, | |
124 | }; | |
125 | ||
126 | static struct resource pcm037_flash_resource = { | |
127 | .start = 0xa0000000, | |
128 | .end = 0xa1ffffff, | |
129 | .flags = IORESOURCE_MEM, | |
130 | }; | |
131 | ||
132 | static struct platform_device pcm037_flash = { | |
133 | .name = "physmap-flash", | |
134 | .id = 0, | |
135 | .dev = { | |
136 | .platform_data = &pcm037_flash_data, | |
137 | }, | |
138 | .resource = &pcm037_flash_resource, | |
139 | .num_resources = 1, | |
140 | }; | |
141 | ||
142 | static struct imxuart_platform_data uart_pdata = { | |
a9b06233 | 143 | .flags = IMXUART_HAVE_RTSCTS, |
ce8ffef0 SH |
144 | }; |
145 | ||
4353318e | 146 | static struct resource smsc911x_resources[] = { |
ba54b958 GL |
147 | [0] = { |
148 | .start = CS1_BASE_ADDR + 0x300, | |
149 | .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, | |
150 | .flags = IORESOURCE_MEM, | |
151 | }, | |
152 | [1] = { | |
153 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | |
154 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | |
4353318e | 155 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
ba54b958 GL |
156 | }, |
157 | }; | |
158 | ||
4353318e SG |
159 | static struct smsc911x_platform_config smsc911x_info = { |
160 | .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY | | |
161 | SMSC911X_SAVE_MAC_ADDRESS, | |
162 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
163 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | |
164 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
ba54b958 GL |
165 | }; |
166 | ||
167 | static struct platform_device pcm037_eth = { | |
4353318e | 168 | .name = "smsc911x", |
ba54b958 | 169 | .id = -1, |
4353318e SG |
170 | .num_resources = ARRAY_SIZE(smsc911x_resources), |
171 | .resource = smsc911x_resources, | |
ba54b958 | 172 | .dev = { |
4353318e | 173 | .platform_data = &smsc911x_info, |
ba54b958 GL |
174 | }, |
175 | }; | |
176 | ||
3dad21a9 SH |
177 | static struct platdata_mtd_ram pcm038_sram_data = { |
178 | .bankwidth = 2, | |
179 | }; | |
180 | ||
181 | static struct resource pcm038_sram_resource = { | |
182 | .start = CS4_BASE_ADDR, | |
183 | .end = CS4_BASE_ADDR + 512 * 1024 - 1, | |
184 | .flags = IORESOURCE_MEM, | |
185 | }; | |
186 | ||
187 | static struct platform_device pcm037_sram_device = { | |
188 | .name = "mtd-ram", | |
189 | .id = 0, | |
190 | .dev = { | |
191 | .platform_data = &pcm038_sram_data, | |
192 | }, | |
193 | .num_resources = 1, | |
194 | .resource = &pcm038_sram_resource, | |
195 | }; | |
196 | ||
3287abbd SH |
197 | static struct mxc_nand_platform_data pcm037_nand_board_info = { |
198 | .width = 1, | |
199 | .hw_ecc = 1, | |
200 | }; | |
201 | ||
79206750 | 202 | #ifdef CONFIG_I2C_IMX |
79206750 SH |
203 | static struct imxi2c_platform_data pcm037_i2c_1_data = { |
204 | .bitrate = 100000, | |
79206750 SH |
205 | }; |
206 | ||
207 | static struct at24_platform_data board_eeprom = { | |
208 | .byte_len = 4096, | |
209 | .page_size = 32, | |
210 | .flags = AT24_FLAG_ADDR16, | |
211 | }; | |
212 | ||
213 | static struct i2c_board_info pcm037_i2c_devices[] = { | |
214 | { | |
215 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ | |
216 | .platform_data = &board_eeprom, | |
217 | }, { | |
218 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), | |
219 | .type = "pcf8563", | |
220 | } | |
221 | }; | |
222 | #endif | |
223 | ||
dddd4a49 SH |
224 | /* Not connected by default */ |
225 | #ifdef PCM970_SDHC_RW_SWITCH | |
226 | static int pcm970_sdhc1_get_ro(struct device *dev) | |
f2cb641f | 227 | { |
dddd4a49 SH |
228 | return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6)); |
229 | } | |
230 | #endif | |
231 | ||
232 | static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | |
233 | void *data) | |
234 | { | |
235 | int ret; | |
236 | int gpio_det, gpio_wp; | |
237 | ||
238 | gpio_det = IOMUX_TO_GPIO(MX31_PIN_SCK6); | |
239 | gpio_wp = IOMUX_TO_GPIO(MX31_PIN_SFS6); | |
240 | ||
241 | gpio_direction_input(gpio_det); | |
242 | gpio_direction_input(gpio_wp); | |
243 | ||
244 | ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq, | |
245 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | |
246 | "sdhc-detect", data); | |
247 | return ret; | |
f2cb641f SH |
248 | } |
249 | ||
250 | static void pcm970_sdhc1_exit(struct device *dev, void *data) | |
251 | { | |
dddd4a49 | 252 | free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data); |
f2cb641f SH |
253 | } |
254 | ||
f2cb641f | 255 | static struct imxmmc_platform_data sdhc_pdata = { |
dddd4a49 SH |
256 | #ifdef PCM970_SDHC_RW_SWITCH |
257 | .get_ro = pcm970_sdhc1_get_ro, | |
258 | #endif | |
f2cb641f SH |
259 | .init = pcm970_sdhc1_init, |
260 | .exit = pcm970_sdhc1_exit, | |
261 | }; | |
262 | ||
ce8ffef0 SH |
263 | static struct platform_device *devices[] __initdata = { |
264 | &pcm037_flash, | |
ba54b958 | 265 | &pcm037_eth, |
3dad21a9 | 266 | &pcm037_sram_device, |
ce8ffef0 SH |
267 | }; |
268 | ||
269 | /* | |
270 | * Board specific initialization. | |
271 | */ | |
272 | static void __init mxc_board_init(void) | |
273 | { | |
01ac7d58 SH |
274 | mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), |
275 | "pcm037"); | |
276 | ||
ce8ffef0 SH |
277 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
278 | ||
5cf09421 | 279 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
13e9f612 | 280 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
5cf09421 | 281 | mxc_register_device(&mxc_uart_device2, &uart_pdata); |
d517cab1 | 282 | |
d517cab1 | 283 | mxc_register_device(&mxc_w1_master_device, NULL); |
ba54b958 | 284 | |
f8e5143b | 285 | /* LAN9217 IRQ pin */ |
01ac7d58 | 286 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); |
3287abbd | 287 | |
79206750 SH |
288 | #ifdef CONFIG_I2C_IMX |
289 | i2c_register_board_info(1, pcm037_i2c_devices, | |
290 | ARRAY_SIZE(pcm037_i2c_devices)); | |
291 | ||
292 | mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data); | |
293 | #endif | |
3287abbd | 294 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); |
f2cb641f | 295 | mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); |
ce8ffef0 SH |
296 | } |
297 | ||
ce8ffef0 SH |
298 | static void __init pcm037_timer_init(void) |
299 | { | |
30c730f8 | 300 | mx31_clocks_init(26000000); |
ce8ffef0 SH |
301 | } |
302 | ||
303 | struct sys_timer pcm037_timer = { | |
304 | .init = pcm037_timer_init, | |
305 | }; | |
306 | ||
307 | MACHINE_START(PCM037, "Phytec Phycore pcm037") | |
308 | /* Maintainer: Pengutronix */ | |
309 | .phys_io = AIPS1_BASE_ADDR, | |
310 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
311 | .boot_params = PHYS_OFFSET + 0x100, | |
cd4a05f9 | 312 | .map_io = mx31_map_io, |
ce8ffef0 SH |
313 | .init_irq = mxc_init_irq, |
314 | .init_machine = mxc_board_init, | |
315 | .timer = &pcm037_timer, | |
316 | MACHINE_END | |
317 |