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ce8ffef0 SH |
1 | /* |
2 | * Copyright (C) 2008 Sascha Hauer, Pengutronix | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #include <linux/types.h> | |
20 | #include <linux/init.h> | |
21 | ||
22 | #include <linux/platform_device.h> | |
23 | #include <linux/mtd/physmap.h> | |
3dad21a9 | 24 | #include <linux/mtd/plat-ram.h> |
ce8ffef0 | 25 | #include <linux/memory.h> |
ba54b958 | 26 | #include <linux/gpio.h> |
4353318e | 27 | #include <linux/smsc911x.h> |
ba54b958 | 28 | #include <linux/interrupt.h> |
79206750 SH |
29 | #include <linux/i2c.h> |
30 | #include <linux/i2c/at24.h> | |
ce8ffef0 | 31 | |
a09e64fb | 32 | #include <mach/hardware.h> |
ce8ffef0 SH |
33 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | |
35 | #include <asm/mach/time.h> | |
36 | #include <asm/mach/map.h> | |
a09e64fb RK |
37 | #include <mach/common.h> |
38 | #include <mach/imx-uart.h> | |
39 | #include <mach/iomux-mx3.h> | |
40 | #include <mach/board-pcm037.h> | |
3287abbd | 41 | #include <mach/mxc_nand.h> |
f2cb641f | 42 | #include <mach/mmc.h> |
79206750 SH |
43 | #ifdef CONFIG_I2C_IMX |
44 | #include <mach/i2c.h> | |
45 | #endif | |
ce8ffef0 | 46 | |
5cf09421 SH |
47 | #include "devices.h" |
48 | ||
ce8ffef0 SH |
49 | static struct physmap_flash_data pcm037_flash_data = { |
50 | .width = 2, | |
51 | }; | |
52 | ||
53 | static struct resource pcm037_flash_resource = { | |
54 | .start = 0xa0000000, | |
55 | .end = 0xa1ffffff, | |
56 | .flags = IORESOURCE_MEM, | |
57 | }; | |
58 | ||
59 | static struct platform_device pcm037_flash = { | |
60 | .name = "physmap-flash", | |
61 | .id = 0, | |
62 | .dev = { | |
63 | .platform_data = &pcm037_flash_data, | |
64 | }, | |
65 | .resource = &pcm037_flash_resource, | |
66 | .num_resources = 1, | |
67 | }; | |
68 | ||
69 | static struct imxuart_platform_data uart_pdata = { | |
a9b06233 | 70 | .flags = IMXUART_HAVE_RTSCTS, |
ce8ffef0 SH |
71 | }; |
72 | ||
4353318e | 73 | static struct resource smsc911x_resources[] = { |
ba54b958 GL |
74 | [0] = { |
75 | .start = CS1_BASE_ADDR + 0x300, | |
76 | .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, | |
77 | .flags = IORESOURCE_MEM, | |
78 | }, | |
79 | [1] = { | |
80 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | |
81 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), | |
4353318e | 82 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, |
ba54b958 GL |
83 | }, |
84 | }; | |
85 | ||
4353318e SG |
86 | static struct smsc911x_platform_config smsc911x_info = { |
87 | .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY | | |
88 | SMSC911X_SAVE_MAC_ADDRESS, | |
89 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
90 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | |
91 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
ba54b958 GL |
92 | }; |
93 | ||
94 | static struct platform_device pcm037_eth = { | |
4353318e | 95 | .name = "smsc911x", |
ba54b958 | 96 | .id = -1, |
4353318e SG |
97 | .num_resources = ARRAY_SIZE(smsc911x_resources), |
98 | .resource = smsc911x_resources, | |
ba54b958 | 99 | .dev = { |
4353318e | 100 | .platform_data = &smsc911x_info, |
ba54b958 GL |
101 | }, |
102 | }; | |
103 | ||
3dad21a9 SH |
104 | static struct platdata_mtd_ram pcm038_sram_data = { |
105 | .bankwidth = 2, | |
106 | }; | |
107 | ||
108 | static struct resource pcm038_sram_resource = { | |
109 | .start = CS4_BASE_ADDR, | |
110 | .end = CS4_BASE_ADDR + 512 * 1024 - 1, | |
111 | .flags = IORESOURCE_MEM, | |
112 | }; | |
113 | ||
114 | static struct platform_device pcm037_sram_device = { | |
115 | .name = "mtd-ram", | |
116 | .id = 0, | |
117 | .dev = { | |
118 | .platform_data = &pcm038_sram_data, | |
119 | }, | |
120 | .num_resources = 1, | |
121 | .resource = &pcm038_sram_resource, | |
122 | }; | |
123 | ||
3287abbd SH |
124 | static struct mxc_nand_platform_data pcm037_nand_board_info = { |
125 | .width = 1, | |
126 | .hw_ecc = 1, | |
127 | }; | |
128 | ||
79206750 SH |
129 | #ifdef CONFIG_I2C_IMX |
130 | static int i2c_1_pins[] = { | |
131 | MX31_PIN_CSPI2_MOSI__SCL, | |
132 | MX31_PIN_CSPI2_MISO__SDA, | |
133 | }; | |
134 | ||
135 | static int pcm037_i2c_1_init(struct device *dev) | |
136 | { | |
137 | return mxc_iomux_setup_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins), | |
138 | "i2c-1"); | |
139 | } | |
140 | ||
141 | static void pcm037_i2c_1_exit(struct device *dev) | |
142 | { | |
143 | mxc_iomux_release_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins)); | |
144 | } | |
145 | ||
146 | static struct imxi2c_platform_data pcm037_i2c_1_data = { | |
147 | .bitrate = 100000, | |
148 | .init = pcm037_i2c_1_init, | |
149 | .exit = pcm037_i2c_1_exit, | |
150 | }; | |
151 | ||
152 | static struct at24_platform_data board_eeprom = { | |
153 | .byte_len = 4096, | |
154 | .page_size = 32, | |
155 | .flags = AT24_FLAG_ADDR16, | |
156 | }; | |
157 | ||
158 | static struct i2c_board_info pcm037_i2c_devices[] = { | |
159 | { | |
160 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ | |
161 | .platform_data = &board_eeprom, | |
162 | }, { | |
163 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), | |
164 | .type = "pcf8563", | |
165 | } | |
166 | }; | |
167 | #endif | |
168 | ||
f2cb641f SH |
169 | static int sdhc1_pins[] = { |
170 | MX31_PIN_SD1_DATA3__SD1_DATA3, | |
171 | MX31_PIN_SD1_DATA2__SD1_DATA2, | |
172 | MX31_PIN_SD1_DATA1__SD1_DATA1, | |
173 | MX31_PIN_SD1_DATA0__SD1_DATA0, | |
174 | MX31_PIN_SD1_CLK__SD1_CLK, | |
175 | MX31_PIN_SD1_CMD__SD1_CMD, | |
176 | }; | |
177 | ||
178 | static int pcm970_sdhc1_init(struct device *dev, irq_handler_t h, void *data) | |
179 | { | |
180 | return mxc_iomux_setup_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins), | |
181 | "sdhc-1"); | |
182 | } | |
183 | ||
184 | static void pcm970_sdhc1_exit(struct device *dev, void *data) | |
185 | { | |
186 | mxc_iomux_release_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins)); | |
187 | } | |
188 | ||
189 | /* No card and rw detection at the moment */ | |
190 | static struct imxmmc_platform_data sdhc_pdata = { | |
191 | .init = pcm970_sdhc1_init, | |
192 | .exit = pcm970_sdhc1_exit, | |
193 | }; | |
194 | ||
ce8ffef0 SH |
195 | static struct platform_device *devices[] __initdata = { |
196 | &pcm037_flash, | |
ba54b958 | 197 | &pcm037_eth, |
3dad21a9 | 198 | &pcm037_sram_device, |
ce8ffef0 SH |
199 | }; |
200 | ||
bab389c8 VL |
201 | static int uart0_pins[] = { |
202 | MX31_PIN_CTS1__CTS1, | |
203 | MX31_PIN_RTS1__RTS1, | |
204 | MX31_PIN_TXD1__TXD1, | |
205 | MX31_PIN_RXD1__RXD1 | |
206 | }; | |
207 | ||
208 | static int uart2_pins[] = { | |
209 | MX31_PIN_CSPI3_MOSI__RXD3, | |
210 | MX31_PIN_CSPI3_MISO__TXD3 | |
211 | }; | |
212 | ||
ce8ffef0 SH |
213 | /* |
214 | * Board specific initialization. | |
215 | */ | |
216 | static void __init mxc_board_init(void) | |
217 | { | |
218 | platform_add_devices(devices, ARRAY_SIZE(devices)); | |
219 | ||
bab389c8 | 220 | mxc_iomux_setup_multiple_pins(uart0_pins, ARRAY_SIZE(uart0_pins), "uart-0"); |
5cf09421 | 221 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
ce8ffef0 | 222 | |
bab389c8 | 223 | mxc_iomux_setup_multiple_pins(uart2_pins, ARRAY_SIZE(uart2_pins), "uart-2"); |
5cf09421 | 224 | mxc_register_device(&mxc_uart_device2, &uart_pdata); |
d517cab1 | 225 | |
bab389c8 | 226 | mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire"); |
d517cab1 | 227 | mxc_register_device(&mxc_w1_master_device, NULL); |
ba54b958 GL |
228 | |
229 | /* SMSC9215 IRQ pin */ | |
bab389c8 VL |
230 | if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), |
231 | "pcm037-eth")) | |
ba54b958 | 232 | gpio_direction_input(MX31_PIN_GPIO3_1); |
3287abbd | 233 | |
79206750 SH |
234 | #ifdef CONFIG_I2C_IMX |
235 | i2c_register_board_info(1, pcm037_i2c_devices, | |
236 | ARRAY_SIZE(pcm037_i2c_devices)); | |
237 | ||
238 | mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data); | |
239 | #endif | |
3287abbd | 240 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); |
f2cb641f | 241 | mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); |
ce8ffef0 SH |
242 | } |
243 | ||
ce8ffef0 SH |
244 | static void __init pcm037_timer_init(void) |
245 | { | |
30c730f8 | 246 | mx31_clocks_init(26000000); |
ce8ffef0 SH |
247 | } |
248 | ||
249 | struct sys_timer pcm037_timer = { | |
250 | .init = pcm037_timer_init, | |
251 | }; | |
252 | ||
253 | MACHINE_START(PCM037, "Phytec Phycore pcm037") | |
254 | /* Maintainer: Pengutronix */ | |
255 | .phys_io = AIPS1_BASE_ADDR, | |
256 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
257 | .boot_params = PHYS_OFFSET + 0x100, | |
fb4416ad | 258 | .map_io = mxc_map_io, |
ce8ffef0 SH |
259 | .init_irq = mxc_init_irq, |
260 | .init_machine = mxc_board_init, | |
261 | .timer = &pcm037_timer, | |
262 | MACHINE_END | |
263 |