[linux-2.6-block.git] / arch / arm / mach-mx3 / mx31moboard-devboard.c

/*
 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/fsl_devices.h>

#include <linux/usb/otg.h>

#include <mach/common.h>
#include <mach/iomux-mx3.h>
#include <mach/hardware.h>
#include <mach/mmc.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>

#include "devices-imx31.h"
#include "devices.h"

static unsigned int devboard_pins[] = {
	/* UART1 */
	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
	/* SDHC2 */
	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
	/* USB H1 */
	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
	/* SEL */
	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)

static int devboard_sdhc2_get_ro(struct device *dev)
{
	return !gpio_get_value(SDHC2_WP);
}

static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
		void *data)
{
	int ret;

	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	if (ret)
		return ret;

	gpio_direction_input(SDHC2_CD);

	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	if (ret)
		goto err_gpio_free;
	gpio_direction_input(SDHC2_WP);

	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
		IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
		"sdhc2-card-detect", data);
	if (ret)
		goto err_gpio_free_2;

	return 0;

err_gpio_free_2:
	gpio_free(SDHC2_WP);
err_gpio_free:
	gpio_free(SDHC2_CD);

	return ret;
}

static void devboard_sdhc2_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(SDHC2_CD), data);
	gpio_free(SDHC2_WP);
	gpio_free(SDHC2_CD);
}

static struct imxmmc_platform_data sdhc2_pdata = {
	.get_ro	= devboard_sdhc2_get_ro,
	.init	= devboard_sdhc2_init,
	.exit	= devboard_sdhc2_exit,
};

#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)

static void devboard_init_sel_gpios(void)
{
	if (!gpio_request(SEL0, "sel0")) {
		gpio_direction_input(SEL0);
		gpio_export(SEL0, true);
	}

	if (!gpio_request(SEL1, "sel1")) {
		gpio_direction_input(SEL1);
		gpio_export(SEL1, true);
	}

	if (!gpio_request(SEL2, "sel2")) {
		gpio_direction_input(SEL2);
		gpio_export(SEL2, true);
	}

	if (!gpio_request(SEL3, "sel3")) {
		gpio_direction_input(SEL3);
		gpio_export(SEL3, true);
	}
}
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

static int devboard_usbh1_hw_init(struct platform_device *pdev)
{
	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);

	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);

	return 0;
}

#define USBH1_VBUSEN_B	IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
#define USBH1_MODE	IOMUX_TO_GPIO(MX31_PIN_NFALE)

static int devboard_isp1105_init(struct otg_transceiver *otg)
{
	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	if (ret)
		return ret;
	/* single ended */
	gpio_direction_output(USBH1_MODE, 0);

	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	if (ret) {
		gpio_free(USBH1_MODE);
		return ret;
	}
	gpio_direction_output(USBH1_VBUSEN_B, 1);

	return 0;
}


static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
{
	if (on)
		gpio_set_value(USBH1_VBUSEN_B, 0);
	else
		gpio_set_value(USBH1_VBUSEN_B, 1);

	return 0;
}

static struct mxc_usbh_platform_data usbh1_pdata = {
	.init	= devboard_usbh1_hw_init,
	.portsc	= MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
	.flags	= MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
};

static int __init devboard_usbh1_init(void)
{
	struct otg_transceiver *otg;

	otg = kzalloc(sizeof(*otg), GFP_KERNEL);
	if (!otg)
		return -ENOMEM;

	otg->label	= "ISP1105";
	otg->init	= devboard_isp1105_init;
	otg->set_vbus	= devboard_isp1105_set_vbus;

	usbh1_pdata.otg = otg;

	return mxc_register_device(&mxc_usbh1, &usbh1_pdata);
}


static struct fsl_usb2_platform_data usb_pdata = {
	.operating_mode	= FSL_USB2_DR_DEVICE,
	.phy_mode	= FSL_USB2_PHY_ULPI,
};

/*
 * system init for baseboard usage. Will be called by mx31moboard init.
 */
void __init mx31moboard_devboard_init(void)
{
	printk(KERN_INFO "Initializing mx31devboard peripherals\n");

	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
		"devboard");

	imx31_add_imx_uart1(&uart_pdata);

	mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);

	devboard_init_sel_gpios();

	mxc_register_device(&mxc_otg_udc_device, &usb_pdata);

	devboard_usbh1_init();
}
Commit	Line	Data
e00f0b4a VL	1	/*
	2	* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
e00f0b4a VL	13	*/
e00f0b4a VL	14
45b131a7	15	#include <linux/gpio.h>
e00f0b4a	16	#include <linux/init.h>
45b131a7	17	#include <linux/interrupt.h>
e00f0b4a	18	#include <linux/platform_device.h>
5a0e3ad6	19	#include <linux/slab.h>
220bbcea	20	#include <linux/types.h>
66c202ad	21	#include <linux/fsl_devices.h>
e00f0b4a	22
d67d1075 VL	23	#include <linux/usb/otg.h>
d67d1075 VL	24
e00f0b4a	25	#include <mach/common.h>
e00f0b4a	26	#include <mach/iomux-mx3.h>
220bbcea	27	#include <mach/hardware.h>
45b131a7	28	#include <mach/mmc.h>
d67d1075 VL	29	#include <mach/mxc_ehci.h>
d67d1075 VL	30	#include <mach/ulpi.h>
e00f0b4a	31
16cf5c41	32	#include "devices-imx31.h"
e00f0b4a VL	33	#include "devices.h"
e00f0b4a VL	34
220bbcea VL	35	static unsigned int devboard_pins[] = {
220bbcea VL	36	/* UART1 */
e00f0b4a VL	37	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
e00f0b4a VL	38	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
56c7a45b VL	39	/* SDHC2 */
	40	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	41	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	42	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	43	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
d67d1075 VL	44	/* USB H1 */
	45	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	46	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	47	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	48	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	49	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
e335c75c VL	50	/* SEL */
	51	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	52	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
e00f0b4a VL	53	};
e00f0b4a VL	54
16cf5c41	55	static const struct imxuart_platform_data uart_pdata __initconst = {
220bbcea VL	56	.flags = IMXUART_HAVE_RTSCTS,
	57	};
	58
45b131a7 VL	59	#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
	60	#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
	61
	62	static int devboard_sdhc2_get_ro(struct device *dev)
	63	{
563abb4b	64	return !gpio_get_value(SDHC2_WP);
45b131a7 VL	65	}
	66
	67	static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
	68	void *data)
	69	{
4f163eb8 SH	70	int ret;
	71
	72	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	73	if (ret)
	74	return ret;
	75
	76	gpio_direction_input(SDHC2_CD);
	77
	78	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	79	if (ret)
	80	goto err_gpio_free;
	81	gpio_direction_input(SDHC2_WP);
	82
	83	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
45b131a7 VL	84	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
45b131a7 VL	85	"sdhc2-card-detect", data);
4f163eb8 SH	86	if (ret)
	87	goto err_gpio_free_2;
	88
	89	return 0;
	90
	91	err_gpio_free_2:
	92	gpio_free(SDHC2_WP);
	93	err_gpio_free:
	94	gpio_free(SDHC2_CD);
	95
	96	return ret;
45b131a7 VL	97	}
	98
	99	static void devboard_sdhc2_exit(struct device dev, void data)
	100	{
	101	free_irq(gpio_to_irq(SDHC2_CD), data);
4f163eb8 SH	102	gpio_free(SDHC2_WP);
4f163eb8 SH	103	gpio_free(SDHC2_CD);
45b131a7 VL	104	}
	105
	106	static struct imxmmc_platform_data sdhc2_pdata = {
	107	.get_ro = devboard_sdhc2_get_ro,
	108	.init = devboard_sdhc2_init,
	109	.exit = devboard_sdhc2_exit,
	110	};
	111
e335c75c VL	112	#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
	113	#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
	114	#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
	115	#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
	116
	117	static void devboard_init_sel_gpios(void)
	118	{
	119	if (!gpio_request(SEL0, "sel0")) {
	120	gpio_direction_input(SEL0);
	121	gpio_export(SEL0, true);
	122	}
	123
	124	if (!gpio_request(SEL1, "sel1")) {
	125	gpio_direction_input(SEL1);
	126	gpio_export(SEL1, true);
	127	}
	128
	129	if (!gpio_request(SEL2, "sel2")) {
	130	gpio_direction_input(SEL2);
	131	gpio_export(SEL2, true);
	132	}
	133
	134	if (!gpio_request(SEL3, "sel3")) {
	135	gpio_direction_input(SEL3);
	136	gpio_export(SEL3, true);
	137	}
	138	}
d67d1075 VL	139	#define USB_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	140	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	141
	142	static int devboard_usbh1_hw_init(struct platform_device *pdev)
	143	{
	144	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
	145
	146	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	147	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	148	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	149	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	150	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	151	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	152	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	153	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
	154
	155	return 0;
	156	}
	157
	158	#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
	159	#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
	160
	161	static int devboard_isp1105_init(struct otg_transceiver *otg)
	162	{
	163	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	164	if (ret)
	165	return ret;
	166	/* single ended */
	167	gpio_direction_output(USBH1_MODE, 0);
	168
	169	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	170	if (ret) {
	171	gpio_free(USBH1_MODE);
	172	return ret;
	173	}
	174	gpio_direction_output(USBH1_VBUSEN_B, 1);
	175
	176	return 0;
	177	}
	178
	179
	180	static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
	181	{
	182	if (on)
	183	gpio_set_value(USBH1_VBUSEN_B, 0);
	184	else
	185	gpio_set_value(USBH1_VBUSEN_B, 1);
	186
	187	return 0;
	188	}
	189
	190	static struct mxc_usbh_platform_data usbh1_pdata = {
	191	.init = devboard_usbh1_hw_init,
	192	.portsc = MXC_EHCI_MODE_UTMI \| MXC_EHCI_SERIAL,
	193	.flags = MXC_EHCI_POWER_PINS_ENABLED \| MXC_EHCI_INTERFACE_SINGLE_UNI,
	194	};
	195
	196	static int __init devboard_usbh1_init(void)
	197	{
	198	struct otg_transceiver *otg;
	199
	200	otg = kzalloc(sizeof(*otg), GFP_KERNEL);
	201	if (!otg)
	202	return -ENOMEM;
203
204	otg->label = "ISP1105";
205	otg->init = devboard_isp1105_init;
206	otg->set_vbus = devboard_isp1105_set_vbus;
207
208	usbh1_pdata.otg = otg;
209
4c21186b	210	return mxc_register_device(&mxc_usbh1, &usbh1_pdata);
d67d1075 VL	211	}
d67d1075 VL	212
66c202ad PR	213
	214	static struct fsl_usb2_platform_data usb_pdata = {
	215	.operating_mode = FSL_USB2_DR_DEVICE,
	216	.phy_mode = FSL_USB2_PHY_ULPI,
	217	};
	218
e00f0b4a VL	219	/*
	220	* system init for baseboard usage. Will be called by mx31moboard init.
	221	*/
	222	void __init mx31moboard_devboard_init(void)
	223	{
	224	printk(KERN_INFO "Initializing mx31devboard peripherals\n");
220bbcea VL	225
	226	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
	227	"devboard");
	228
16cf5c41	229	imx31_add_imx_uart1(&uart_pdata);
45b131a7 VL	230
45b131a7 VL	231	mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata);
d67d1075	232
e335c75c VL	233	devboard_init_sel_gpios();
e335c75c VL	234
66c202ad PR	235	mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
66c202ad PR	236
d67d1075	237	devboard_usbh1_init();
e00f0b4a	238	}