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5e9145ed AP |
1 | /* |
2 | * armadillo5x0.c | |
3 | * | |
4 | * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com> | |
5 | * updates in http://alberdroid.blogspot.com/ | |
6 | * | |
7 | * Based on Atmark Techno, Inc. armadillo 500 BSP 2008 | |
8 | * Based on mx31ads.c and pcm037.c Great Work! | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
23 | * MA 02110-1301, USA. | |
24 | */ | |
25 | ||
26 | #include <linux/types.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/clk.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/gpio.h> | |
31 | #include <linux/smsc911x.h> | |
32 | #include <linux/interrupt.h> | |
33 | #include <linux/irq.h> | |
c3a9c7f5 | 34 | #include <linux/mtd/physmap.h> |
0c8bad6a | 35 | #include <linux/io.h> |
e33c049c AP |
36 | #include <linux/input.h> |
37 | #include <linux/gpio_keys.h> | |
2097abcb | 38 | #include <linux/i2c.h> |
5e9145ed AP |
39 | |
40 | #include <mach/hardware.h> | |
41 | #include <asm/mach-types.h> | |
42 | #include <asm/mach/arch.h> | |
43 | #include <asm/mach/time.h> | |
44 | #include <asm/memory.h> | |
45 | #include <asm/mach/map.h> | |
46 | ||
47 | #include <mach/common.h> | |
48 | #include <mach/imx-uart.h> | |
49 | #include <mach/iomux-mx3.h> | |
50 | #include <mach/board-armadillo5x0.h> | |
51 | #include <mach/mmc.h> | |
52 | #include <mach/ipu.h> | |
53 | #include <mach/mx3fb.h> | |
0c8bad6a | 54 | #include <mach/mxc_nand.h> |
5e9145ed AP |
55 | |
56 | #include "devices.h" | |
0c8bad6a | 57 | #include "crm_regs.h" |
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58 | |
59 | static int armadillo5x0_pins[] = { | |
60 | /* UART1 */ | |
61 | MX31_PIN_CTS1__CTS1, | |
62 | MX31_PIN_RTS1__RTS1, | |
63 | MX31_PIN_TXD1__TXD1, | |
64 | MX31_PIN_RXD1__RXD1, | |
65 | /* UART2 */ | |
66 | MX31_PIN_CTS2__CTS2, | |
67 | MX31_PIN_RTS2__RTS2, | |
68 | MX31_PIN_TXD2__TXD2, | |
69 | MX31_PIN_RXD2__RXD2, | |
70 | /* LAN9118_IRQ */ | |
71 | IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO), | |
72 | /* SDHC1 */ | |
73 | MX31_PIN_SD1_DATA3__SD1_DATA3, | |
74 | MX31_PIN_SD1_DATA2__SD1_DATA2, | |
75 | MX31_PIN_SD1_DATA1__SD1_DATA1, | |
76 | MX31_PIN_SD1_DATA0__SD1_DATA0, | |
77 | MX31_PIN_SD1_CLK__SD1_CLK, | |
78 | MX31_PIN_SD1_CMD__SD1_CMD, | |
79 | /* Framebuffer */ | |
80 | MX31_PIN_LD0__LD0, | |
81 | MX31_PIN_LD1__LD1, | |
82 | MX31_PIN_LD2__LD2, | |
83 | MX31_PIN_LD3__LD3, | |
84 | MX31_PIN_LD4__LD4, | |
85 | MX31_PIN_LD5__LD5, | |
86 | MX31_PIN_LD6__LD6, | |
87 | MX31_PIN_LD7__LD7, | |
88 | MX31_PIN_LD8__LD8, | |
89 | MX31_PIN_LD9__LD9, | |
90 | MX31_PIN_LD10__LD10, | |
91 | MX31_PIN_LD11__LD11, | |
92 | MX31_PIN_LD12__LD12, | |
93 | MX31_PIN_LD13__LD13, | |
94 | MX31_PIN_LD14__LD14, | |
95 | MX31_PIN_LD15__LD15, | |
96 | MX31_PIN_LD16__LD16, | |
97 | MX31_PIN_LD17__LD17, | |
98 | MX31_PIN_VSYNC3__VSYNC3, | |
99 | MX31_PIN_HSYNC__HSYNC, | |
100 | MX31_PIN_FPSHIFT__FPSHIFT, | |
101 | MX31_PIN_DRDY0__DRDY0, | |
102 | IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/ | |
e9a6c5d0 AP |
103 | /* I2C2 */ |
104 | MX31_PIN_CSPI2_MOSI__SCL, | |
105 | MX31_PIN_CSPI2_MISO__SDA, | |
0c8bad6a | 106 | }; |
e9a6c5d0 | 107 | |
2097abcb AP |
108 | /* RTC over I2C*/ |
109 | #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) | |
110 | ||
111 | static struct i2c_board_info armadillo5x0_i2c_rtc = { | |
112 | I2C_BOARD_INFO("s35390a", 0x30), | |
113 | }; | |
114 | ||
e33c049c AP |
115 | /* GPIO BUTTONS */ |
116 | static struct gpio_keys_button armadillo5x0_buttons[] = { | |
117 | { | |
118 | .code = KEY_ENTER, /*28*/ | |
119 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0), | |
120 | .active_low = 1, | |
121 | .desc = "menu", | |
122 | .wakeup = 1, | |
123 | }, { | |
124 | .code = KEY_BACK, /*158*/ | |
125 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0), | |
126 | .active_low = 1, | |
127 | .desc = "back", | |
128 | .wakeup = 1, | |
129 | } | |
130 | }; | |
131 | ||
132 | static struct gpio_keys_platform_data armadillo5x0_button_data = { | |
133 | .buttons = armadillo5x0_buttons, | |
134 | .nbuttons = ARRAY_SIZE(armadillo5x0_buttons), | |
135 | }; | |
136 | ||
137 | static struct platform_device armadillo5x0_button_device = { | |
138 | .name = "gpio-keys", | |
139 | .id = -1, | |
140 | .num_resources = 0, | |
141 | .dev = { | |
142 | .platform_data = &armadillo5x0_button_data, | |
143 | } | |
144 | }; | |
5e9145ed | 145 | |
0c8bad6a AP |
146 | /* |
147 | * NAND Flash | |
148 | */ | |
149 | static struct mxc_nand_platform_data armadillo5x0_nand_flash_pdata = { | |
150 | .width = 1, | |
151 | .hw_ecc = 1, | |
5e9145ed AP |
152 | }; |
153 | ||
c3a9c7f5 AP |
154 | /* |
155 | * MTD NOR Flash | |
156 | */ | |
157 | static struct mtd_partition armadillo5x0_nor_flash_partitions[] = { | |
158 | { | |
159 | .name = "nor.bootloader", | |
160 | .offset = 0x00000000, | |
161 | .size = 4*32*1024, | |
162 | }, { | |
163 | .name = "nor.kernel", | |
164 | .offset = MTDPART_OFS_APPEND, | |
165 | .size = 16*128*1024, | |
166 | }, { | |
167 | .name = "nor.userland", | |
168 | .offset = MTDPART_OFS_APPEND, | |
169 | .size = 110*128*1024, | |
170 | }, { | |
171 | .name = "nor.config", | |
172 | .offset = MTDPART_OFS_APPEND, | |
173 | .size = 1*128*1024, | |
174 | }, | |
175 | }; | |
176 | ||
177 | static struct physmap_flash_data armadillo5x0_nor_flash_pdata = { | |
178 | .width = 2, | |
179 | .parts = armadillo5x0_nor_flash_partitions, | |
180 | .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions), | |
181 | }; | |
182 | ||
183 | static struct resource armadillo5x0_nor_flash_resource = { | |
184 | .flags = IORESOURCE_MEM, | |
f568dd7f UKK |
185 | .start = MX31_CS0_BASE_ADDR, |
186 | .end = MX31_CS0_BASE_ADDR + SZ_64M - 1, | |
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187 | }; |
188 | ||
189 | static struct platform_device armadillo5x0_nor_flash = { | |
190 | .name = "physmap-flash", | |
191 | .id = -1, | |
192 | .num_resources = 1, | |
193 | .resource = &armadillo5x0_nor_flash_resource, | |
194 | }; | |
195 | ||
5e9145ed AP |
196 | /* |
197 | * FB support | |
198 | */ | |
199 | static const struct fb_videomode fb_modedb[] = { | |
200 | { /* 640x480 @ 60 Hz */ | |
201 | .name = "CRT-VGA", | |
202 | .refresh = 60, | |
203 | .xres = 640, | |
204 | .yres = 480, | |
205 | .pixclock = 39721, | |
206 | .left_margin = 35, | |
207 | .right_margin = 115, | |
208 | .upper_margin = 43, | |
209 | .lower_margin = 1, | |
210 | .hsync_len = 10, | |
211 | .vsync_len = 1, | |
212 | .sync = FB_SYNC_OE_ACT_HIGH, | |
213 | .vmode = FB_VMODE_NONINTERLACED, | |
214 | .flag = 0, | |
215 | }, {/* 800x600 @ 56 Hz */ | |
216 | .name = "CRT-SVGA", | |
217 | .refresh = 56, | |
218 | .xres = 800, | |
219 | .yres = 600, | |
220 | .pixclock = 30000, | |
221 | .left_margin = 30, | |
222 | .right_margin = 108, | |
223 | .upper_margin = 13, | |
224 | .lower_margin = 10, | |
225 | .hsync_len = 10, | |
226 | .vsync_len = 1, | |
227 | .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT | | |
228 | FB_SYNC_VERT_HIGH_ACT, | |
229 | .vmode = FB_VMODE_NONINTERLACED, | |
230 | .flag = 0, | |
231 | }, | |
232 | }; | |
233 | ||
234 | static struct ipu_platform_data mx3_ipu_data = { | |
235 | .irq_base = MXC_IPU_IRQ_START, | |
236 | }; | |
237 | ||
238 | static struct mx3fb_platform_data mx3fb_pdata = { | |
239 | .dma_dev = &mx3_ipu.dev, | |
240 | .name = "CRT-VGA", | |
241 | .mode = fb_modedb, | |
242 | .num_modes = ARRAY_SIZE(fb_modedb), | |
243 | }; | |
244 | ||
245 | /* | |
246 | * SDHC 1 | |
247 | * MMC support | |
248 | */ | |
249 | static int armadillo5x0_sdhc1_get_ro(struct device *dev) | |
250 | { | |
251 | return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B)); | |
252 | } | |
253 | ||
254 | static int armadillo5x0_sdhc1_init(struct device *dev, | |
255 | irq_handler_t detect_irq, void *data) | |
256 | { | |
257 | int ret; | |
258 | int gpio_det, gpio_wp; | |
259 | ||
260 | gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK); | |
261 | gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B); | |
262 | ||
263 | ret = gpio_request(gpio_det, "sdhc-card-detect"); | |
264 | if (ret) | |
265 | return ret; | |
266 | ||
267 | gpio_direction_input(gpio_det); | |
268 | ||
269 | ret = gpio_request(gpio_wp, "sdhc-write-protect"); | |
270 | if (ret) | |
271 | goto err_gpio_free; | |
272 | ||
273 | gpio_direction_input(gpio_wp); | |
274 | ||
275 | /* When supported the trigger type have to be BOTH */ | |
276 | ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq, | |
277 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | |
278 | "sdhc-detect", data); | |
279 | ||
280 | if (ret) | |
281 | goto err_gpio_free_2; | |
282 | ||
283 | return 0; | |
284 | ||
285 | err_gpio_free_2: | |
286 | gpio_free(gpio_wp); | |
287 | ||
288 | err_gpio_free: | |
289 | gpio_free(gpio_det); | |
290 | ||
291 | return ret; | |
292 | ||
293 | } | |
294 | ||
295 | static void armadillo5x0_sdhc1_exit(struct device *dev, void *data) | |
296 | { | |
297 | free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data); | |
298 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)); | |
299 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B)); | |
300 | } | |
301 | ||
302 | static struct imxmmc_platform_data sdhc_pdata = { | |
303 | .get_ro = armadillo5x0_sdhc1_get_ro, | |
304 | .init = armadillo5x0_sdhc1_init, | |
305 | .exit = armadillo5x0_sdhc1_exit, | |
306 | }; | |
307 | ||
308 | /* | |
309 | * SMSC 9118 | |
310 | * Network support | |
311 | */ | |
312 | static struct resource armadillo5x0_smc911x_resources[] = { | |
313 | { | |
f568dd7f UKK |
314 | .start = MX31_CS3_BASE_ADDR, |
315 | .end = MX31_CS3_BASE_ADDR + SZ_32M - 1, | |
5e9145ed AP |
316 | .flags = IORESOURCE_MEM, |
317 | }, { | |
318 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0), | |
319 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0), | |
320 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
321 | }, | |
322 | }; | |
323 | ||
324 | static struct smsc911x_platform_config smsc911x_info = { | |
07299ca3 | 325 | .flags = SMSC911X_USE_16BIT, |
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326 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
327 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
328 | }; | |
329 | ||
330 | static struct platform_device armadillo5x0_smc911x_device = { | |
331 | .name = "smsc911x", | |
332 | .id = -1, | |
333 | .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources), | |
334 | .resource = armadillo5x0_smc911x_resources, | |
335 | .dev = { | |
336 | .platform_data = &smsc911x_info, | |
337 | }, | |
338 | }; | |
339 | ||
340 | /* UART device data */ | |
341 | static struct imxuart_platform_data uart_pdata = { | |
342 | .flags = IMXUART_HAVE_RTSCTS, | |
343 | }; | |
344 | ||
345 | static struct platform_device *devices[] __initdata = { | |
346 | &armadillo5x0_smc911x_device, | |
e9a6c5d0 | 347 | &mxc_i2c_device1, |
e33c049c | 348 | &armadillo5x0_button_device, |
5e9145ed AP |
349 | }; |
350 | ||
351 | /* | |
352 | * Perform board specific initializations | |
353 | */ | |
354 | static void __init armadillo5x0_init(void) | |
355 | { | |
356 | mxc_iomux_setup_multiple_pins(armadillo5x0_pins, | |
357 | ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); | |
358 | ||
359 | platform_add_devices(devices, ARRAY_SIZE(devices)); | |
360 | ||
361 | /* Register UART */ | |
362 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | |
363 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | |
364 | ||
365 | /* SMSC9118 IRQ pin */ | |
366 | gpio_direction_input(MX31_PIN_GPIO1_0); | |
367 | ||
368 | /* Register SDHC */ | |
369 | mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); | |
370 | ||
371 | /* Register FB */ | |
372 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); | |
373 | mxc_register_device(&mx3_fb, &mx3fb_pdata); | |
c3a9c7f5 AP |
374 | |
375 | /* Register NOR Flash */ | |
376 | mxc_register_device(&armadillo5x0_nor_flash, | |
377 | &armadillo5x0_nor_flash_pdata); | |
0c8bad6a AP |
378 | |
379 | /* Register NAND Flash */ | |
380 | mxc_register_device(&mxc_nand_device, &armadillo5x0_nand_flash_pdata); | |
381 | ||
382 | /* set NAND page size to 2k if not configured via boot mode pins */ | |
383 | __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); | |
2097abcb AP |
384 | |
385 | /* RTC */ | |
386 | /* Get RTC IRQ and register the chip */ | |
387 | if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) { | |
388 | if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0) | |
389 | armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO); | |
390 | else | |
391 | gpio_free(ARMADILLO5X0_RTC_GPIO); | |
392 | } | |
393 | if (armadillo5x0_i2c_rtc.irq == 0) | |
394 | pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); | |
395 | i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); | |
5e9145ed AP |
396 | } |
397 | ||
5e9145ed AP |
398 | static void __init armadillo5x0_timer_init(void) |
399 | { | |
400 | mx31_clocks_init(26000000); | |
401 | } | |
402 | ||
403 | static struct sys_timer armadillo5x0_timer = { | |
404 | .init = armadillo5x0_timer_init, | |
405 | }; | |
406 | ||
407 | MACHINE_START(ARMADILLO5X0, "Armadillo-500") | |
408 | /* Maintainer: Alberto Panizzo */ | |
f568dd7f UKK |
409 | .phys_io = MX31_AIPS1_BASE_ADDR, |
410 | .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | |
5e9145ed | 411 | .boot_params = PHYS_OFFSET + 0x00000100, |
4e0f0881 | 412 | .map_io = mx31_map_io, |
c5aa0ad0 | 413 | .init_irq = mx31_init_irq, |
5e9145ed AP |
414 | .timer = &armadillo5x0_timer, |
415 | .init_machine = armadillo5x0_init, | |
416 | MACHINE_END |