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cfca8b53 PZ |
1 | /* |
2 | * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * Copyright 2008 Sascha Hauer, kernel@pengutronix.de | |
4 | * Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> | |
219fed75 | 5 | * Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt> |
cfca8b53 PZ |
6 | * |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version 2 | |
10 | * of the License, or (at your option) any later version. | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, | |
19 | * Boston, MA 02110-1301, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/init.h> | |
05a3185c | 24 | #include <linux/dma-mapping.h> |
cfca8b53 PZ |
25 | #include <linux/platform_device.h> |
26 | #include <linux/gpio.h> | |
ccfe30a7 | 27 | #include <mach/irqs.h> |
cfca8b53 PZ |
28 | #include <mach/hardware.h> |
29 | ||
87bbb197 SH |
30 | #include "devices.h" |
31 | ||
68a9c5ba | 32 | static struct resource imx1_camera_resources[] = { |
9b0e6db0 | 33 | { |
219fed75 DA |
34 | .start = 0x00224000, |
35 | .end = 0x00224010, | |
36 | .flags = IORESOURCE_MEM, | |
9b0e6db0 | 37 | }, { |
05a3185c UKK |
38 | .start = MX1_CSI_INT, |
39 | .end = MX1_CSI_INT, | |
219fed75 DA |
40 | .flags = IORESOURCE_IRQ, |
41 | }, | |
42 | }; | |
43 | ||
68a9c5ba | 44 | static u64 imx1_camera_dmamask = DMA_BIT_MASK(32); |
219fed75 | 45 | |
68a9c5ba | 46 | struct platform_device imx1_camera_device = { |
6acc81c3 | 47 | .name = "mx1-camera", |
219fed75 DA |
48 | .id = 0, /* This is used to put cameras on this interface */ |
49 | .dev = { | |
68a9c5ba | 50 | .dma_mask = &imx1_camera_dmamask, |
05a3185c | 51 | .coherent_dma_mask = DMA_BIT_MASK(32), |
219fed75 | 52 | }, |
68a9c5ba UKK |
53 | .resource = imx1_camera_resources, |
54 | .num_resources = ARRAY_SIZE(imx1_camera_resources), | |
219fed75 DA |
55 | }; |
56 | ||
57 | static struct resource imx_i2c_resources[] = { | |
9b0e6db0 | 58 | { |
219fed75 DA |
59 | .start = 0x00217000, |
60 | .end = 0x00217010, | |
61 | .flags = IORESOURCE_MEM, | |
9b0e6db0 | 62 | }, { |
05a3185c UKK |
63 | .start = MX1_I2C_INT, |
64 | .end = MX1_I2C_INT, | |
219fed75 DA |
65 | .flags = IORESOURCE_IRQ, |
66 | }, | |
67 | }; | |
68 | ||
69 | struct platform_device imx_i2c_device = { | |
70 | .name = "imx-i2c", | |
71 | .id = 0, | |
72 | .resource = imx_i2c_resources, | |
73 | .num_resources = ARRAY_SIZE(imx_i2c_resources), | |
74 | }; | |
75 | ||
cfca8b53 | 76 | static struct resource imx_uart1_resources[] = { |
9b0e6db0 | 77 | { |
05a3185c UKK |
78 | .start = MX1_UART1_BASE_ADDR, |
79 | .end = MX1_UART1_BASE_ADDR + 0xD0, | |
80 | .flags = IORESOURCE_MEM, | |
9b0e6db0 | 81 | }, { |
05a3185c UKK |
82 | .start = MX1_UART1_MINT_RX, |
83 | .end = MX1_UART1_MINT_RX, | |
84 | .flags = IORESOURCE_IRQ, | |
9b0e6db0 | 85 | }, { |
05a3185c UKK |
86 | .start = MX1_UART1_MINT_TX, |
87 | .end = MX1_UART1_MINT_TX, | |
88 | .flags = IORESOURCE_IRQ, | |
9b0e6db0 | 89 | }, { |
05a3185c UKK |
90 | .start = MX1_UART1_MINT_RTS, |
91 | .end = MX1_UART1_MINT_RTS, | |
92 | .flags = IORESOURCE_IRQ, | |
cfca8b53 PZ |
93 | }, |
94 | }; | |
95 | ||
96 | struct platform_device imx_uart1_device = { | |
97 | .name = "imx-uart", | |
98 | .id = 0, | |
99 | .num_resources = ARRAY_SIZE(imx_uart1_resources), | |
100 | .resource = imx_uart1_resources, | |
101 | }; | |
102 | ||
103 | static struct resource imx_uart2_resources[] = { | |
9b0e6db0 | 104 | { |
05a3185c UKK |
105 | .start = MX1_UART2_BASE_ADDR, |
106 | .end = MX1_UART2_BASE_ADDR + 0xD0, | |
107 | .flags = IORESOURCE_MEM, | |
9b0e6db0 | 108 | }, { |
05a3185c UKK |
109 | .start = MX1_UART2_MINT_RX, |
110 | .end = MX1_UART2_MINT_RX, | |
111 | .flags = IORESOURCE_IRQ, | |
9b0e6db0 | 112 | }, { |
05a3185c UKK |
113 | .start = MX1_UART2_MINT_TX, |
114 | .end = MX1_UART2_MINT_TX, | |
115 | .flags = IORESOURCE_IRQ, | |
9b0e6db0 | 116 | }, { |
05a3185c UKK |
117 | .start = MX1_UART2_MINT_RTS, |
118 | .end = MX1_UART2_MINT_RTS, | |
119 | .flags = IORESOURCE_IRQ, | |
cfca8b53 PZ |
120 | }, |
121 | }; | |
122 | ||
123 | struct platform_device imx_uart2_device = { | |
124 | .name = "imx-uart", | |
125 | .id = 1, | |
126 | .num_resources = ARRAY_SIZE(imx_uart2_resources), | |
127 | .resource = imx_uart2_resources, | |
128 | }; | |
129 | ||
219fed75 | 130 | static struct resource imx_rtc_resources[] = { |
9b0e6db0 | 131 | { |
219fed75 DA |
132 | .start = 0x00204000, |
133 | .end = 0x00204024, | |
134 | .flags = IORESOURCE_MEM, | |
9b0e6db0 | 135 | }, { |
05a3185c UKK |
136 | .start = MX1_RTC_INT, |
137 | .end = MX1_RTC_INT, | |
219fed75 | 138 | .flags = IORESOURCE_IRQ, |
9b0e6db0 | 139 | }, { |
05a3185c UKK |
140 | .start = MX1_RTC_SAMINT, |
141 | .end = MX1_RTC_SAMINT, | |
219fed75 DA |
142 | .flags = IORESOURCE_IRQ, |
143 | }, | |
144 | }; | |
145 | ||
146 | struct platform_device imx_rtc_device = { | |
147 | .name = "rtc-imx", | |
148 | .id = 0, | |
149 | .resource = imx_rtc_resources, | |
150 | .num_resources = ARRAY_SIZE(imx_rtc_resources), | |
151 | }; | |
152 | ||
153 | static struct resource imx_wdt_resources[] = { | |
9b0e6db0 | 154 | { |
219fed75 DA |
155 | .start = 0x00201000, |
156 | .end = 0x00201008, | |
157 | .flags = IORESOURCE_MEM, | |
9b0e6db0 | 158 | }, { |
05a3185c UKK |
159 | .start = MX1_WDT_INT, |
160 | .end = MX1_WDT_INT, | |
219fed75 DA |
161 | .flags = IORESOURCE_IRQ, |
162 | }, | |
163 | }; | |
164 | ||
165 | struct platform_device imx_wdt_device = { | |
166 | .name = "imx-wdt", | |
167 | .id = 0, | |
168 | .resource = imx_wdt_resources, | |
169 | .num_resources = ARRAY_SIZE(imx_wdt_resources), | |
170 | }; | |
171 | ||
172 | static struct resource imx_usb_resources[] = { | |
9b0e6db0 | 173 | { |
219fed75 DA |
174 | .start = 0x00212000, |
175 | .end = 0x00212148, | |
176 | .flags = IORESOURCE_MEM, | |
9b0e6db0 | 177 | }, { |
05a3185c UKK |
178 | .start = MX1_USBD_INT0, |
179 | .end = MX1_USBD_INT0, | |
219fed75 | 180 | .flags = IORESOURCE_IRQ, |
9b0e6db0 | 181 | }, { |
05a3185c UKK |
182 | .start = MX1_USBD_INT1, |
183 | .end = MX1_USBD_INT1, | |
219fed75 | 184 | .flags = IORESOURCE_IRQ, |
9b0e6db0 | 185 | }, { |
05a3185c UKK |
186 | .start = MX1_USBD_INT2, |
187 | .end = MX1_USBD_INT2, | |
219fed75 | 188 | .flags = IORESOURCE_IRQ, |
9b0e6db0 | 189 | }, { |
05a3185c UKK |
190 | .start = MX1_USBD_INT3, |
191 | .end = MX1_USBD_INT3, | |
219fed75 | 192 | .flags = IORESOURCE_IRQ, |
9b0e6db0 | 193 | }, { |
05a3185c UKK |
194 | .start = MX1_USBD_INT4, |
195 | .end = MX1_USBD_INT4, | |
219fed75 | 196 | .flags = IORESOURCE_IRQ, |
9b0e6db0 | 197 | }, { |
05a3185c UKK |
198 | .start = MX1_USBD_INT5, |
199 | .end = MX1_USBD_INT5, | |
219fed75 | 200 | .flags = IORESOURCE_IRQ, |
9b0e6db0 | 201 | }, { |
05a3185c UKK |
202 | .start = MX1_USBD_INT6, |
203 | .end = MX1_USBD_INT6, | |
219fed75 DA |
204 | .flags = IORESOURCE_IRQ, |
205 | }, | |
206 | }; | |
207 | ||
208 | struct platform_device imx_usb_device = { | |
209 | .name = "imx_udc", | |
210 | .id = 0, | |
211 | .num_resources = ARRAY_SIZE(imx_usb_resources), | |
212 | .resource = imx_usb_resources, | |
213 | }; | |
214 | ||
cfca8b53 PZ |
215 | /* GPIO port description */ |
216 | static struct mxc_gpio_port imx_gpio_ports[] = { | |
9b0e6db0 | 217 | { |
cfca8b53 | 218 | .chip.label = "gpio-0", |
05a3185c UKK |
219 | .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR), |
220 | .irq = MX1_GPIO_INT_PORTA, | |
9b0e6db0 SH |
221 | .virtual_irq_start = MXC_GPIO_IRQ_START, |
222 | }, { | |
cfca8b53 | 223 | .chip.label = "gpio-1", |
05a3185c UKK |
224 | .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100), |
225 | .irq = MX1_GPIO_INT_PORTB, | |
9b0e6db0 SH |
226 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, |
227 | }, { | |
cfca8b53 | 228 | .chip.label = "gpio-2", |
05a3185c UKK |
229 | .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200), |
230 | .irq = MX1_GPIO_INT_PORTC, | |
9b0e6db0 SH |
231 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64, |
232 | }, { | |
cfca8b53 | 233 | .chip.label = "gpio-3", |
05a3185c UKK |
234 | .base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300), |
235 | .irq = MX1_GPIO_INT_PORTD, | |
9b0e6db0 | 236 | .virtual_irq_start = MXC_GPIO_IRQ_START + 96, |
cfca8b53 PZ |
237 | } |
238 | }; | |
239 | ||
9a763bfb | 240 | int __init imx1_register_gpios(void) |
cfca8b53 PZ |
241 | { |
242 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); | |
243 | } |