projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 7444dad2 GC |
1 | /* |
| 2 | * Power Management Service Unit(PMSU) support for Armada 370/XP platforms. | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Marvell | |
| 5 | * | |
| 6 | * Yehuda Yitschak <yehuday@marvell.com> | |
| 7 | * Gregory Clement <gregory.clement@free-electrons.com> | |
| 8 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 9 | * | |
| 10 | * This file is licensed under the terms of the GNU General Public | |
| 11 | * License version 2. This program is licensed "as is" without any | |
| 12 | * warranty of any kind, whether express or implied. | |
| 13 | * | |
| 14 | * The Armada 370 and Armada XP SOCs have a power management service | |
| 15 | * unit which is responsible for powering down and waking up CPUs and | |
| 16 | * other SOC units | |
| 17 | */ | |
| 18 | ||
| 19 | #include <linux/kernel.h> | |
| 20 | #include <linux/init.h> | |
| 21 | #include <linux/of_address.h> | |
| 22 | #include <linux/io.h> | |
| 23 | #include <linux/smp.h> | |
| 24 | #include <asm/smp_plat.h> | |
| b12634e3 | 25 | #include "pmsu.h" |
| 7444dad2 GC |
26 | |
| 27 | static void __iomem *pmsu_mp_base; | |
| 28 | static void __iomem *pmsu_reset_base; | |
| 29 | ||
| 30 | #define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x24) | |
| 31 | #define PMSU_RESET_CTL_OFFSET(cpu) (cpu * 0x8) | |
| 32 | ||
| 33 | static struct of_device_id of_pmsu_table[] = { | |
| 34 | {.compatible = "marvell,armada-370-xp-pmsu"}, | |
| 35 | { /* end of list */ }, | |
| 36 | }; | |
| 37 | ||
| 38 | #ifdef CONFIG_SMP | |
| 39 | int armada_xp_boot_cpu(unsigned int cpu_id, void *boot_addr) | |
| 40 | { | |
| 41 | int reg, hw_cpu; | |
| 42 | ||
| 43 | if (!pmsu_mp_base || !pmsu_reset_base) { | |
| 44 | pr_warn("Can't boot CPU. PMSU is uninitialized\n"); | |
| 45 | return 1; | |
| 46 | } | |
| 47 | ||
| 48 | hw_cpu = cpu_logical_map(cpu_id); | |
| 49 | ||
| 50 | writel(virt_to_phys(boot_addr), pmsu_mp_base + | |
| 51 | PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu)); | |
| 52 | ||
| 53 | /* Release CPU from reset by clearing reset bit*/ | |
| 54 | reg = readl(pmsu_reset_base + PMSU_RESET_CTL_OFFSET(hw_cpu)); | |
| 55 | reg &= (~0x1); | |
| 56 | writel(reg, pmsu_reset_base + PMSU_RESET_CTL_OFFSET(hw_cpu)); | |
| 57 | ||
| 58 | return 0; | |
| 59 | } | |
| 60 | #endif | |
| 61 | ||
| b12634e3 | 62 | static int __init armada_370_xp_pmsu_init(void) |
| 7444dad2 GC |
63 | { |
| 64 | struct device_node *np; | |
| 65 | ||
| 66 | np = of_find_matching_node(NULL, of_pmsu_table); | |
| 67 | if (np) { | |
| 68 | pr_info("Initializing Power Management Service Unit\n"); | |
| 69 | pmsu_mp_base = of_iomap(np, 0); | |
| 70 | pmsu_reset_base = of_iomap(np, 1); | |
| abe511ac | 71 | of_node_put(np); |
| 7444dad2 GC |
72 | } |
| 73 | ||
| 74 | return 0; | |
| 75 | } | |
| 76 | ||
| 77 | early_initcall(armada_370_xp_pmsu_init); |