Commit | Line | Data |
---|---|---|
27432825 TP |
1 | /* |
2 | * Board-level suspend/resume support. | |
3 | * | |
32f9494c | 4 | * Copyright (C) 2014-2015 Marvell |
27432825 TP |
5 | * |
6 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | #include <linux/delay.h> | |
14 | #include <linux/gpio.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/io.h> | |
17 | #include <linux/of.h> | |
18 | #include <linux/of_address.h> | |
19 | #include <linux/of_gpio.h> | |
20 | #include <linux/slab.h> | |
21 | #include "common.h" | |
22 | ||
32f9494c | 23 | #define ARMADA_PIC_NR_GPIOS 3 |
27432825 TP |
24 | |
25 | static void __iomem *gpio_ctrl; | |
32f9494c TP |
26 | static int pic_gpios[ARMADA_PIC_NR_GPIOS]; |
27 | static int pic_raw_gpios[ARMADA_PIC_NR_GPIOS]; | |
27432825 | 28 | |
32f9494c | 29 | static void mvebu_armada_pm_enter(void __iomem *sdram_reg, u32 srcmd) |
27432825 TP |
30 | { |
31 | u32 reg, ackcmd; | |
32 | int i; | |
33 | ||
34 | /* Put 001 as value on the GPIOs */ | |
35 | reg = readl(gpio_ctrl); | |
32f9494c | 36 | for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++) |
27432825 TP |
37 | reg &= ~BIT(pic_raw_gpios[i]); |
38 | reg |= BIT(pic_raw_gpios[0]); | |
39 | writel(reg, gpio_ctrl); | |
40 | ||
41 | /* Prepare writing 111 to the GPIOs */ | |
42 | ackcmd = readl(gpio_ctrl); | |
32f9494c | 43 | for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++) |
27432825 TP |
44 | ackcmd |= BIT(pic_raw_gpios[i]); |
45 | ||
2f5bc307 TP |
46 | srcmd = cpu_to_le32(srcmd); |
47 | ackcmd = cpu_to_le32(ackcmd); | |
48 | ||
27432825 TP |
49 | /* |
50 | * Wait a while, the PIC needs quite a bit of time between the | |
51 | * two GPIO commands. | |
52 | */ | |
53 | mdelay(3000); | |
54 | ||
55 | asm volatile ( | |
56 | /* Align to a cache line */ | |
57 | ".balign 32\n\t" | |
58 | ||
59 | /* Enter self refresh */ | |
60 | "str %[srcmd], [%[sdram_reg]]\n\t" | |
61 | ||
62 | /* | |
63 | * Wait 100 cycles for DDR to enter self refresh, by | |
64 | * doing 50 times two instructions. | |
65 | */ | |
66 | "mov r1, #50\n\t" | |
67 | "1: subs r1, r1, #1\n\t" | |
68 | "bne 1b\n\t" | |
69 | ||
70 | /* Issue the command ACK */ | |
71 | "str %[ackcmd], [%[gpio_ctrl]]\n\t" | |
72 | ||
73 | /* Trap the processor */ | |
74 | "b .\n\t" | |
75 | : : [srcmd] "r" (srcmd), [sdram_reg] "r" (sdram_reg), | |
76 | [ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1"); | |
77 | } | |
78 | ||
bb253e74 | 79 | static int __init mvebu_armada_pm_init(void) |
27432825 TP |
80 | { |
81 | struct device_node *np; | |
82 | struct device_node *gpio_ctrl_np; | |
83 | int ret = 0, i; | |
84 | ||
85 | if (!of_machine_is_compatible("marvell,axp-gp")) | |
86 | return -ENODEV; | |
87 | ||
88 | np = of_find_node_by_name(NULL, "pm_pic"); | |
89 | if (!np) | |
90 | return -ENODEV; | |
91 | ||
32f9494c | 92 | for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++) { |
27432825 TP |
93 | char *name; |
94 | struct of_phandle_args args; | |
95 | ||
96 | pic_gpios[i] = of_get_named_gpio(np, "ctrl-gpios", i); | |
97 | if (pic_gpios[i] < 0) { | |
98 | ret = -ENODEV; | |
99 | goto out; | |
100 | } | |
101 | ||
102 | name = kasprintf(GFP_KERNEL, "pic-pin%d", i); | |
103 | if (!name) { | |
104 | ret = -ENOMEM; | |
105 | goto out; | |
106 | } | |
107 | ||
108 | ret = gpio_request(pic_gpios[i], name); | |
109 | if (ret < 0) { | |
110 | kfree(name); | |
111 | goto out; | |
112 | } | |
113 | ||
114 | ret = gpio_direction_output(pic_gpios[i], 0); | |
115 | if (ret < 0) { | |
116 | gpio_free(pic_gpios[i]); | |
117 | kfree(name); | |
118 | goto out; | |
119 | } | |
120 | ||
121 | ret = of_parse_phandle_with_fixed_args(np, "ctrl-gpios", 2, | |
122 | i, &args); | |
123 | if (ret < 0) { | |
124 | gpio_free(pic_gpios[i]); | |
125 | kfree(name); | |
126 | goto out; | |
127 | } | |
128 | ||
129 | gpio_ctrl_np = args.np; | |
130 | pic_raw_gpios[i] = args.args[0]; | |
131 | } | |
132 | ||
133 | gpio_ctrl = of_iomap(gpio_ctrl_np, 0); | |
134 | if (!gpio_ctrl) | |
135 | return -ENOMEM; | |
136 | ||
3cbd6a6c | 137 | mvebu_pm_suspend_init(mvebu_armada_pm_enter); |
27432825 TP |
138 | |
139 | out: | |
140 | of_node_put(np); | |
141 | return ret; | |
142 | } | |
143 | ||
3cbd6a6c GC |
144 | /* |
145 | * Registering the mvebu_board_pm_enter callback must be done before | |
146 | * the platform_suspend_ops will be registered. In the same time we | |
147 | * also need to have the gpio devices registered. That's why we use a | |
148 | * device_initcall_sync which is called after all the device_initcall | |
149 | * (used by the gpio device) but before the late_initcall (used to | |
150 | * register the platform_suspend_ops) | |
151 | */ | |
152 | device_initcall_sync(mvebu_armada_pm_init); |