projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 0fdebc5e | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 794d15b2 SS |
2 | /* |
| 3 | * arch/arm/mach-mv78xx0/db78x00-bp-setup.c | |
| 4 | * | |
| 5 | * Marvell DB-78x00-BP Development Board Setup | |
| 794d15b2 SS |
6 | */ |
| 7 | ||
| 8 | #include <linux/kernel.h> | |
| 9 | #include <linux/init.h> | |
| 10 | #include <linux/platform_device.h> | |
| 11 | #include <linux/ata_platform.h> | |
| 12 | #include <linux/mv643xx_eth.h> | |
| 04185fc6 | 13 | #include <linux/ethtool.h> |
| 69359943 | 14 | #include <linux/i2c.h> |
| 794d15b2 SS |
15 | #include <asm/mach-types.h> |
| 16 | #include <asm/mach/arch.h> | |
| 4c811b99 | 17 | #include "mv78xx0.h" |
| 794d15b2 SS |
18 | #include "common.h" |
| 19 | ||
| 20 | static struct mv643xx_eth_platform_data db78x00_ge00_data = { | |
| ac840605 | 21 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), |
| 794d15b2 SS |
22 | }; |
| 23 | ||
| 24 | static struct mv643xx_eth_platform_data db78x00_ge01_data = { | |
| ac840605 | 25 | .phy_addr = MV643XX_ETH_PHY_ADDR(9), |
| 794d15b2 SS |
26 | }; |
| 27 | ||
| 28 | static struct mv643xx_eth_platform_data db78x00_ge10_data = { | |
| f1f54657 | 29 | .phy_addr = MV643XX_ETH_PHY_ADDR(10), |
| 794d15b2 SS |
30 | }; |
| 31 | ||
| 32 | static struct mv643xx_eth_platform_data db78x00_ge11_data = { | |
| f1f54657 | 33 | .phy_addr = MV643XX_ETH_PHY_ADDR(11), |
| 794d15b2 SS |
34 | }; |
| 35 | ||
| 36 | static struct mv_sata_platform_data db78x00_sata_data = { | |
| 37 | .n_ports = 2, | |
| 38 | }; | |
| 39 | ||
| 69359943 RV |
40 | static struct i2c_board_info __initdata db78x00_i2c_rtc = { |
| 41 | I2C_BOARD_INFO("ds1338", 0x68), | |
| 42 | }; | |
| 43 | ||
| 44 | ||
| 794d15b2 SS |
45 | static void __init db78x00_init(void) |
| 46 | { | |
| 47 | /* | |
| 48 | * Basic MV78xx0 setup. Needs to be called early. | |
| 49 | */ | |
| 50 | mv78xx0_init(); | |
| 51 | ||
| 52 | /* | |
| 53 | * Partition on-chip peripherals between the two CPU cores. | |
| 54 | */ | |
| 55 | if (mv78xx0_core_index() == 0) { | |
| 56 | mv78xx0_ehci0_init(); | |
| 57 | mv78xx0_ehci1_init(); | |
| 58 | mv78xx0_ehci2_init(); | |
| 59 | mv78xx0_ge00_init(&db78x00_ge00_data); | |
| 60 | mv78xx0_ge01_init(&db78x00_ge01_data); | |
| 61 | mv78xx0_ge10_init(&db78x00_ge10_data); | |
| 62 | mv78xx0_ge11_init(&db78x00_ge11_data); | |
| 63 | mv78xx0_sata_init(&db78x00_sata_data); | |
| 64 | mv78xx0_uart0_init(); | |
| 65 | mv78xx0_uart2_init(); | |
| 69359943 RV |
66 | mv78xx0_i2c_init(); |
| 67 | i2c_register_board_info(0, &db78x00_i2c_rtc, 1); | |
| 794d15b2 SS |
68 | } else { |
| 69 | mv78xx0_uart1_init(); | |
| 70 | mv78xx0_uart3_init(); | |
| 71 | } | |
| 72 | } | |
| 73 | ||
| 74 | static int __init db78x00_pci_init(void) | |
| 75 | { | |
| 76 | if (machine_is_db78x00_bp()) { | |
| 77 | /* | |
| 78 | * Assign the x16 PCIe slot on the board to CPU core | |
| 79 | * #0, and let CPU core #1 have the four x1 slots. | |
| 80 | */ | |
| 81 | if (mv78xx0_core_index() == 0) | |
| 82 | mv78xx0_pcie_init(0, 1); | |
| 83 | else | |
| 84 | mv78xx0_pcie_init(1, 0); | |
| 85 | } | |
| 86 | ||
| 87 | return 0; | |
| 88 | } | |
| 89 | subsys_initcall(db78x00_pci_init); | |
| 90 | ||
| 91 | MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board") | |
| 92 | /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ | |
| 5bc9291a | 93 | .atag_offset = 0x100, |
| 5cdbe5d2 | 94 | .nr_irqs = MV78XX0_NR_IRQS, |
| 794d15b2 SS |
95 | .init_machine = db78x00_init, |
| 96 | .map_io = mv78xx0_map_io, | |
| 4ee1f6b5 | 97 | .init_early = mv78xx0_init_early, |
| 794d15b2 | 98 | .init_irq = mv78xx0_init_irq, |
| 6bb27d73 | 99 | .init_time = mv78xx0_timer_init, |
| 9635f9cd | 100 | .restart = mv78xx0_restart, |
| 794d15b2 | 101 | MACHINE_END |