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1 | /* arch/arm/mach-msm/proc_comm.h |
2 | * | |
3 | * Copyright (c) 2007 QUALCOMM Incorporated | |
4 | * | |
5 | * This software is licensed under the terms of the GNU General Public | |
6 | * License version 2, as published by the Free Software Foundation, and | |
7 | * may be copied, distributed, and modified under those terms. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef _ARCH_ARM_MACH_MSM_PROC_COMM_H_ | |
17 | #define _ARCH_ARM_MACH_MSM_PROC_COMM_H_ | |
18 | ||
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19 | #include <linux/init.h> |
20 | ||
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21 | enum { |
22 | PCOM_CMD_IDLE = 0x0, | |
23 | PCOM_CMD_DONE, | |
24 | PCOM_RESET_APPS, | |
25 | PCOM_RESET_CHIP, | |
26 | PCOM_CONFIG_NAND_MPU, | |
27 | PCOM_CONFIG_USB_CLKS, | |
28 | PCOM_GET_POWER_ON_STATUS, | |
29 | PCOM_GET_WAKE_UP_STATUS, | |
30 | PCOM_GET_BATT_LEVEL, | |
31 | PCOM_CHG_IS_CHARGING, | |
32 | PCOM_POWER_DOWN, | |
33 | PCOM_USB_PIN_CONFIG, | |
34 | PCOM_USB_PIN_SEL, | |
35 | PCOM_SET_RTC_ALARM, | |
36 | PCOM_NV_READ, | |
37 | PCOM_NV_WRITE, | |
38 | PCOM_GET_UUID_HIGH, | |
39 | PCOM_GET_UUID_LOW, | |
40 | PCOM_GET_HW_ENTROPY, | |
41 | PCOM_RPC_GPIO_TLMM_CONFIG_REMOTE, | |
42 | PCOM_CLKCTL_RPC_ENABLE, | |
43 | PCOM_CLKCTL_RPC_DISABLE, | |
44 | PCOM_CLKCTL_RPC_RESET, | |
45 | PCOM_CLKCTL_RPC_SET_FLAGS, | |
46 | PCOM_CLKCTL_RPC_SET_RATE, | |
47 | PCOM_CLKCTL_RPC_MIN_RATE, | |
48 | PCOM_CLKCTL_RPC_MAX_RATE, | |
49 | PCOM_CLKCTL_RPC_RATE, | |
50 | PCOM_CLKCTL_RPC_PLL_REQUEST, | |
51 | PCOM_CLKCTL_RPC_ENABLED, | |
52 | PCOM_VREG_SWITCH, | |
53 | PCOM_VREG_SET_LEVEL, | |
54 | PCOM_GPIO_TLMM_CONFIG_GROUP, | |
55 | PCOM_GPIO_TLMM_UNCONFIG_GROUP, | |
56 | PCOM_NV_WRITE_BYTES_4_7, | |
57 | PCOM_CONFIG_DISP, | |
58 | PCOM_GET_FTM_BOOT_COUNT, | |
59 | PCOM_RPC_GPIO_TLMM_CONFIG_EX, | |
60 | PCOM_PM_MPP_CONFIG, | |
61 | PCOM_GPIO_IN, | |
62 | PCOM_GPIO_OUT, | |
63 | PCOM_RESET_MODEM, | |
64 | PCOM_RESET_CHIP_IMM, | |
65 | PCOM_PM_VID_EN, | |
66 | PCOM_VREG_PULLDOWN, | |
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67 | PCOM_GET_MODEM_VERSION, |
68 | PCOM_CLK_REGIME_SEC_RESET, | |
69 | PCOM_CLK_REGIME_SEC_RESET_ASSERT, | |
70 | PCOM_CLK_REGIME_SEC_RESET_DEASSERT, | |
71 | PCOM_CLK_REGIME_SEC_PLL_REQUEST_WRP, | |
72 | PCOM_CLK_REGIME_SEC_ENABLE, | |
73 | PCOM_CLK_REGIME_SEC_DISABLE, | |
74 | PCOM_CLK_REGIME_SEC_IS_ON, | |
75 | PCOM_CLK_REGIME_SEC_SEL_CLK_INV, | |
76 | PCOM_CLK_REGIME_SEC_SEL_CLK_SRC, | |
77 | PCOM_CLK_REGIME_SEC_SEL_CLK_DIV, | |
78 | PCOM_CLK_REGIME_SEC_ICODEC_CLK_ENABLE, | |
79 | PCOM_CLK_REGIME_SEC_ICODEC_CLK_DISABLE, | |
80 | PCOM_CLK_REGIME_SEC_SEL_SPEED, | |
81 | PCOM_CLK_REGIME_SEC_CONFIG_GP_CLK_WRP, | |
82 | PCOM_CLK_REGIME_SEC_CONFIG_MDH_CLK_WRP, | |
83 | PCOM_CLK_REGIME_SEC_USB_XTAL_ON, | |
84 | PCOM_CLK_REGIME_SEC_USB_XTAL_OFF, | |
85 | PCOM_CLK_REGIME_SEC_SET_QDSP_DME_MODE, | |
86 | PCOM_CLK_REGIME_SEC_SWITCH_ADSP_CLK, | |
87 | PCOM_CLK_REGIME_SEC_GET_MAX_ADSP_CLK_KHZ, | |
88 | PCOM_CLK_REGIME_SEC_GET_I2C_CLK_KHZ, | |
89 | PCOM_CLK_REGIME_SEC_MSM_GET_CLK_FREQ_KHZ, | |
90 | PCOM_CLK_REGIME_SEC_SEL_VFE_SRC, | |
91 | PCOM_CLK_REGIME_SEC_MSM_SEL_CAMCLK, | |
92 | PCOM_CLK_REGIME_SEC_MSM_SEL_LCDCLK, | |
93 | PCOM_CLK_REGIME_SEC_VFE_RAIL_OFF, | |
94 | PCOM_CLK_REGIME_SEC_VFE_RAIL_ON, | |
95 | PCOM_CLK_REGIME_SEC_GRP_RAIL_OFF, | |
96 | PCOM_CLK_REGIME_SEC_GRP_RAIL_ON, | |
97 | PCOM_CLK_REGIME_SEC_VDC_RAIL_OFF, | |
98 | PCOM_CLK_REGIME_SEC_VDC_RAIL_ON, | |
99 | PCOM_CLK_REGIME_SEC_LCD_CTRL, | |
100 | PCOM_CLK_REGIME_SEC_REGISTER_FOR_CPU_RESOURCE, | |
101 | PCOM_CLK_REGIME_SEC_DEREGISTER_FOR_CPU_RESOURCE, | |
102 | PCOM_CLK_REGIME_SEC_RESOURCE_REQUEST_WRP, | |
103 | PCOM_CLK_REGIME_MSM_SEC_SEL_CLK_OWNER, | |
104 | PCOM_CLK_REGIME_SEC_DEVMAN_REQUEST_WRP, | |
105 | PCOM_GPIO_CONFIG, | |
106 | PCOM_GPIO_CONFIGURE_GROUP, | |
107 | PCOM_GPIO_TLMM_SET_PORT, | |
108 | PCOM_GPIO_TLMM_CONFIG_EX, | |
109 | PCOM_SET_FTM_BOOT_COUNT, | |
110 | PCOM_RESERVED0, | |
111 | PCOM_RESERVED1, | |
112 | PCOM_CUSTOMER_CMD1, | |
113 | PCOM_CUSTOMER_CMD2, | |
114 | PCOM_CUSTOMER_CMD3, | |
115 | PCOM_CLK_REGIME_ENTER_APPSBL_CHG_MODE, | |
116 | PCOM_CLK_REGIME_EXIT_APPSBL_CHG_MODE, | |
117 | PCOM_CLK_REGIME_SEC_RAIL_DISABLE, | |
118 | PCOM_CLK_REGIME_SEC_RAIL_ENABLE, | |
119 | PCOM_CLK_REGIME_SEC_RAIL_CONTROL, | |
120 | PCOM_SET_SW_WATCHDOG_STATE, | |
121 | PCOM_PM_MPP_CONFIG_DIGITAL_INPUT, | |
122 | PCOM_PM_MPP_CONFIG_I_SINK, | |
123 | PCOM_RESERVED_101, | |
124 | PCOM_MSM_HSUSB_PHY_RESET, | |
125 | PCOM_GET_BATT_MV_LEVEL, | |
126 | PCOM_CHG_USB_IS_PC_CONNECTED, | |
127 | PCOM_CHG_USB_IS_CHARGER_CONNECTED, | |
128 | PCOM_CHG_USB_IS_DISCONNECTED, | |
129 | PCOM_CHG_USB_IS_AVAILABLE, | |
130 | PCOM_CLK_REGIME_SEC_MSM_SEL_FREQ, | |
131 | PCOM_CLK_REGIME_SEC_SET_PCLK_AXI_POLICY, | |
132 | PCOM_CLKCTL_RPC_RESET_ASSERT, | |
133 | PCOM_CLKCTL_RPC_RESET_DEASSERT, | |
134 | PCOM_CLKCTL_RPC_RAIL_ON, | |
135 | PCOM_CLKCTL_RPC_RAIL_OFF, | |
136 | PCOM_CLKCTL_RPC_RAIL_ENABLE, | |
137 | PCOM_CLKCTL_RPC_RAIL_DISABLE, | |
138 | PCOM_CLKCTL_RPC_RAIL_CONTROL, | |
139 | PCOM_CLKCTL_RPC_MIN_MSMC1, | |
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140 | PCOM_NUM_CMDS, |
141 | }; | |
142 | ||
143 | enum { | |
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144 | PCOM_INVALID_STATUS = 0x0, |
145 | PCOM_READY, | |
146 | PCOM_CMD_RUNNING, | |
147 | PCOM_CMD_SUCCESS, | |
148 | PCOM_CMD_FAIL, | |
149 | PCOM_CMD_FAIL_FALSE_RETURNED, | |
150 | PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_SERVER, | |
151 | PCOM_CMD_FAIL_CMD_OUT_OF_BOUNDS_CLIENT, | |
152 | PCOM_CMD_FAIL_CMD_UNREGISTERED, | |
153 | PCOM_CMD_FAIL_CMD_LOCKED, | |
154 | PCOM_CMD_FAIL_SERVER_NOT_YET_READY, | |
155 | PCOM_CMD_FAIL_BAD_DESTINATION, | |
156 | PCOM_CMD_FAIL_SERVER_RESET, | |
157 | PCOM_CMD_FAIL_SMSM_NOT_INIT, | |
158 | PCOM_CMD_FAIL_PROC_COMM_BUSY, | |
159 | PCOM_CMD_FAIL_PROC_COMM_NOT_INIT, | |
160 | ||
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161 | }; |
162 | ||
163 | /* List of VREGs that support the Pull Down Resistor setting. */ | |
5f5d5851 | 164 | enum vreg_pdown_id { |
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165 | PM_VREG_PDOWN_MSMA_ID, |
166 | PM_VREG_PDOWN_MSMP_ID, | |
167 | PM_VREG_PDOWN_MSME1_ID, /* Not supported in Panoramix */ | |
168 | PM_VREG_PDOWN_MSMC1_ID, /* Not supported in PM6620 */ | |
169 | PM_VREG_PDOWN_MSMC2_ID, /* Supported in PM7500 only */ | |
170 | PM_VREG_PDOWN_GP3_ID, /* Supported in PM7500 only */ | |
171 | PM_VREG_PDOWN_MSME2_ID, /* Supported in PM7500 and Panoramix only */ | |
172 | PM_VREG_PDOWN_GP4_ID, /* Supported in PM7500 only */ | |
173 | PM_VREG_PDOWN_GP1_ID, /* Supported in PM7500 only */ | |
174 | PM_VREG_PDOWN_TCXO_ID, | |
175 | PM_VREG_PDOWN_PA_ID, | |
176 | PM_VREG_PDOWN_RFTX_ID, | |
177 | PM_VREG_PDOWN_RFRX1_ID, | |
178 | PM_VREG_PDOWN_RFRX2_ID, | |
179 | PM_VREG_PDOWN_SYNT_ID, | |
180 | PM_VREG_PDOWN_WLAN_ID, | |
181 | PM_VREG_PDOWN_USB_ID, | |
182 | PM_VREG_PDOWN_MMC_ID, | |
183 | PM_VREG_PDOWN_RUIM_ID, | |
184 | PM_VREG_PDOWN_MSMC0_ID, /* Supported in PM6610 only */ | |
185 | PM_VREG_PDOWN_GP2_ID, /* Supported in PM7500 only */ | |
186 | PM_VREG_PDOWN_GP5_ID, /* Supported in PM7500 only */ | |
187 | PM_VREG_PDOWN_GP6_ID, /* Supported in PM7500 only */ | |
188 | PM_VREG_PDOWN_RF_ID, | |
189 | PM_VREG_PDOWN_RF_VCO_ID, | |
190 | PM_VREG_PDOWN_MPLL_ID, | |
191 | PM_VREG_PDOWN_S2_ID, | |
192 | PM_VREG_PDOWN_S3_ID, | |
193 | PM_VREG_PDOWN_RFUBM_ID, | |
194 | ||
195 | /* new for HAN */ | |
196 | PM_VREG_PDOWN_RF1_ID, | |
197 | PM_VREG_PDOWN_RF2_ID, | |
198 | PM_VREG_PDOWN_RFA_ID, | |
199 | PM_VREG_PDOWN_CDC2_ID, | |
200 | PM_VREG_PDOWN_RFTX2_ID, | |
201 | PM_VREG_PDOWN_USIM_ID, | |
202 | PM_VREG_PDOWN_USB2P6_ID, | |
203 | PM_VREG_PDOWN_USB3P3_ID, | |
204 | PM_VREG_PDOWN_INVALID_ID, | |
205 | ||
206 | /* backward compatible enums only */ | |
207 | PM_VREG_PDOWN_CAM_ID = PM_VREG_PDOWN_GP1_ID, | |
208 | PM_VREG_PDOWN_MDDI_ID = PM_VREG_PDOWN_GP2_ID, | |
209 | PM_VREG_PDOWN_RUIM2_ID = PM_VREG_PDOWN_GP3_ID, | |
210 | PM_VREG_PDOWN_AUX_ID = PM_VREG_PDOWN_GP4_ID, | |
211 | PM_VREG_PDOWN_AUX2_ID = PM_VREG_PDOWN_GP5_ID, | |
212 | PM_VREG_PDOWN_BT_ID = PM_VREG_PDOWN_GP6_ID, | |
213 | ||
214 | PM_VREG_PDOWN_MSME_ID = PM_VREG_PDOWN_MSME1_ID, | |
215 | PM_VREG_PDOWN_MSMC_ID = PM_VREG_PDOWN_MSMC1_ID, | |
216 | PM_VREG_PDOWN_RFA1_ID = PM_VREG_PDOWN_RFRX2_ID, | |
217 | PM_VREG_PDOWN_RFA2_ID = PM_VREG_PDOWN_RFTX2_ID, | |
218 | PM_VREG_PDOWN_XO_ID = PM_VREG_PDOWN_TCXO_ID | |
219 | }; | |
220 | ||
5f5d5851 | 221 | enum { |
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222 | PCOM_CLKRGM_APPS_RESET_USB_PHY = 34, |
223 | PCOM_CLKRGM_APPS_RESET_USBH = 37, | |
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224 | }; |
225 | ||
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226 | /* gpio info for PCOM_RPC_GPIO_TLMM_CONFIG_EX */ |
227 | ||
228 | #define GPIO_ENABLE 0 | |
229 | #define GPIO_DISABLE 1 | |
230 | ||
231 | #define GPIO_INPUT 0 | |
232 | #define GPIO_OUTPUT 1 | |
233 | ||
234 | #define GPIO_NO_PULL 0 | |
235 | #define GPIO_PULL_DOWN 1 | |
236 | #define GPIO_KEEPER 2 | |
237 | #define GPIO_PULL_UP 3 | |
238 | ||
239 | #define GPIO_2MA 0 | |
240 | #define GPIO_4MA 1 | |
241 | #define GPIO_6MA 2 | |
242 | #define GPIO_8MA 3 | |
243 | #define GPIO_10MA 4 | |
244 | #define GPIO_12MA 5 | |
245 | #define GPIO_14MA 6 | |
246 | #define GPIO_16MA 7 | |
247 | ||
248 | #define PCOM_GPIO_CFG(gpio, func, dir, pull, drvstr) \ | |
249 | ((((gpio) & 0x3FF) << 4) | \ | |
250 | ((func) & 0xf) | \ | |
251 | (((dir) & 0x1) << 14) | \ | |
252 | (((pull) & 0x3) << 15) | \ | |
253 | (((drvstr) & 0xF) << 17)) | |
254 | ||
255 | int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2); | |
0aec66d4 | 256 | void __init proc_comm_boot_wait(void); |
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257 | |
258 | #endif |