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a32d2feb DW |
1 | /* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
15 | * 02110-1301, USA. | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/irq.h> | |
20 | #include <linux/gpio.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/bootmem.h> | |
23 | #include <linux/delay.h> | |
24 | ||
25 | #include <asm/mach-types.h> | |
26 | #include <asm/mach/arch.h> | |
27 | #include <asm/io.h> | |
28 | #include <asm/setup.h> | |
29 | ||
a32d2feb | 30 | #include <mach/board.h> |
d1c0d43d DW |
31 | #include <mach/irqs.h> |
32 | #include <mach/sirc.h> | |
33 | #include <mach/gpio.h> | |
a32d2feb DW |
34 | |
35 | #include "devices.h" | |
a32d2feb | 36 | |
d1c0d43d | 37 | extern struct sys_timer msm_timer; |
a32d2feb | 38 | |
d1c0d43d DW |
39 | static struct msm_gpio uart3_config_data[] = { |
40 | { GPIO_CFG(86, 1, GPIO_INPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_Rx"}, | |
41 | { GPIO_CFG(87, 1, GPIO_OUTPUT, GPIO_PULL_DOWN, GPIO_2MA), "UART2_Tx"}, | |
a32d2feb DW |
42 | }; |
43 | ||
44 | static struct platform_device *devices[] __initdata = { | |
d1c0d43d | 45 | &msm_device_uart3, |
a32d2feb DW |
46 | }; |
47 | ||
d1c0d43d | 48 | static void msm8x50_init_uart3(void) |
a32d2feb | 49 | { |
d1c0d43d DW |
50 | msm_gpios_request_enable(uart3_config_data, |
51 | ARRAY_SIZE(uart3_config_data)); | |
a32d2feb DW |
52 | } |
53 | ||
d1c0d43d | 54 | static void __init qsd8x50_map_io(void) |
a32d2feb | 55 | { |
d1c0d43d DW |
56 | msm_map_qsd8x50_io(); |
57 | msm_clock_init(msm_clocks_8x50, msm_num_clocks_8x50); | |
a32d2feb DW |
58 | } |
59 | ||
d1c0d43d | 60 | static void __init qsd8x50_init_irq(void) |
a32d2feb | 61 | { |
d1c0d43d DW |
62 | msm_init_irq(); |
63 | msm_init_sirc(); | |
a32d2feb DW |
64 | } |
65 | ||
66 | static void __init qsd8x50_init(void) | |
67 | { | |
d1c0d43d | 68 | msm8x50_init_uart3(); |
a32d2feb DW |
69 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
70 | } | |
71 | ||
a32d2feb DW |
72 | MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF") |
73 | #ifdef CONFIG_MSM_DEBUG_UART | |
74 | .phys_io = MSM_DEBUG_UART_PHYS, | |
75 | .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, | |
76 | #endif | |
77 | .boot_params = PHYS_OFFSET + 0x100, | |
78 | .map_io = qsd8x50_map_io, | |
79 | .init_irq = qsd8x50_init_irq, | |
80 | .init_machine = qsd8x50_init, | |
81 | .timer = &msm_timer, | |
82 | MACHINE_END | |
83 | ||
d1c0d43d | 84 | MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5") |
a32d2feb DW |
85 | #ifdef CONFIG_MSM_DEBUG_UART |
86 | .phys_io = MSM_DEBUG_UART_PHYS, | |
87 | .io_pg_offst = ((MSM_DEBUG_UART_BASE) >> 18) & 0xfffc, | |
88 | #endif | |
89 | .boot_params = PHYS_OFFSET + 0x100, | |
90 | .map_io = qsd8x50_map_io, | |
91 | .init_irq = qsd8x50_init_irq, | |
92 | .init_machine = qsd8x50_init, | |
93 | .timer = &msm_timer, | |
94 | MACHINE_END |