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1d0ea069 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2f7e8fae HZ |
2 | /* |
3 | * linux/arch/arm/mach-mmp/flint.c | |
4 | * | |
5 | * Support for the Marvell Flint Development Platform. | |
6 | * | |
7 | * Copyright (C) 2009 Marvell International Ltd. | |
2f7e8fae HZ |
8 | */ |
9 | ||
10 | #include <linux/init.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/platform_device.h> | |
13 | #include <linux/smc91x.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/gpio.h> | |
b8f649f1 | 16 | #include <linux/gpio-pxa.h> |
0bd86961 | 17 | #include <linux/interrupt.h> |
2f7e8fae HZ |
18 | |
19 | #include <asm/mach-types.h> | |
20 | #include <asm/mach/arch.h> | |
b501fd7b AB |
21 | #include "addr-map.h" |
22 | #include "mfp-mmp2.h" | |
23 | #include "mmp2.h" | |
24 | #include "irqs.h" | |
2f7e8fae HZ |
25 | |
26 | #include "common.h" | |
27 | ||
8661fb92 | 28 | #define FLINT_NR_IRQS (MMP_NR_IRQS + 48) |
0bd86961 | 29 | |
2f7e8fae HZ |
30 | static unsigned long flint_pin_config[] __initdata = { |
31 | /* UART1 */ | |
32 | GPIO45_UART1_RXD, | |
33 | GPIO46_UART1_TXD, | |
34 | ||
35 | /* UART2 */ | |
36 | GPIO47_UART2_RXD, | |
37 | GPIO48_UART2_TXD, | |
38 | ||
39 | /* SMC */ | |
40 | GPIO151_SMC_SCLK, | |
41 | GPIO145_SMC_nCS0, | |
42 | GPIO146_SMC_nCS1, | |
43 | GPIO152_SMC_BE0, | |
44 | GPIO153_SMC_BE1, | |
45 | GPIO154_SMC_IRQ, | |
46 | GPIO113_SMC_RDY, | |
47 | ||
48 | /*Ethernet*/ | |
a8fb0b55 | 49 | GPIO155_GPIO, |
2f7e8fae HZ |
50 | |
51 | /* DFI */ | |
52 | GPIO168_DFI_D0, | |
53 | GPIO167_DFI_D1, | |
54 | GPIO166_DFI_D2, | |
55 | GPIO165_DFI_D3, | |
56 | GPIO107_DFI_D4, | |
57 | GPIO106_DFI_D5, | |
58 | GPIO105_DFI_D6, | |
59 | GPIO104_DFI_D7, | |
60 | GPIO111_DFI_D8, | |
61 | GPIO164_DFI_D9, | |
62 | GPIO163_DFI_D10, | |
63 | GPIO162_DFI_D11, | |
64 | GPIO161_DFI_D12, | |
65 | GPIO110_DFI_D13, | |
66 | GPIO109_DFI_D14, | |
67 | GPIO108_DFI_D15, | |
68 | GPIO143_ND_nCS0, | |
69 | GPIO144_ND_nCS1, | |
70 | GPIO147_ND_nWE, | |
71 | GPIO148_ND_nRE, | |
72 | GPIO150_ND_ALE, | |
73 | GPIO149_ND_CLE, | |
74 | GPIO112_ND_RDY0, | |
75 | GPIO160_ND_RDY1, | |
76 | }; | |
77 | ||
b8f649f1 HZ |
78 | static struct pxa_gpio_platform_data mmp2_gpio_pdata = { |
79 | .irq_base = MMP_GPIO_TO_IRQ(0), | |
80 | }; | |
81 | ||
2f7e8fae HZ |
82 | static struct smc91x_platdata flint_smc91x_info = { |
83 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
84 | }; | |
85 | ||
86 | static struct resource smc91x_resources[] = { | |
87 | [0] = { | |
88 | .start = SMC_CS1_PHYS_BASE + 0x300, | |
89 | .end = SMC_CS1_PHYS_BASE + 0xfffff, | |
90 | .flags = IORESOURCE_MEM, | |
91 | }, | |
92 | [1] = { | |
4929f5a8 HZ |
93 | .start = MMP_GPIO_TO_IRQ(155), |
94 | .end = MMP_GPIO_TO_IRQ(155), | |
2f7e8fae HZ |
95 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
96 | } | |
97 | }; | |
98 | ||
99 | static struct platform_device smc91x_device = { | |
100 | .name = "smc91x", | |
101 | .id = 0, | |
102 | .dev = { | |
103 | .platform_data = &flint_smc91x_info, | |
104 | }, | |
105 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
106 | .resource = smc91x_resources, | |
107 | }; | |
108 | ||
109 | static void __init flint_init(void) | |
110 | { | |
111 | mfp_config(ARRAY_AND_SIZE(flint_pin_config)); | |
112 | ||
113 | /* on-chip devices */ | |
114 | mmp2_add_uart(1); | |
115 | mmp2_add_uart(2); | |
b8f649f1 HZ |
116 | platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata, |
117 | sizeof(struct pxa_gpio_platform_data)); | |
157d2644 | 118 | platform_device_register(&mmp2_device_gpio); |
2f7e8fae HZ |
119 | |
120 | /* off-chip devices */ | |
121 | platform_device_register(&smc91x_device); | |
122 | } | |
123 | ||
124 | MACHINE_START(FLINT, "Flint Development Platform") | |
8022887c | 125 | .map_io = mmp_map_io, |
0bd86961 | 126 | .nr_irqs = FLINT_NR_IRQS, |
2f7e8fae | 127 | .init_irq = mmp2_init_irq, |
6bb27d73 | 128 | .init_time = mmp2_timer_init, |
2f7e8fae | 129 | .init_machine = flint_init, |
9854a38e | 130 | .restart = mmp_restart, |
2f7e8fae | 131 | MACHINE_END |