[linux-2.6-block.git] / arch / arm / mach-mmp / devices.c

/*
 * linux/arch/arm/mach-mmp/devices.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>

#include <asm/irq.h>
#include "irqs.h"
#include "devices.h"
#include "cputype.h"
#include "regs-usb.h"

int __init pxa_register_device(struct pxa_device_desc *desc,
				void *data, size_t size)
{
	struct platform_device *pdev;
	struct resource res[2 + MAX_RESOURCE_DMA];
	int i, ret = 0, nres = 0;

	pdev = platform_device_alloc(desc->drv_name, desc->id);
	if (pdev == NULL)
		return -ENOMEM;

	pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);

	memset(res, 0, sizeof(res));

	if (desc->start != -1ul && desc->size > 0) {
		res[nres].start	= desc->start;
		res[nres].end	= desc->start + desc->size - 1;
		res[nres].flags	= IORESOURCE_MEM;
		nres++;
	}

	if (desc->irq != NO_IRQ) {
		res[nres].start	= desc->irq;
		res[nres].end	= desc->irq;
		res[nres].flags	= IORESOURCE_IRQ;
		nres++;
	}

	for (i = 0; i < MAX_RESOURCE_DMA; i++, nres++) {
		if (desc->dma[i] == 0)
			break;

		res[nres].start	= desc->dma[i];
		res[nres].end	= desc->dma[i];
		res[nres].flags	= IORESOURCE_DMA;
	}

	ret = platform_device_add_resources(pdev, res, nres);
	if (ret) {
		platform_device_put(pdev);
		return ret;
	}

	if (data && size) {
		ret = platform_device_add_data(pdev, data, size);
		if (ret) {
			platform_device_put(pdev);
			return ret;
		}
	}

	return platform_device_add(pdev);
}

#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET)
#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)

/*****************************************************************************
 * The registers read/write routines
 *****************************************************************************/

static unsigned int u2o_get(void __iomem *base, unsigned int offset)
{
	return readl_relaxed(base + offset);
}

static void u2o_set(void __iomem *base, unsigned int offset,
		unsigned int value)
{
	u32 reg;

	reg = readl_relaxed(base + offset);
	reg |= value;
	writel_relaxed(reg, base + offset);
	readl_relaxed(base + offset);
}

static void u2o_clear(void __iomem *base, unsigned int offset,
		unsigned int value)
{
	u32 reg;

	reg = readl_relaxed(base + offset);
	reg &= ~value;
	writel_relaxed(reg, base + offset);
	readl_relaxed(base + offset);
}

static void u2o_write(void __iomem *base, unsigned int offset,
		unsigned int value)
{
	writel_relaxed(value, base + offset);
	readl_relaxed(base + offset);
}


static DEFINE_MUTEX(phy_lock);
static int phy_init_cnt;

static int usb_phy_init_internal(void __iomem *base)
{
	int loops;

	pr_info("Init usb phy!!!\n");

	/* Initialize the USB PHY power */
	if (cpu_is_pxa910()) {
		u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)
			| (1<<UTMI_CTRL_PU_REF_SHIFT));
	}

	u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
	u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);

	/* UTMI_PLL settings */
	u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK
		| UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK
		| UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK
		| UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK);

	u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT
		| 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT
		| 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT
		| 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT);

	/* UTMI_TX */
	u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
		| UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK
		| UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK
		| UTMI_TX_AMP_MASK);
	u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT
		| 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT
		| 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT);

	/* UTMI_RX */
	u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK
		| UTMI_REG_SQ_LENGTH_MASK);
	u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT
		| 2<<UTMI_REG_SQ_LENGTH_SHIFT);

	/* UTMI_IVREF */
	if (cpu_is_pxa168())
		/* fixing Microsoft Altair board interface with NEC hub issue -
		 * Set UTMI_IVREF from 0x4a3 to 0x4bf */
		u2o_write(base, UTMI_IVREF, 0x4bf);

	/* toggle VCOCAL_START bit of UTMI_PLL */
	udelay(200);
	u2o_set(base, UTMI_PLL, VCOCAL_START);
	udelay(40);
	u2o_clear(base, UTMI_PLL, VCOCAL_START);

	/* toggle REG_RCAL_START bit of UTMI_TX */
	udelay(400);
	u2o_set(base, UTMI_TX, REG_RCAL_START);
	udelay(40);
	u2o_clear(base, UTMI_TX, REG_RCAL_START);
	udelay(400);

	/* Make sure PHY PLL is ready */
	loops = 0;
	while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) {
		mdelay(1);
		loops++;
		if (loops > 100) {
			printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",
				u2o_get(base, UTMI_PLL));
			break;
		}
	}

	if (cpu_is_pxa168()) {
		u2o_set(base, UTMI_RESERVE, 1 << 5);
		/* Turn on UTMI PHY OTG extension */
		u2o_write(base, UTMI_OTG_ADDON, 1);
	}

	return 0;
}

static int usb_phy_deinit_internal(void __iomem *base)
{
	pr_info("Deinit usb phy!!!\n");

	if (cpu_is_pxa168())
		u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);

	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);
	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);
	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);
	u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
	u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);

	return 0;
}

int pxa_usb_phy_init(void __iomem *phy_reg)
{
	mutex_lock(&phy_lock);
	if (phy_init_cnt++ == 0)
		usb_phy_init_internal(phy_reg);
	mutex_unlock(&phy_lock);
	return 0;
}

void pxa_usb_phy_deinit(void __iomem *phy_reg)
{
	WARN_ON(phy_init_cnt == 0);

	mutex_lock(&phy_lock);
	if (--phy_init_cnt == 0)
		usb_phy_deinit_internal(phy_reg);
	mutex_unlock(&phy_lock);
}
#endif
#endif
#endif

#if IS_ENABLED(CONFIG_USB_SUPPORT)
static u64 __maybe_unused usb_dma_mask = ~(u32)0;

#if IS_ENABLED(CONFIG_USB_MV_UDC)
struct resource pxa168_u2o_resources[] = {
	/* regbase */
	[0] = {
		.start	= PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
		.end	= PXA168_U2O_REGBASE + USB_REG_RANGE,
		.flags	= IORESOURCE_MEM,
		.name	= "capregs",
	},
	/* phybase */
	[1] = {
		.start	= PXA168_U2O_PHYBASE,
		.end	= PXA168_U2O_PHYBASE + USB_PHY_RANGE,
		.flags	= IORESOURCE_MEM,
		.name	= "phyregs",
	},
	[2] = {
		.start	= IRQ_PXA168_USB1,
		.end	= IRQ_PXA168_USB1,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa168_device_u2o = {
	.name		= "mv-udc",
	.id		= -1,
	.resource	= pxa168_u2o_resources,
	.num_resources	= ARRAY_SIZE(pxa168_u2o_resources),
	.dev		=  {
		.dma_mask	= &usb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	}
};
#endif /* CONFIG_USB_MV_UDC */

#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
struct resource pxa168_u2oehci_resources[] = {
	[0] = {
		.start	= PXA168_U2O_REGBASE,
		.end	= PXA168_U2O_REGBASE + USB_REG_RANGE,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= IRQ_PXA168_USB1,
		.end	= IRQ_PXA168_USB1,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa168_device_u2oehci = {
	.name		= "pxa-u2oehci",
	.id		= -1,
	.dev		= {
		.dma_mask		= &usb_dma_mask,
		.coherent_dma_mask	= 0xffffffff,
	},

	.num_resources	= ARRAY_SIZE(pxa168_u2oehci_resources),
	.resource	= pxa168_u2oehci_resources,
};
#endif

#if IS_ENABLED(CONFIG_USB_MV_OTG)
struct resource pxa168_u2ootg_resources[] = {
	/* regbase */
	[0] = {
		.start	= PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
		.end	= PXA168_U2O_REGBASE + USB_REG_RANGE,
		.flags	= IORESOURCE_MEM,
		.name	= "capregs",
	},
	/* phybase */
	[1] = {
		.start	= PXA168_U2O_PHYBASE,
		.end	= PXA168_U2O_PHYBASE + USB_PHY_RANGE,
		.flags	= IORESOURCE_MEM,
		.name	= "phyregs",
	},
	[2] = {
		.start	= IRQ_PXA168_USB1,
		.end	= IRQ_PXA168_USB1,
		.flags	= IORESOURCE_IRQ,
	},
};

struct platform_device pxa168_device_u2ootg = {
	.name		= "mv-otg",
	.id		= -1,
	.dev  = {
		.dma_mask          = &usb_dma_mask,
		.coherent_dma_mask = 0xffffffff,
	},

	.num_resources	= ARRAY_SIZE(pxa168_u2ootg_resources),
	.resource      = pxa168_u2ootg_resources,
};
#endif /* CONFIG_USB_MV_OTG */

#endif
Commit	Line	Data
49cbe786 EM	1	/*
	2	* linux/arch/arm/mach-mmp/devices.c
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
	9	#include <linux/init.h>
	10	#include <linux/platform_device.h>
	11	#include <linux/dma-mapping.h>
75b1bdf5	12	#include <linux/delay.h>
49cbe786 EM	13
49cbe786 EM	14	#include <asm/irq.h>
b501fd7b AB	15	#include "irqs.h"
	16	#include "devices.h"
	17	#include "cputype.h"
	18	#include "regs-usb.h"
49cbe786 EM	19
	20	int __init pxa_register_device(struct pxa_device_desc *desc,
	21	void *data, size_t size)
	22	{
	23	struct platform_device *pdev;
	24	struct resource res[2 + MAX_RESOURCE_DMA];
	25	int i, ret = 0, nres = 0;
	26
	27	pdev = platform_device_alloc(desc->drv_name, desc->id);
	28	if (pdev == NULL)
	29	return -ENOMEM;
	30
	31	pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
	32
	33	memset(res, 0, sizeof(res));
	34
	35	if (desc->start != -1ul && desc->size > 0) {
	36	res[nres].start = desc->start;
	37	res[nres].end = desc->start + desc->size - 1;
	38	res[nres].flags = IORESOURCE_MEM;
	39	nres++;
	40	}
	41
	42	if (desc->irq != NO_IRQ) {
	43	res[nres].start = desc->irq;
	44	res[nres].end = desc->irq;
	45	res[nres].flags = IORESOURCE_IRQ;
	46	nres++;
	47	}
	48
	49	for (i = 0; i < MAX_RESOURCE_DMA; i++, nres++) {
	50	if (desc->dma[i] == 0)
	51	break;
	52
	53	res[nres].start = desc->dma[i];
	54	res[nres].end = desc->dma[i];
	55	res[nres].flags = IORESOURCE_DMA;
	56	}
	57
	58	ret = platform_device_add_resources(pdev, res, nres);
	59	if (ret) {
	60	platform_device_put(pdev);
	61	return ret;
	62	}
	63
	64	if (data && size) {
	65	ret = platform_device_add_data(pdev, data, size);
	66	if (ret) {
	67	platform_device_put(pdev);
	68	return ret;
	69	}
	70	}
	71
	72	return platform_device_add(pdev);
	73	}
75b1bdf5	74
35240808	75	#if IS_ENABLED(CONFIG_USB) \|\| IS_ENABLED(CONFIG_USB_GADGET)
84f45ee9 AB	76	#if IS_ENABLED(CONFIG_USB_MV_UDC) \|\| IS_ENABLED(CONFIG_USB_EHCI_MV)
84f45ee9 AB	77	#if IS_ENABLED(CONFIG_CPU_PXA910) \|\| IS_ENABLED(CONFIG_CPU_PXA168)
75b1bdf5 NZ	78
	79	/*****************************************************************************
	80	* The registers read/write routines
	81	*****************************************************************************/
	82
	83	static unsigned int u2o_get(void __iomem *base, unsigned int offset)
	84	{
	85	return readl_relaxed(base + offset);
	86	}
	87
	88	static void u2o_set(void __iomem *base, unsigned int offset,
	89	unsigned int value)
	90	{
	91	u32 reg;
	92
	93	reg = readl_relaxed(base + offset);
	94	reg \|= value;
	95	writel_relaxed(reg, base + offset);
	96	readl_relaxed(base + offset);
	97	}
	98
	99	static void u2o_clear(void __iomem *base, unsigned int offset,
	100	unsigned int value)
	101	{
	102	u32 reg;
	103
	104	reg = readl_relaxed(base + offset);
	105	reg &= ~value;
	106	writel_relaxed(reg, base + offset);
	107	readl_relaxed(base + offset);
	108	}
	109
	110	static void u2o_write(void __iomem *base, unsigned int offset,
	111	unsigned int value)
	112	{
	113	writel_relaxed(value, base + offset);
	114	readl_relaxed(base + offset);
	115	}
	116
75b1bdf5 NZ	117
	118	static DEFINE_MUTEX(phy_lock);
	119	static int phy_init_cnt;
	120
	121	static int usb_phy_init_internal(void __iomem *base)
	122	{
	123	int loops;
	124
	125	pr_info("Init usb phy!!!\n");
	126
	127	/* Initialize the USB PHY power */
	128	if (cpu_is_pxa910()) {
	129	u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT)
	130	\| (1<<UTMI_CTRL_PU_REF_SHIFT));
	131	}
	132
	133	u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
	134	u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
	135
	136	/* UTMI_PLL settings */
	137	u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK
	138	\| UTMI_PLL_PLLVDD12_MASK \| UTMI_PLL_PLLCALI12_MASK
	139	\| UTMI_PLL_FBDIV_MASK \| UTMI_PLL_REFDIV_MASK
	140	\| UTMI_PLL_ICP_MASK \| UTMI_PLL_KVCO_MASK);
	141
	142	u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT
	143	\| 0xb<<UTMI_PLL_REFDIV_SHIFT \| 3<<UTMI_PLL_PLLVDD18_SHIFT
	144	\| 3<<UTMI_PLL_PLLVDD12_SHIFT \| 3<<UTMI_PLL_PLLCALI12_SHIFT
	145	\| 1<<UTMI_PLL_ICP_SHIFT \| 3<<UTMI_PLL_KVCO_SHIFT);
	146
	147	/* UTMI_TX */
	148	u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK
	149	\| UTMI_TX_TXVDD12_MASK \| UTMI_TX_CK60_PHSEL_MASK
	150	\| UTMI_TX_IMPCAL_VTH_MASK \| UTMI_TX_REG_EXT_FS_RCAL_MASK
	151	\| UTMI_TX_AMP_MASK);
	152	u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT
	153	\| 4<<UTMI_TX_CK60_PHSEL_SHIFT \| 4<<UTMI_TX_IMPCAL_VTH_SHIFT
	154	\| 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT \| 3<<UTMI_TX_AMP_SHIFT);
	155
	156	/* UTMI_RX */
	157	u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK
	158	\| UTMI_REG_SQ_LENGTH_MASK);
	159	u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT
	160	\| 2<<UTMI_REG_SQ_LENGTH_SHIFT);
	161
	162	/* UTMI_IVREF */
	163	if (cpu_is_pxa168())
	164	/* fixing Microsoft Altair board interface with NEC hub issue -
	165	* Set UTMI_IVREF from 0x4a3 to 0x4bf */
	166	u2o_write(base, UTMI_IVREF, 0x4bf);
	167
	168	/* toggle VCOCAL_START bit of UTMI_PLL */
	169	udelay(200);
	170	u2o_set(base, UTMI_PLL, VCOCAL_START);
	171	udelay(40);
	172	u2o_clear(base, UTMI_PLL, VCOCAL_START);
	173
	174	/* toggle REG_RCAL_START bit of UTMI_TX */
	175	udelay(400);
	176	u2o_set(base, UTMI_TX, REG_RCAL_START);
	177	udelay(40);
	178	u2o_clear(base, UTMI_TX, REG_RCAL_START);
	179	udelay(400);
	180
181	/* Make sure PHY PLL is ready */
182	loops = 0;
183	while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) {
184	mdelay(1);
185	loops++;
186	if (loops > 100) {
187	printk(KERN_WARNING "calibrate timeout, UTMI_PLL %x\n",
188	u2o_get(base, UTMI_PLL));
189	break;
190	}
191	}
192
193	if (cpu_is_pxa168()) {
194	u2o_set(base, UTMI_RESERVE, 1 << 5);
195	/* Turn on UTMI PHY OTG extension */
196	u2o_write(base, UTMI_OTG_ADDON, 1);
197	}
198
199	return 0;
200	}
201
202	static int usb_phy_deinit_internal(void __iomem *base)
203	{
204	pr_info("Deinit usb phy!!!\n");
205
206	if (cpu_is_pxa168())
207	u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON);
208
209	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN);
210	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN);
211	u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN);
212	u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT);
213	u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT);
214
215	return 0;
216	}
217
218	int pxa_usb_phy_init(void __iomem *phy_reg)
219	{
220	mutex_lock(&phy_lock);
221	if (phy_init_cnt++ == 0)
222	usb_phy_init_internal(phy_reg);
223	mutex_unlock(&phy_lock);
224	return 0;
225	}
226
227	void pxa_usb_phy_deinit(void __iomem *phy_reg)
228	{
229	WARN_ON(phy_init_cnt == 0);
230
231	mutex_lock(&phy_lock);
232	if (--phy_init_cnt == 0)
233	usb_phy_deinit_internal(phy_reg);
234	mutex_unlock(&phy_lock);
235	}
236	#endif
237	#endif
238	#endif
239
35240808	240	#if IS_ENABLED(CONFIG_USB_SUPPORT)
1c1953f3	241	static u64 __maybe_unused usb_dma_mask = ~(u32)0;
75b1bdf5	242
35240808	243	#if IS_ENABLED(CONFIG_USB_MV_UDC)
75b1bdf5 NZ	244	struct resource pxa168_u2o_resources[] = {
	245	/* regbase */
	246	[0] = {
	247	.start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
	248	.end = PXA168_U2O_REGBASE + USB_REG_RANGE,
	249	.flags = IORESOURCE_MEM,
	250	.name = "capregs",
	251	},
	252	/* phybase */
	253	[1] = {
	254	.start = PXA168_U2O_PHYBASE,
	255	.end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
	256	.flags = IORESOURCE_MEM,
	257	.name = "phyregs",
	258	},
	259	[2] = {
	260	.start = IRQ_PXA168_USB1,
	261	.end = IRQ_PXA168_USB1,
	262	.flags = IORESOURCE_IRQ,
	263	},
	264	};
	265
	266	struct platform_device pxa168_device_u2o = {
	267	.name = "mv-udc",
	268	.id = -1,
	269	.resource = pxa168_u2o_resources,
	270	.num_resources = ARRAY_SIZE(pxa168_u2o_resources),
	271	.dev = {
	272	.dma_mask = &usb_dma_mask,
	273	.coherent_dma_mask = 0xffffffff,
	274	}
	275	};
	276	#endif /* CONFIG_USB_MV_UDC */
	277
35240808	278	#if IS_ENABLED(CONFIG_USB_EHCI_MV_U2O)
75b1bdf5	279	struct resource pxa168_u2oehci_resources[] = {
75b1bdf5	280	[0] = {
a740f20d	281	.start = PXA168_U2O_REGBASE,
75b1bdf5 NZ	282	.end = PXA168_U2O_REGBASE + USB_REG_RANGE,
75b1bdf5 NZ	283	.flags = IORESOURCE_MEM,
75b1bdf5	284	},
75b1bdf5	285	[1] = {
75b1bdf5 NZ	286	.start = IRQ_PXA168_USB1,
	287	.end = IRQ_PXA168_USB1,
	288	.flags = IORESOURCE_IRQ,
	289	},
	290	};
	291
	292	struct platform_device pxa168_device_u2oehci = {
	293	.name = "pxa-u2oehci",
	294	.id = -1,
	295	.dev = {
	296	.dma_mask = &usb_dma_mask,
	297	.coherent_dma_mask = 0xffffffff,
	298	},
	299
	300	.num_resources = ARRAY_SIZE(pxa168_u2oehci_resources),
	301	.resource = pxa168_u2oehci_resources,
	302	};
	303	#endif
	304
35240808	305	#if IS_ENABLED(CONFIG_USB_MV_OTG)
75b1bdf5 NZ	306	struct resource pxa168_u2ootg_resources[] = {
	307	/* regbase */
	308	[0] = {
	309	.start = PXA168_U2O_REGBASE + U2x_CAPREGS_OFFSET,
	310	.end = PXA168_U2O_REGBASE + USB_REG_RANGE,
	311	.flags = IORESOURCE_MEM,
	312	.name = "capregs",
	313	},
	314	/* phybase */
	315	[1] = {
	316	.start = PXA168_U2O_PHYBASE,
	317	.end = PXA168_U2O_PHYBASE + USB_PHY_RANGE,
	318	.flags = IORESOURCE_MEM,
	319	.name = "phyregs",
	320	},
	321	[2] = {
	322	.start = IRQ_PXA168_USB1,
	323	.end = IRQ_PXA168_USB1,
	324	.flags = IORESOURCE_IRQ,
	325	},
	326	};
	327
	328	struct platform_device pxa168_device_u2ootg = {
	329	.name = "mv-otg",
	330	.id = -1,
	331	.dev = {
	332	.dma_mask = &usb_dma_mask,
	333	.coherent_dma_mask = 0xffffffff,
	334	},
	335
	336	.num_resources = ARRAY_SIZE(pxa168_u2ootg_resources),
	337	.resource = pxa168_u2ootg_resources,
	338	};
	339	#endif /* CONFIG_USB_MV_OTG */
	340
	341	#endif