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0cda0700 YC |
1 | /* |
2 | * arch/arm/mach-mediatek/platsmp.c | |
3 | * | |
4 | * Copyright (c) 2014 Mediatek Inc. | |
5 | * Author: Shunli Wang <shunli.wang@mediatek.com> | |
6 | * Yingjoe Chen <yingjoe.chen@mediatek.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | */ | |
18 | #include <linux/io.h> | |
19 | #include <linux/memblock.h> | |
20 | #include <linux/of.h> | |
21 | #include <linux/of_address.h> | |
22 | #include <linux/string.h> | |
23 | #include <linux/threads.h> | |
24 | ||
25 | #define MTK_MAX_CPU 8 | |
26 | #define MTK_SMP_REG_SIZE 0x1000 | |
27 | ||
28 | struct mtk_smp_boot_info { | |
29 | unsigned long smp_base; | |
30 | unsigned int jump_reg; | |
31 | unsigned int core_keys[MTK_MAX_CPU - 1]; | |
32 | unsigned int core_regs[MTK_MAX_CPU - 1]; | |
33 | }; | |
34 | ||
35 | static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = { | |
36 | 0x80002000, 0x3fc, | |
37 | { 0x534c4131, 0x4c415332, 0x41534c33 }, | |
38 | { 0x3f8, 0x3f8, 0x3f8 }, | |
39 | }; | |
40 | ||
41 | static const struct mtk_smp_boot_info mtk_mt6589_boot = { | |
42 | 0x10002000, 0x34, | |
43 | { 0x534c4131, 0x4c415332, 0x41534c33 }, | |
44 | { 0x38, 0x3c, 0x40 }, | |
45 | }; | |
46 | ||
fd63892f JC |
47 | static const struct mtk_smp_boot_info mtk_mt7623_boot = { |
48 | 0x10202000, 0x34, | |
49 | { 0x534c4131, 0x4c415332, 0x41534c33 }, | |
50 | { 0x38, 0x3c, 0x40 }, | |
51 | }; | |
52 | ||
0cda0700 YC |
53 | static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = { |
54 | { .compatible = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot }, | |
55 | { .compatible = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot }, | |
5b0fb1ea | 56 | { .compatible = "mediatek,mt2701", .data = &mtk_mt8135_tz_boot }, |
0cda0700 YC |
57 | }; |
58 | ||
59 | static const struct of_device_id mtk_smp_boot_infos[] __initconst = { | |
60 | { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot }, | |
fd63892f | 61 | { .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot }, |
3b99ab7d | 62 | { .compatible = "mediatek,mt7623a", .data = &mtk_mt7623_boot }, |
0cda0700 YC |
63 | }; |
64 | ||
65 | static void __iomem *mtk_smp_base; | |
66 | static const struct mtk_smp_boot_info *mtk_smp_info; | |
67 | ||
68 | static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle) | |
69 | { | |
70 | if (!mtk_smp_base) | |
71 | return -EINVAL; | |
72 | ||
73 | if (!mtk_smp_info->core_keys[cpu-1]) | |
74 | return -EINVAL; | |
75 | ||
76 | writel_relaxed(mtk_smp_info->core_keys[cpu-1], | |
77 | mtk_smp_base + mtk_smp_info->core_regs[cpu-1]); | |
78 | ||
79 | arch_send_wakeup_ipi_mask(cpumask_of(cpu)); | |
80 | ||
81 | return 0; | |
82 | } | |
83 | ||
84 | static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone) | |
85 | { | |
86 | int i, num; | |
87 | const struct of_device_id *infos; | |
88 | ||
89 | if (trustzone) { | |
90 | num = ARRAY_SIZE(mtk_tz_smp_boot_infos); | |
91 | infos = mtk_tz_smp_boot_infos; | |
92 | } else { | |
93 | num = ARRAY_SIZE(mtk_smp_boot_infos); | |
94 | infos = mtk_smp_boot_infos; | |
95 | } | |
96 | ||
97 | /* Find smp boot info for this SoC */ | |
98 | for (i = 0; i < num; i++) { | |
99 | if (of_machine_is_compatible(infos[i].compatible)) { | |
100 | mtk_smp_info = infos[i].data; | |
101 | break; | |
102 | } | |
103 | } | |
104 | ||
105 | if (!mtk_smp_info) { | |
106 | pr_err("%s: Device is not supported\n", __func__); | |
107 | return; | |
108 | } | |
109 | ||
110 | if (trustzone) { | |
111 | /* smp_base(trustzone-bootinfo) is reserved by device tree */ | |
112 | mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base); | |
113 | } else { | |
114 | mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE); | |
115 | if (!mtk_smp_base) { | |
116 | pr_err("%s: Can't remap %lx\n", __func__, | |
117 | mtk_smp_info->smp_base); | |
118 | return; | |
119 | } | |
120 | } | |
121 | ||
122 | /* | |
123 | * write the address of slave startup address into the system-wide | |
124 | * jump register | |
125 | */ | |
64fc2a94 | 126 | writel_relaxed(__pa_symbol(secondary_startup_arm), |
0cda0700 YC |
127 | mtk_smp_base + mtk_smp_info->jump_reg); |
128 | } | |
129 | ||
130 | static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus) | |
131 | { | |
132 | __mtk_smp_prepare_cpus(max_cpus, 1); | |
133 | } | |
134 | ||
135 | static void __init mtk_smp_prepare_cpus(unsigned int max_cpus) | |
136 | { | |
137 | __mtk_smp_prepare_cpus(max_cpus, 0); | |
138 | } | |
139 | ||
75305275 | 140 | static const struct smp_operations mt81xx_tz_smp_ops __initconst = { |
0cda0700 YC |
141 | .smp_prepare_cpus = mtk_tz_smp_prepare_cpus, |
142 | .smp_boot_secondary = mtk_boot_secondary, | |
143 | }; | |
144 | CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops); | |
145 | ||
75305275 | 146 | static const struct smp_operations mt6589_smp_ops __initconst = { |
0cda0700 YC |
147 | .smp_prepare_cpus = mtk_smp_prepare_cpus, |
148 | .smp_boot_secondary = mtk_boot_secondary, | |
149 | }; | |
150 | CPU_METHOD_OF_DECLARE(mt6589_smp, "mediatek,mt6589-smp", &mt6589_smp_ops); |