Commit | Line | Data |
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1da177e4 LT |
1 | /* arch/arm/mach-lh7a40x/irq-lh7a400.c |
2 | * | |
3 | * Copyright (C) 2004 Coastal Environmental Systems | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * version 2 as published by the Free Software Foundation. | |
8 | * | |
9 | */ | |
10 | ||
11 | #include <linux/init.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/interrupt.h> | |
1da177e4 | 14 | |
a09e64fb | 15 | #include <mach/hardware.h> |
1da177e4 LT |
16 | #include <asm/irq.h> |
17 | #include <asm/mach/irq.h> | |
a09e64fb | 18 | #include <mach/irqs.h> |
1da177e4 | 19 | |
411ef7f4 | 20 | #include "common.h" |
1da177e4 LT |
21 | |
22 | /* CPU IRQ handling */ | |
23 | ||
24 | static void lh7a400_mask_irq (u32 irq) | |
25 | { | |
26 | INTC_INTENC = (1 << irq); | |
27 | } | |
28 | ||
29 | static void lh7a400_unmask_irq (u32 irq) | |
30 | { | |
31 | INTC_INTENS = (1 << irq); | |
32 | } | |
33 | ||
34 | static void lh7a400_ack_gpio_irq (u32 irq) | |
35 | { | |
36 | GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); | |
37 | INTC_INTENC = (1 << irq); | |
38 | } | |
39 | ||
38c677cb DB |
40 | static struct irq_chip lh7a400_internal_chip = { |
41 | .name = "MPU", | |
1da177e4 LT |
42 | .ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ |
43 | .mask = lh7a400_mask_irq, | |
44 | .unmask = lh7a400_unmask_irq, | |
45 | }; | |
46 | ||
38c677cb DB |
47 | static struct irq_chip lh7a400_gpio_chip = { |
48 | .name = "GPIO", | |
1da177e4 LT |
49 | .ack = lh7a400_ack_gpio_irq, |
50 | .mask = lh7a400_mask_irq, | |
51 | .unmask = lh7a400_unmask_irq, | |
52 | }; | |
53 | ||
54 | ||
55 | /* IRQ initialization */ | |
56 | ||
57 | void __init lh7a400_init_irq (void) | |
58 | { | |
59 | int irq; | |
60 | ||
61 | INTC_INTENC = 0xffffffff; /* Disable all interrupts */ | |
62 | GPIO_GPIOFINTEN = 0x00; /* Disable all GPIOF interrupts */ | |
63 | barrier (); | |
64 | ||
65 | for (irq = 0; irq < NR_IRQS; ++irq) { | |
66 | switch (irq) { | |
67 | case IRQ_GPIO0INTR: | |
68 | case IRQ_GPIO1INTR: | |
69 | case IRQ_GPIO2INTR: | |
70 | case IRQ_GPIO3INTR: | |
71 | case IRQ_GPIO4INTR: | |
72 | case IRQ_GPIO5INTR: | |
73 | case IRQ_GPIO6INTR: | |
74 | case IRQ_GPIO7INTR: | |
75 | set_irq_chip (irq, &lh7a400_gpio_chip); | |
10dd5ce2 | 76 | set_irq_handler (irq, handle_level_irq); /* OK default */ |
1da177e4 LT |
77 | break; |
78 | default: | |
79 | set_irq_chip (irq, &lh7a400_internal_chip); | |
10dd5ce2 | 80 | set_irq_handler (irq, handle_level_irq); |
1da177e4 LT |
81 | } |
82 | set_irq_flags (irq, IRQF_VALID); | |
83 | } | |
84 | ||
85 | lh7a40x_init_board_irq (); | |
86 | ||
87 | /* *** FIXME: the LH7a400 does use FIQ interrupts in some cases. For | |
88 | the time being, these are not initialized. */ | |
89 | ||
90 | /* init_FIQ(); */ | |
91 | } |