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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
7e36e2f5 RW |
2 | /* |
3 | * arch/arm/mach-ixp4xx/fsg-setup.c | |
4 | * | |
5 | * FSG board-setup | |
6 | * | |
7 | * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au> | |
8 | * | |
9 | * based on ixdp425-setup.c: | |
10 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | |
11 | * based on nslu2-power.c | |
12 | * Copyright (C) 2005 Tower Technologies | |
13 | * | |
14 | * Author: Rod Whitby <rod@whitby.id.au> | |
15 | * Maintainers: http://www.nslu2-linux.org/ | |
16 | * | |
17 | */ | |
2f8163ba | 18 | #include <linux/gpio.h> |
7e36e2f5 RW |
19 | #include <linux/if_ether.h> |
20 | #include <linux/irq.h> | |
21 | #include <linux/serial.h> | |
22 | #include <linux/serial_8250.h> | |
23 | #include <linux/leds.h> | |
24 | #include <linux/reboot.h> | |
25 | #include <linux/i2c.h> | |
26 | #include <linux/i2c-gpio.h> | |
fced80c7 | 27 | #include <linux/io.h> |
7e36e2f5 RW |
28 | #include <asm/mach-types.h> |
29 | #include <asm/mach/arch.h> | |
30 | #include <asm/mach/flash.h> | |
7e36e2f5 | 31 | |
914e7bc2 KH |
32 | #define FSG_SDA_PIN 12 |
33 | #define FSG_SCL_PIN 13 | |
34 | ||
35 | #define FSG_SB_GPIO 4 /* sync button */ | |
36 | #define FSG_RB_GPIO 9 /* reset button */ | |
37 | #define FSG_UB_GPIO 10 /* usb button */ | |
38 | ||
7e36e2f5 RW |
39 | static struct flash_platform_data fsg_flash_data = { |
40 | .map_name = "cfi_probe", | |
41 | .width = 2, | |
42 | }; | |
43 | ||
44 | static struct resource fsg_flash_resource = { | |
45 | .flags = IORESOURCE_MEM, | |
46 | }; | |
47 | ||
48 | static struct platform_device fsg_flash = { | |
49 | .name = "IXP4XX-Flash", | |
50 | .id = 0, | |
51 | .dev = { | |
52 | .platform_data = &fsg_flash_data, | |
53 | }, | |
54 | .num_resources = 1, | |
55 | .resource = &fsg_flash_resource, | |
56 | }; | |
57 | ||
58 | static struct i2c_gpio_platform_data fsg_i2c_gpio_data = { | |
59 | .sda_pin = FSG_SDA_PIN, | |
60 | .scl_pin = FSG_SCL_PIN, | |
61 | }; | |
62 | ||
63 | static struct platform_device fsg_i2c_gpio = { | |
64 | .name = "i2c-gpio", | |
65 | .id = 0, | |
66 | .dev = { | |
67 | .platform_data = &fsg_i2c_gpio_data, | |
68 | }, | |
69 | }; | |
70 | ||
71 | static struct i2c_board_info __initdata fsg_i2c_board_info [] = { | |
72 | { | |
d90c1add | 73 | I2C_BOARD_INFO("isl1208", 0x6f), |
7e36e2f5 RW |
74 | }, |
75 | }; | |
76 | ||
77 | static struct resource fsg_uart_resources[] = { | |
78 | { | |
79 | .start = IXP4XX_UART1_BASE_PHYS, | |
80 | .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, | |
81 | .flags = IORESOURCE_MEM, | |
82 | }, | |
83 | { | |
84 | .start = IXP4XX_UART2_BASE_PHYS, | |
85 | .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, | |
86 | .flags = IORESOURCE_MEM, | |
87 | } | |
88 | }; | |
89 | ||
90 | static struct plat_serial8250_port fsg_uart_data[] = { | |
91 | { | |
92 | .mapbase = IXP4XX_UART1_BASE_PHYS, | |
93 | .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, | |
94 | .irq = IRQ_IXP4XX_UART1, | |
95 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
96 | .iotype = UPIO_MEM, | |
97 | .regshift = 2, | |
98 | .uartclk = IXP4XX_UART_XTAL, | |
99 | }, | |
100 | { | |
101 | .mapbase = IXP4XX_UART2_BASE_PHYS, | |
102 | .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, | |
103 | .irq = IRQ_IXP4XX_UART2, | |
104 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | |
105 | .iotype = UPIO_MEM, | |
106 | .regshift = 2, | |
107 | .uartclk = IXP4XX_UART_XTAL, | |
108 | }, | |
109 | { } | |
110 | }; | |
111 | ||
112 | static struct platform_device fsg_uart = { | |
113 | .name = "serial8250", | |
114 | .id = PLAT8250_DEV_PLATFORM, | |
115 | .dev = { | |
116 | .platform_data = fsg_uart_data, | |
117 | }, | |
118 | .num_resources = ARRAY_SIZE(fsg_uart_resources), | |
119 | .resource = fsg_uart_resources, | |
120 | }; | |
121 | ||
122 | static struct platform_device fsg_leds = { | |
123 | .name = "fsg-led", | |
124 | .id = -1, | |
125 | }; | |
126 | ||
127 | /* Built-in 10/100 Ethernet MAC interfaces */ | |
128 | static struct eth_plat_info fsg_plat_eth[] = { | |
129 | { | |
130 | .phy = 5, | |
131 | .rxq = 3, | |
132 | .txreadyq = 20, | |
133 | }, { | |
134 | .phy = 4, | |
135 | .rxq = 4, | |
136 | .txreadyq = 21, | |
137 | } | |
138 | }; | |
139 | ||
140 | static struct platform_device fsg_eth[] = { | |
141 | { | |
142 | .name = "ixp4xx_eth", | |
143 | .id = IXP4XX_ETH_NPEB, | |
144 | .dev = { | |
145 | .platform_data = fsg_plat_eth, | |
146 | }, | |
147 | }, { | |
148 | .name = "ixp4xx_eth", | |
149 | .id = IXP4XX_ETH_NPEC, | |
150 | .dev = { | |
151 | .platform_data = fsg_plat_eth + 1, | |
152 | }, | |
153 | } | |
154 | }; | |
155 | ||
156 | static struct platform_device *fsg_devices[] __initdata = { | |
157 | &fsg_i2c_gpio, | |
158 | &fsg_flash, | |
159 | &fsg_leds, | |
160 | &fsg_eth[0], | |
161 | &fsg_eth[1], | |
162 | }; | |
163 | ||
164 | static irqreturn_t fsg_power_handler(int irq, void *dev_id) | |
165 | { | |
166 | /* Signal init to do the ctrlaltdel action, this will bypass init if | |
167 | * it hasn't started and do a kernel_restart. | |
168 | */ | |
169 | ctrl_alt_del(); | |
170 | ||
171 | return IRQ_HANDLED; | |
172 | } | |
173 | ||
174 | static irqreturn_t fsg_reset_handler(int irq, void *dev_id) | |
175 | { | |
176 | /* This is the paper-clip reset which does an emergency reboot. */ | |
177 | printk(KERN_INFO "Restarting system.\n"); | |
178 | machine_restart(NULL); | |
179 | ||
180 | /* This should never be reached. */ | |
181 | return IRQ_HANDLED; | |
182 | } | |
183 | ||
184 | static void __init fsg_init(void) | |
185 | { | |
7e36e2f5 | 186 | uint8_t __iomem *f; |
7e36e2f5 RW |
187 | |
188 | ixp4xx_sys_init(); | |
189 | ||
190 | fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); | |
191 | fsg_flash_resource.end = | |
192 | IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; | |
193 | ||
194 | *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; | |
195 | *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; | |
196 | ||
197 | /* Configure CS2 for operation, 8bit and writable */ | |
198 | *IXP4XX_EXP_CS2 = 0xbfff0002; | |
199 | ||
200 | i2c_register_board_info(0, fsg_i2c_board_info, | |
201 | ARRAY_SIZE(fsg_i2c_board_info)); | |
202 | ||
203 | /* This is only useful on a modified machine, but it is valuable | |
204 | * to have it first in order to see debug messages, and so that | |
205 | * it does *not* get removed if platform_add_devices fails! | |
206 | */ | |
207 | (void)platform_device_register(&fsg_uart); | |
208 | ||
209 | platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices)); | |
210 | ||
211 | if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler, | |
1ee6564d | 212 | IRQF_TRIGGER_LOW, "FSG reset button", NULL) < 0) { |
7e36e2f5 RW |
213 | |
214 | printk(KERN_DEBUG "Reset Button IRQ %d not available\n", | |
215 | gpio_to_irq(FSG_RB_GPIO)); | |
216 | } | |
217 | ||
218 | if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler, | |
1ee6564d | 219 | IRQF_TRIGGER_LOW, "FSG power button", NULL) < 0) { |
7e36e2f5 RW |
220 | |
221 | printk(KERN_DEBUG "Power Button IRQ %d not available\n", | |
222 | gpio_to_irq(FSG_SB_GPIO)); | |
223 | } | |
224 | ||
225 | /* | |
226 | * Map in a portion of the flash and read the MAC addresses. | |
227 | * Since it is stored in BE in the flash itself, we need to | |
228 | * byteswap it if we're in LE mode. | |
229 | */ | |
230 | f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000); | |
231 | if (f) { | |
232 | #ifdef __ARMEB__ | |
d90c1add | 233 | int i; |
7e36e2f5 RW |
234 | for (i = 0; i < 6; i++) { |
235 | fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i); | |
236 | fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i); | |
237 | } | |
238 | #else | |
239 | ||
240 | /* | |
241 | Endian-swapped reads from unaligned addresses are | |
242 | required to extract the two MACs from the big-endian | |
243 | Redboot config area in flash. | |
244 | */ | |
245 | ||
246 | fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421); | |
247 | fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420); | |
248 | fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427); | |
249 | fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426); | |
250 | fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425); | |
251 | fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424); | |
252 | ||
253 | fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439); | |
254 | fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F); | |
255 | fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E); | |
256 | fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D); | |
257 | fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C); | |
258 | fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443); | |
259 | #endif | |
260 | iounmap(f); | |
261 | } | |
e174961c JB |
262 | printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n", |
263 | fsg_plat_eth[0].hwaddr); | |
264 | printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n", | |
265 | fsg_plat_eth[1].hwaddr); | |
7e36e2f5 RW |
266 | |
267 | } | |
268 | ||
269 | MACHINE_START(FSG, "Freecom FSG-3") | |
270 | /* Maintainer: www.nslu2-linux.org */ | |
7e36e2f5 | 271 | .map_io = ixp4xx_map_io, |
f449588c | 272 | .init_early = ixp4xx_init_early, |
7e36e2f5 | 273 | .init_irq = ixp4xx_init_irq, |
6bb27d73 | 274 | .init_time = ixp4xx_timer_init, |
e022c729 | 275 | .atag_offset = 0x100, |
7e36e2f5 | 276 | .init_machine = fsg_init, |
7553ee77 NP |
277 | #if defined(CONFIG_PCI) |
278 | .dma_zone_size = SZ_64M, | |
279 | #endif | |
d1b860fb | 280 | .restart = ixp4xx_restart, |
7e36e2f5 RW |
281 | MACHINE_END |
282 |