usb: otg: ulpi: Start using struct usb_otg
[linux-2.6-block.git] / arch / arm / mach-imx / mm-imx21.c
CommitLineData
eea643f7 1/*
d109167b 2 * arch/arm/mach-imx/mm-imx21.c
eea643f7
JB
3 *
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#include <linux/mm.h>
22#include <linux/init.h>
a09e64fb 23#include <mach/hardware.h>
058b7a6f 24#include <mach/common.h>
36223604 25#include <mach/devices-common.h>
eea643f7
JB
26#include <asm/pgtable.h>
27#include <asm/mach/map.h>
5ae30b47 28#include <mach/irqs.h>
ff255feb 29#include <mach/iomux-v1.h>
eea643f7 30
4a50d00c
UKK
31/* MX21 memory map definition */
32static struct map_desc imx21_io_desc[] __initdata = {
eea643f7
JB
33 /*
34 * this fixed mapping covers:
35 * - AIPI1
36 * - AIPI2
37 * - AITC
38 * - ROM Patch
39 * - and some reserved space
40 */
08ff97b5 41 imx_map_entry(MX21, AIPI, MT_DEVICE),
eea643f7
JB
42 /*
43 * this fixed mapping covers:
44 * - CSI
45 * - ATA
46 */
08ff97b5 47 imx_map_entry(MX21, SAHB1, MT_DEVICE),
eea643f7
JB
48 /*
49 * this fixed mapping covers:
50 * - EMI
51 */
08ff97b5 52 imx_map_entry(MX21, X_MEMC, MT_DEVICE),
eea643f7
JB
53};
54
55/*
56 * Initialize the memory map. It is called during the
57 * system startup to create static physical to virtual
58 * memory map for the IO modules.
59 */
cd4a05f9 60void __init mx21_map_io(void)
3dac2196
UKK
61{
62 iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
63}
64
65void __init imx21_init_early(void)
eea643f7 66{
cd4a05f9 67 mxc_set_cpu_type(MXC_CPU_MX21);
4a50d00c 68 mxc_arch_reset_init(MX21_IO_ADDRESS(MX21_WDOG_BASE_ADDR));
ff255feb
SH
69 imx_iomuxv1_init(MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR),
70 MX21_NUM_GPIO_PORT);
c5aa0ad0
SH
71}
72
73void __init mx21_init_irq(void)
74{
4a50d00c 75 mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
b78d8e59
SG
76}
77
78void __init imx21_soc_init(void)
79{
e7fc6ae7
SG
80 mxc_register_gpio("imx21-gpio", 0, MX21_GPIO1_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
81 mxc_register_gpio("imx21-gpio", 1, MX21_GPIO2_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
82 mxc_register_gpio("imx21-gpio", 2, MX21_GPIO3_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
83 mxc_register_gpio("imx21-gpio", 3, MX21_GPIO4_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
84 mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
85 mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
36223604
SG
86
87 imx_add_imx_dma();
c5aa0ad0 88}