[linux-2.6-block.git] / arch / arm / mach-imx / mach-pca100.c

/*
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/dma-mapping.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/fsl_devices.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>
#include <asm/mach/time.h>
#include <mach/audmux.h>
#include <mach/mxc_nand.h>
#include <mach/irqs.h>
#include <mach/mmc.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>
#include <mach/imxfb.h>

#include "devices-imx27.h"
#include "devices.h"

#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
#define SPI1_SS0 (GPIO_PORTD + 28)
#define SPI1_SS1 (GPIO_PORTD + 27)
#define SD2_CD (GPIO_PORTC + 29)

static const int pca100_pins[] __initconst = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* SDHC */
	PB4_PF_SD2_D0,
	PB5_PF_SD2_D1,
	PB6_PF_SD2_D2,
	PB7_PF_SD2_D3,
	PB8_PF_SD2_CMD,
	PB9_PF_SD2_CLK,
	SD2_CD | GPIO_GPIO | GPIO_IN,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* SSI1 */
	PC20_PF_SSI1_FS,
	PC21_PF_SSI1_RXD,
	PC22_PF_SSI1_TXD,
	PC23_PF_SSI1_CLK,
	/* onboard I2C */
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* external I2C */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* SPI1 */
	PD25_PF_CSPI1_RDY,
	PD29_PF_CSPI1_SCLK,
	PD30_PF_CSPI1_MISO,
	PD31_PF_CSPI1_MOSI,
	/* OTG */
	OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PC9_PF_USBOTG_DATA0,
	PC10_PF_USBOTG_DATA2,
	PC11_PF_USBOTG_DATA1,
	PC12_PF_USBOTG_DATA4,
	PC13_PF_USBOTG_DATA3,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PE2_PF_USBOTG_DIR,
	PE24_PF_USBOTG_CLK,
	PE25_PF_USBOTG_DATA7,
	/* USBH2 */
	USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
	PA0_PF_USBH2_CLK,
	PA1_PF_USBH2_DIR,
	PA2_PF_USBH2_DATA7,
	PA3_PF_USBH2_NXT,
	PA4_PF_USBH2_STP,
	PD19_AF_USBH2_DATA4,
	PD20_AF_USBH2_DATA3,
	PD21_AF_USBH2_DATA6,
	PD22_AF_USBH2_DATA0,
	PD23_AF_USBH2_DATA2,
	PD24_AF_USBH2_DATA1,
	PD26_AF_USBH2_DATA5,
	/* display */
	PA5_PF_LSCLK,
	PA6_PF_LD0,
	PA7_PF_LD1,
	PA8_PF_LD2,
	PA9_PF_LD3,
	PA10_PF_LD4,
	PA11_PF_LD5,
	PA12_PF_LD6,
	PA13_PF_LD7,
	PA14_PF_LD8,
	PA15_PF_LD9,
	PA16_PF_LD10,
	PA17_PF_LD11,
	PA18_PF_LD12,
	PA19_PF_LD13,
	PA20_PF_LD14,
	PA21_PF_LD15,
	PA22_PF_LD16,
	PA23_PF_LD17,
	PA26_PF_PS,
	PA28_PF_HSYNC,
	PA29_PF_VSYNC,
	PA31_PF_OE_ACD,
	/* free GPIO */
	GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
	GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
	GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static const struct mxc_nand_platform_data
pca100_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct at24_platform_data board_eeprom = {
	.byte_len = 4096,
	.page_size = 32,
	.flags = AT24_FLAG_ADDR16,
};

static struct i2c_board_info pca100_i2c_devices[] = {
	{
		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
		.platform_data = &board_eeprom,
	}, {
		I2C_BOARD_INFO("pcf8563", 0x51),
	}, {
		I2C_BOARD_INFO("lm75", 0x4a),
	}
};

#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
static struct spi_eeprom at25320 = {
	.name		= "at25320an",
	.byte_len	= 4096,
	.page_size	= 32,
	.flags		= EE_ADDR2,
};

static struct spi_board_info pca100_spi_board_info[] __initdata = {
	{
		.modalias = "at25",
		.max_speed_hz = 30000,
		.bus_num = 0,
		.chip_select = 1,
		.platform_data = &at25320,
	},
};

static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};

static const struct spi_imx_master pca100_spi0_data __initconst = {
	.chipselect	= pca100_spi_cs,
	.num_chipselect = ARRAY_SIZE(pca100_spi_cs),
};
#endif

static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
{
	mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
	gpio_set_value(GPIO_PORTC + 20, 1);
	udelay(2);
	gpio_set_value(GPIO_PORTC + 20, 0);
	mxc_gpio_mode(PC20_PF_SSI1_FS);
	msleep(2);
}

static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
{
	mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);  /* FS */
	gpio_set_value(GPIO_PORTC + 20, 0);
	mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT);  /* TX */
	gpio_set_value(GPIO_PORTC + 22, 0);
	mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT);  /* reset */
	gpio_set_value(GPIO_PORTC + 28, 0);
	udelay(10);
	gpio_set_value(GPIO_PORTC + 28, 1);
	mxc_gpio_mode(PC20_PF_SSI1_FS);
	mxc_gpio_mode(PC22_PF_SSI1_TXD);
	msleep(2);
}

static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
	.ac97_reset		= pca100_ac97_cold_reset,
	.ac97_warm_reset	= pca100_ac97_warm_reset,
	.flags			= IMX_SSI_USE_AC97,
};

static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
		void *data)
{
	int ret;

	ret = request_irq(IRQ_GPIOC(29), detect_irq,
			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
			  "imx-mmc-detect", data);
	if (ret)
		printk(KERN_ERR
			"pca100: Failed to reuest irq for sd/mmc detection\n");

	return ret;
}

static void pca100_sdhc2_exit(struct device *dev, void *data)
{
	free_irq(IRQ_GPIOC(29), data);
}

static struct imxmmc_platform_data sdhc_pdata = {
	.init = pca100_sdhc2_init,
	.exit = pca100_sdhc2_exit,
};

#if defined(CONFIG_USB_ULPI)
static int otg_phy_init(struct platform_device *pdev)
{
	gpio_set_value(OTG_PHY_CS_GPIO, 0);
	return 0;
}

static struct mxc_usbh_platform_data otg_pdata = {
	.init	= otg_phy_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
};

static int usbh2_phy_init(struct platform_device *pdev)
{
	gpio_set_value(USBH2_PHY_CS_GPIO, 0);
	return 0;
}

static struct mxc_usbh_platform_data usbh2_pdata = {
	.init	= usbh2_phy_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
};
#endif

static struct fsl_usb2_platform_data otg_device_pdata = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode       = FSL_USB2_PHY_ULPI,
};

static int otg_mode_host;

static int __init pca100_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = 1;
	else if (!strcmp(options, "device"))
		otg_mode_host = 0;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 0;
}
__setup("otg_mode=", pca100_otg_mode);

/* framebuffer info */
static struct imx_fb_videomode pca100_fb_modes[] = {
	{
		.mode = {
			.name		= "EMERGING-ETV570G0DHU",
			.refresh	= 60,
			.xres		= 640,
			.yres		= 480,
			.pixclock	= 39722, /* in ps (25.175 MHz) */
			.hsync_len	= 30,
			.left_margin	= 114,
			.right_margin	= 16,
			.vsync_len	= 3,
			.upper_margin	= 32,
			.lower_margin	= 0,
		},
		/*
		 * TFT
		 * Pixel pol active high
		 * HSYNC active low
		 * VSYNC active low
		 * use HSYNC for ACD count
		 * line clock disable while idle
		 * always enable line clock even if no data
		 */
		.pcr = 0xf0c08080,
		.bpp = 16,
	},
};

static struct imx_fb_platform_data pca100_fb_data = {
	.mode = pca100_fb_modes,
	.num_modes = ARRAY_SIZE(pca100_fb_modes),

	.pwmr		= 0x00A903FF,
	.lscr1		= 0x00120300,
	.dmacr		= 0x00020010,
};

static void __init pca100_init(void)
{
	int ret;

	/* SSI unit */
	mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
				  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
				  MXC_AUDMUX_V1_PCR_TFCSEL(3) |
				  MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
				  MXC_AUDMUX_V1_PCR_RXDSEL(3));
	mxc_audmux_v1_configure_port(3,
				  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
				  MXC_AUDMUX_V1_PCR_TFCSEL(0) |
				  MXC_AUDMUX_V1_PCR_TFSDIR |
				  MXC_AUDMUX_V1_PCR_RXDSEL(0));

	ret = mxc_gpio_setup_multiple_pins(pca100_pins,
			ARRAY_SIZE(pca100_pins), "PCA100");
	if (ret)
		printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);

	imx27_add_imx_ssi(0, &pca100_ssi_pdata);

	imx27_add_imx_uart0(&uart_pdata);

	mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);

	imx27_add_mxc_nand(&pca100_nand_board_info);

	/* only the i2c master 1 is used on this CPU card */
	i2c_register_board_info(1, pca100_i2c_devices,
				ARRAY_SIZE(pca100_i2c_devices));

	imx27_add_imx_i2c(1, &pca100_i2c1_data);

#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
	mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
	spi_register_board_info(pca100_spi_board_info,
				ARRAY_SIZE(pca100_spi_board_info));
	imx27_add_spi_imx0(&pca100_spi0_data);
#endif

	gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
	gpio_direction_output(OTG_PHY_CS_GPIO, 1);
	gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
	gpio_direction_output(USBH2_PHY_CS_GPIO, 1);

#if defined(CONFIG_USB_ULPI)
	if (otg_mode_host) {
		otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);

		mxc_register_device(&mxc_otg_host, &otg_pdata);
	}

	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);

	mxc_register_device(&mxc_usbh2, &usbh2_pdata);
#endif
	if (!otg_mode_host) {
		gpio_set_value(OTG_PHY_CS_GPIO, 0);
		mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
	}

	mxc_register_device(&mxc_fb_device, &pca100_fb_data);

	imx27_add_fec(NULL);
	imx27_add_imx2_wdt(NULL);
	imx27_add_mxc_w1(NULL);
}

static void __init pca100_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer pca100_timer = {
	.init = pca100_timer_init,
};

MACHINE_START(PCA100, "phyCARD-i.MX27")
	.boot_params    = MX27_PHYS_OFFSET + 0x100,
	.map_io         = mx27_map_io,
	.init_irq       = mx27_init_irq,
	.init_machine   = pca100_init,
	.timer          = &pca100_timer,
MACHINE_END
Commit	Line	Data
33731698 LF	1	/*
	2	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	3	* Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	17	* MA 02110-1301, USA.
	18	*/
	19
	20	#include <linux/platform_device.h>
	21	#include <linux/io.h>
	22	#include <linux/i2c.h>
	23	#include <linux/i2c/at24.h>
	24	#include <linux/dma-mapping.h>
	25	#include <linux/spi/spi.h>
	26	#include <linux/spi/eeprom.h>
	27	#include <linux/irq.h>
c8a6885f	28	#include <linux/delay.h>
33731698	29	#include <linux/gpio.h>
eee7c497 SH	30	#include <linux/usb/otg.h>
	31	#include <linux/usb/ulpi.h>
	32	#include <linux/fsl_devices.h>
33731698 LF	33
	34	#include <asm/mach/arch.h>
	35	#include <asm/mach-types.h>
	36	#include <mach/common.h>
	37	#include <mach/hardware.h>
e835d88e	38	#include <mach/iomux-mx27.h>
33731698	39	#include <asm/mach/time.h>
c8a6885f	40	#include <mach/audmux.h>
33731698 LF	41	#include <mach/mxc_nand.h>
	42	#include <mach/irqs.h>
	43	#include <mach/mmc.h>
eee7c497 SH	44	#include <mach/mxc_ehci.h>
eee7c497 SH	45	#include <mach/ulpi.h>
42216fc5	46	#include <mach/imxfb.h>
33731698	47
0e7a29a8	48	#include "devices-imx27.h"
33731698 LF	49	#include "devices.h"
33731698 LF	50
eee7c497 SH	51	#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
eee7c497 SH	52	#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
b725abad LF	53	#define SPI1_SS0 (GPIO_PORTD + 28)
	54	#define SPI1_SS1 (GPIO_PORTD + 27)
	55	#define SD2_CD (GPIO_PORTC + 29)
eee7c497	56
6c80ee51	57	static const int pca100_pins[] __initconst = {
33731698 LF	58	/* UART1 */
	59	PE12_PF_UART1_TXD,
	60	PE13_PF_UART1_RXD,
	61	PE14_PF_UART1_CTS,
	62	PE15_PF_UART1_RTS,
	63	/* SDHC */
	64	PB4_PF_SD2_D0,
	65	PB5_PF_SD2_D1,
	66	PB6_PF_SD2_D2,
	67	PB7_PF_SD2_D3,
	68	PB8_PF_SD2_CMD,
	69	PB9_PF_SD2_CLK,
b725abad	70	SD2_CD \| GPIO_GPIO \| GPIO_IN,
33731698 LF	71	/* FEC */
	72	PD0_AIN_FEC_TXD0,
	73	PD1_AIN_FEC_TXD1,
	74	PD2_AIN_FEC_TXD2,
	75	PD3_AIN_FEC_TXD3,
	76	PD4_AOUT_FEC_RX_ER,
	77	PD5_AOUT_FEC_RXD1,
	78	PD6_AOUT_FEC_RXD2,
	79	PD7_AOUT_FEC_RXD3,
	80	PD8_AF_FEC_MDIO,
	81	PD9_AIN_FEC_MDC,
	82	PD10_AOUT_FEC_CRS,
	83	PD11_AOUT_FEC_TX_CLK,
	84	PD12_AOUT_FEC_RXD0,
	85	PD13_AOUT_FEC_RX_DV,
	86	PD14_AOUT_FEC_RX_CLK,
	87	PD15_AOUT_FEC_COL,
	88	PD16_AIN_FEC_TX_ER,
	89	PF23_AIN_FEC_TX_EN,
	90	/* SSI1 */
	91	PC20_PF_SSI1_FS,
	92	PC21_PF_SSI1_RXD,
	93	PC22_PF_SSI1_TXD,
	94	PC23_PF_SSI1_CLK,
	95	/* onboard I2C */
	96	PC5_PF_I2C2_SDA,
	97	PC6_PF_I2C2_SCL,
	98	/* external I2C */
	99	PD17_PF_I2C_DATA,
	100	PD18_PF_I2C_CLK,
	101	/* SPI1 */
	102	PD25_PF_CSPI1_RDY,
	103	PD29_PF_CSPI1_SCLK,
	104	PD30_PF_CSPI1_MISO,
	105	PD31_PF_CSPI1_MOSI,
eee7c497 SH	106	/* OTG */
	107	OTG_PHY_CS_GPIO \| GPIO_GPIO \| GPIO_OUT,
	108	PC7_PF_USBOTG_DATA5,
	109	PC8_PF_USBOTG_DATA6,
	110	PC9_PF_USBOTG_DATA0,
	111	PC10_PF_USBOTG_DATA2,
	112	PC11_PF_USBOTG_DATA1,
	113	PC12_PF_USBOTG_DATA4,
	114	PC13_PF_USBOTG_DATA3,
	115	PE0_PF_USBOTG_NXT,
	116	PE1_PF_USBOTG_STP,
	117	PE2_PF_USBOTG_DIR,
	118	PE24_PF_USBOTG_CLK,
	119	PE25_PF_USBOTG_DATA7,
	120	/* USBH2 */
	121	USBH2_PHY_CS_GPIO \| GPIO_GPIO \| GPIO_OUT,
	122	PA0_PF_USBH2_CLK,
	123	PA1_PF_USBH2_DIR,
	124	PA2_PF_USBH2_DATA7,
	125	PA3_PF_USBH2_NXT,
	126	PA4_PF_USBH2_STP,
	127	PD19_AF_USBH2_DATA4,
	128	PD20_AF_USBH2_DATA3,
	129	PD21_AF_USBH2_DATA6,
	130	PD22_AF_USBH2_DATA0,
	131	PD23_AF_USBH2_DATA2,
	132	PD24_AF_USBH2_DATA1,
	133	PD26_AF_USBH2_DATA5,
42216fc5 LF	134	/* display */
	135	PA5_PF_LSCLK,
	136	PA6_PF_LD0,
	137	PA7_PF_LD1,
	138	PA8_PF_LD2,
	139	PA9_PF_LD3,
	140	PA10_PF_LD4,
	141	PA11_PF_LD5,
	142	PA12_PF_LD6,
	143	PA13_PF_LD7,
	144	PA14_PF_LD8,
	145	PA15_PF_LD9,
	146	PA16_PF_LD10,
	147	PA17_PF_LD11,
	148	PA18_PF_LD12,
	149	PA19_PF_LD13,
	150	PA20_PF_LD14,
	151	PA21_PF_LD15,
	152	PA22_PF_LD16,
	153	PA23_PF_LD17,
	154	PA26_PF_PS,
	155	PA28_PF_HSYNC,
	156	PA29_PF_VSYNC,
	157	PA31_PF_OE_ACD,
b725abad LF	158	/* free GPIO */
	159	GPIO_PORTC \| 31 \| GPIO_GPIO \| GPIO_IN, /* GPIO0_IRQ */
	160	GPIO_PORTC \| 25 \| GPIO_GPIO \| GPIO_IN, /* GPIO1_IRQ */
	161	GPIO_PORTE \| 5 \| GPIO_GPIO \| GPIO_IN, /* GPIO2_IRQ */
33731698 LF	162	};
33731698 LF	163
d5dac4a6	164	static const struct imxuart_platform_data uart_pdata __initconst = {
33731698 LF	165	.flags = IMXUART_HAVE_RTSCTS,
	166	};
	167
0e7a29a8 UKK	168	static const struct mxc_nand_platform_data
0e7a29a8 UKK	169	pca100_nand_board_info __initconst = {
33731698 LF	170	.width = 1,
	171	.hw_ecc = 1,
	172	};
	173
c6987159	174	static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
33731698 LF	175	.bitrate = 100000,
	176	};
	177
	178	static struct at24_platform_data board_eeprom = {
	179	.byte_len = 4096,
	180	.page_size = 32,
	181	.flags = AT24_FLAG_ADDR16,
	182	};
	183
	184	static struct i2c_board_info pca100_i2c_devices[] = {
	185	{
	186	I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
	187	.platform_data = &board_eeprom,
	188	}, {
bd9e310d	189	I2C_BOARD_INFO("pcf8563", 0x51),
33731698 LF	190	}, {
33731698 LF	191	I2C_BOARD_INFO("lm75", 0x4a),
33731698 LF	192	}
	193	};
	194
	195	#if defined(CONFIG_SPI_IMX) \|\| defined(CONFIG_SPI_IMX_MODULE)
	196	static struct spi_eeprom at25320 = {
	197	.name = "at25320an",
	198	.byte_len = 4096,
	199	.page_size = 32,
	200	.flags = EE_ADDR2,
	201	};
	202
	203	static struct spi_board_info pca100_spi_board_info[] __initdata = {
	204	{
	205	.modalias = "at25",
	206	.max_speed_hz = 30000,
	207	.bus_num = 0,
	208	.chip_select = 1,
	209	.platform_data = &at25320,
	210	},
	211	};
	212
b725abad	213	static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
33731698	214
7536cf99	215	static const struct spi_imx_master pca100_spi0_data __initconst = {
33731698 LF	216	.chipselect = pca100_spi_cs,
	217	.num_chipselect = ARRAY_SIZE(pca100_spi_cs),
	218	};
	219	#endif
	220
c8a6885f SH	221	static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
	222	{
	223	mxc_gpio_mode(GPIO_PORTC \| 20 \| GPIO_GPIO \| GPIO_OUT);
	224	gpio_set_value(GPIO_PORTC + 20, 1);
	225	udelay(2);
	226	gpio_set_value(GPIO_PORTC + 20, 0);
	227	mxc_gpio_mode(PC20_PF_SSI1_FS);
	228	msleep(2);
	229	}
	230
	231	static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
	232	{
	233	mxc_gpio_mode(GPIO_PORTC \| 20 \| GPIO_GPIO \| GPIO_OUT); /* FS */
	234	gpio_set_value(GPIO_PORTC + 20, 0);
	235	mxc_gpio_mode(GPIO_PORTC \| 22 \| GPIO_GPIO \| GPIO_OUT); /* TX */
	236	gpio_set_value(GPIO_PORTC + 22, 0);
	237	mxc_gpio_mode(GPIO_PORTC \| 28 \| GPIO_GPIO \| GPIO_OUT); /* reset */
	238	gpio_set_value(GPIO_PORTC + 28, 0);
	239	udelay(10);
	240	gpio_set_value(GPIO_PORTC + 28, 1);
	241	mxc_gpio_mode(PC20_PF_SSI1_FS);
	242	mxc_gpio_mode(PC22_PF_SSI1_TXD);
	243	msleep(2);
	244	}
	245
4697bb92	246	static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
c8a6885f SH	247	.ac97_reset = pca100_ac97_cold_reset,
	248	.ac97_warm_reset = pca100_ac97_warm_reset,
	249	.flags = IMX_SSI_USE_AC97,
	250	};
	251
33731698 LF	252	static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
	253	void *data)
	254	{
	255	int ret;
	256
	257	ret = request_irq(IRQ_GPIOC(29), detect_irq,
	258	IRQF_DISABLED \| IRQF_TRIGGER_FALLING,
	259	"imx-mmc-detect", data);
	260	if (ret)
	261	printk(KERN_ERR
	262	"pca100: Failed to reuest irq for sd/mmc detection\n");
	263
	264	return ret;
	265	}
	266
	267	static void pca100_sdhc2_exit(struct device dev, void data)
	268	{
	269	free_irq(IRQ_GPIOC(29), data);
	270	}
	271
	272	static struct imxmmc_platform_data sdhc_pdata = {
	273	.init = pca100_sdhc2_init,
	274	.exit = pca100_sdhc2_exit,
	275	};
	276
c18e8fa5	277	#if defined(CONFIG_USB_ULPI)
eee7c497 SH	278	static int otg_phy_init(struct platform_device *pdev)
	279	{
	280	gpio_set_value(OTG_PHY_CS_GPIO, 0);
	281	return 0;
	282	}
	283
	284	static struct mxc_usbh_platform_data otg_pdata = {
	285	.init = otg_phy_init,
	286	.portsc = MXC_EHCI_MODE_ULPI,
	287	.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
	288	};
	289
	290	static int usbh2_phy_init(struct platform_device *pdev)
	291	{
	292	gpio_set_value(USBH2_PHY_CS_GPIO, 0);
	293	return 0;
	294	}
	295
	296	static struct mxc_usbh_platform_data usbh2_pdata = {
	297	.init = usbh2_phy_init,
	298	.portsc = MXC_EHCI_MODE_ULPI,
	299	.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
	300	};
c18e8fa5	301	#endif
eee7c497 SH	302
	303	static struct fsl_usb2_platform_data otg_device_pdata = {
	304	.operating_mode = FSL_USB2_DR_DEVICE,
	305	.phy_mode = FSL_USB2_PHY_ULPI,
	306	};
	307
	308	static int otg_mode_host;
	309
	310	static int __init pca100_otg_mode(char *options)
	311	{
	312	if (!strcmp(options, "host"))
	313	otg_mode_host = 1;
	314	else if (!strcmp(options, "device"))
	315	otg_mode_host = 0;
	316	else
	317	pr_info("otg_mode neither \"host\" nor \"device\". "
	318	"Defaulting to device\n");
	319	return 0;
	320	}
	321	__setup("otg_mode=", pca100_otg_mode);
	322
42216fc5 LF	323	/* framebuffer info */
	324	static struct imx_fb_videomode pca100_fb_modes[] = {
	325	{
	326	.mode = {
	327	.name = "EMERGING-ETV570G0DHU",
	328	.refresh = 60,
	329	.xres = 640,
	330	.yres = 480,
	331	.pixclock = 39722, /* in ps (25.175 MHz) */
	332	.hsync_len = 30,
	333	.left_margin = 114,
	334	.right_margin = 16,
	335	.vsync_len = 3,
	336	.upper_margin = 32,
	337	.lower_margin = 0,
	338	},
	339	/*
	340	* TFT
	341	* Pixel pol active high
	342	* HSYNC active low
	343	* VSYNC active low
	344	* use HSYNC for ACD count
	345	* line clock disable while idle
	346	* always enable line clock even if no data
	347	*/
	348	.pcr = 0xf0c08080,
	349	.bpp = 16,
	350	},
	351	};
	352
	353	static struct imx_fb_platform_data pca100_fb_data = {
	354	.mode = pca100_fb_modes,
	355	.num_modes = ARRAY_SIZE(pca100_fb_modes),
	356
	357	.pwmr = 0x00A903FF,
	358	.lscr1 = 0x00120300,
	359	.dmacr = 0x00020010,
	360	};
	361
33731698 LF	362	static void __init pca100_init(void)
	363	{
	364	int ret;
	365
c8a6885f SH	366	/* SSI unit */
	367	mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
	368	MXC_AUDMUX_V1_PCR_SYN \| /* 4wire mode */
	369	MXC_AUDMUX_V1_PCR_TFCSEL(3) \|
	370	MXC_AUDMUX_V1_PCR_TCLKDIR \| /* clock is output */
	371	MXC_AUDMUX_V1_PCR_RXDSEL(3));
	372	mxc_audmux_v1_configure_port(3,
	373	MXC_AUDMUX_V1_PCR_SYN \| /* 4wire mode */
	374	MXC_AUDMUX_V1_PCR_TFCSEL(0) \|
	375	MXC_AUDMUX_V1_PCR_TFSDIR \|
	376	MXC_AUDMUX_V1_PCR_RXDSEL(0));
	377
33731698 LF	378	ret = mxc_gpio_setup_multiple_pins(pca100_pins,
	379	ARRAY_SIZE(pca100_pins), "PCA100");
	380	if (ret)
	381	printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
	382
4697bb92	383	imx27_add_imx_ssi(0, &pca100_ssi_pdata);
c8a6885f	384
d5dac4a6	385	imx27_add_imx_uart0(&uart_pdata);
33731698	386
33731698 LF	387	mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
33731698 LF	388
0e7a29a8	389	imx27_add_mxc_nand(&pca100_nand_board_info);
33731698 LF	390
	391	/* only the i2c master 1 is used on this CPU card */
	392	i2c_register_board_info(1, pca100_i2c_devices,
	393	ARRAY_SIZE(pca100_i2c_devices));
	394
77a406da	395	imx27_add_imx_i2c(1, &pca100_i2c1_data);
33731698	396
33731698	397	#if defined(CONFIG_SPI_IMX) \|\| defined(CONFIG_SPI_IMX_MODULE)
b725abad LF	398	mxc_gpio_mode(GPIO_PORTD \| 28 \| GPIO_GPIO \| GPIO_IN);
b725abad LF	399	mxc_gpio_mode(GPIO_PORTD \| 27 \| GPIO_GPIO \| GPIO_IN);
33731698 LF	400	spi_register_board_info(pca100_spi_board_info,
33731698 LF	401	ARRAY_SIZE(pca100_spi_board_info));
4df772d7	402	imx27_add_spi_imx0(&pca100_spi0_data);
33731698 LF	403	#endif
33731698 LF	404
eee7c497 SH	405	gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
	406	gpio_direction_output(OTG_PHY_CS_GPIO, 1);
	407	gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
	408	gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
	409
	410	#if defined(CONFIG_USB_ULPI)
	411	if (otg_mode_host) {
	412	otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
70ddd47f	413	ULPI_OTG_DRVVBUS \| ULPI_OTG_DRVVBUS_EXT);
eee7c497 SH	414
	415	mxc_register_device(&mxc_otg_host, &otg_pdata);
	416	}
	417
	418	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
70ddd47f	419	ULPI_OTG_DRVVBUS \| ULPI_OTG_DRVVBUS_EXT);
eee7c497 SH	420
	421	mxc_register_device(&mxc_usbh2, &usbh2_pdata);
	422	#endif
	423	if (!otg_mode_host) {
	424	gpio_set_value(OTG_PHY_CS_GPIO, 0);
	425	mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
	426	}
	427
42216fc5 LF	428	mxc_register_device(&mxc_fb_device, &pca100_fb_data);
42216fc5 LF	429
6bd96f3c	430	imx27_add_fec(NULL);
e0a1961d	431	imx27_add_imx2_wdt(NULL);
ae71a562	432	imx27_add_mxc_w1(NULL);
33731698 LF	433	}
	434
	435	static void __init pca100_timer_init(void)
	436	{
	437	mx27_clocks_init(26000000);
	438	}
	439
	440	static struct sys_timer pca100_timer = {
	441	.init = pca100_timer_init,
	442	};
	443
	444	MACHINE_START(PCA100, "phyCARD-i.MX27")
34101237	445	.boot_params = MX27_PHYS_OFFSET + 0x100,
33731698	446	.map_io = mx27_map_io,
f6f1bc64	447	.init_irq = mx27_init_irq,
33731698 LF	448	.init_machine = pca100_init,
	449	.timer = &pca100_timer,
	450	MACHINE_END
	451