[linux-2.6-block.git] / arch / arm / mach-imx / mach-mxt_td60.c

/*
 *  Copyright (C) 2000 Deep Blue Solutions Ltd
 *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
 *  Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/irq.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <linux/gpio.h>
#include <mach/iomux-mx27.h>
#include <linux/i2c/pca953x.h>

#include "devices-imx27.h"

static const int mxt_td60_pins[] __initconst = {
	/* UART0 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* UART1 */
	PE3_PF_UART2_CTS,
	PE4_PF_UART2_RTS,
	PE6_PF_UART2_TXD,
	PE7_PF_UART2_RXD,
	/* UART2 */
	PE8_PF_UART3_TXD,
	PE9_PF_UART3_RXD,
	PE10_PF_UART3_CTS,
	PE11_PF_UART3_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* I2C1 */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* I2C2 */
	PC5_PF_I2C2_SDA,
	PC6_PF_I2C2_SCL,
	/* FB */
	PA5_PF_LSCLK,
	PA6_PF_LD0,
	PA7_PF_LD1,
	PA8_PF_LD2,
	PA9_PF_LD3,
	PA10_PF_LD4,
	PA11_PF_LD5,
	PA12_PF_LD6,
	PA13_PF_LD7,
	PA14_PF_LD8,
	PA15_PF_LD9,
	PA16_PF_LD10,
	PA17_PF_LD11,
	PA18_PF_LD12,
	PA19_PF_LD13,
	PA20_PF_LD14,
	PA21_PF_LD15,
	PA22_PF_LD16,
	PA23_PF_LD17,
	PA25_PF_CLS,
	PA27_PF_SPL_SPR,
	PA28_PF_HSYNC,
	PA29_PF_VSYNC,
	PA30_PF_CONTRAST,
	PA31_PF_OE_ACD,
	/* OWIRE */
	PE16_AF_OWIRE,
	/* SDHC1*/
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,
	PF8_AF_ATA_IORDY,
	/* SDHC2*/
	PB4_PF_SD2_D0,
	PB5_PF_SD2_D1,
	PB6_PF_SD2_D2,
	PB7_PF_SD2_D3,
	PB8_PF_SD2_CMD,
	PB9_PF_SD2_CLK,
};

static const struct mxc_nand_platform_data
mxt_td60_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
};

static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
	.bitrate = 100000,
};

/* PCA9557 */
static int mxt_td60_pca9557_setup(struct i2c_client *client,
				unsigned gpio_base, unsigned ngpio,
				void *context)
{
	static int mxt_td60_gpio_value[] = {
		-1, -1, -1, -1, -1, -1, -1, 1
	};
	int n;

	for (n = 0; n < ARRAY_SIZE(mxt_td60_gpio_value); ++n) {
		gpio_request(gpio_base + n, "MXT_TD60 GPIO Exp");
		if (mxt_td60_gpio_value[n] < 0)
			gpio_direction_input(gpio_base + n);
		else
			gpio_direction_output(gpio_base + n,
						mxt_td60_gpio_value[n]);
		gpio_export(gpio_base + n, 0);
	}

	return 0;
}

static struct pca953x_platform_data mxt_td60_pca9557_pdata = {
	.gpio_base	= 240, /* place PCA9557 after all MX27 gpio pins */
	.invert		= 0, /* Do not invert */
	.setup		= mxt_td60_pca9557_setup,
};

static struct i2c_board_info mxt_td60_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pca9557", 0x18),
		.platform_data = &mxt_td60_pca9557_pdata,
	},
};

static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
	.bitrate = 100000,
};

static struct i2c_board_info mxt_td60_i2c2_devices[] = {
};

static struct imx_fb_videomode mxt_td60_modes[] = {
	{
		.mode = {
			.name		= "Chimei LW700AT9003",
			.refresh	= 60,
			.xres		= 800,
			.yres		= 480,
			.pixclock	= 30303,
			.hsync_len	= 64,
			.left_margin	= 0x67,
			.right_margin	= 0x68,
			.vsync_len	= 16,
			.upper_margin	= 0x0f,
			.lower_margin	= 0x0f,
		},
		.bpp		= 16,
		.pcr		= 0xFA208B83,
	},
};

static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
	.mode = mxt_td60_modes,
	.num_modes = ARRAY_SIZE(mxt_td60_modes),

	/*
	 * - HSYNC active high
	 * - VSYNC active high
	 * - clk notenabled while idle
	 * - clock inverted
	 * - data not inverted
	 * - data enable low active
	 * - enable sharp mode
	 */
	.pwmr		= 0x00A903FF,
	.lscr1		= 0x00120300,
	.dmacr		= 0x00020010,
};

static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
				void *data)
{
	return request_irq(IRQ_GPIOF(8), detect_irq, IRQF_TRIGGER_FALLING,
				"sdhc1-card-detect", data);
}

static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(IRQ_GPIOF(8), data);
}

static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
	.init = mxt_td60_sdhc1_init,
	.exit = mxt_td60_sdhc1_exit,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static void __init mxt_td60_board_init(void)
{
	imx27_soc_init();

	mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
			"MXT_TD60");

	imx27_add_imx_uart0(&uart_pdata);
	imx27_add_imx_uart1(&uart_pdata);
	imx27_add_imx_uart2(&uart_pdata);
	imx27_add_mxc_nand(&mxt_td60_nand_board_info);

	i2c_register_board_info(0, mxt_td60_i2c_devices,
				ARRAY_SIZE(mxt_td60_i2c_devices));

	i2c_register_board_info(1, mxt_td60_i2c2_devices,
				ARRAY_SIZE(mxt_td60_i2c2_devices));

	imx27_add_imx_i2c(0, &mxt_td60_i2c0_data);
	imx27_add_imx_i2c(1, &mxt_td60_i2c1_data);
	imx27_add_imx_fb(&mxt_td60_fb_data);
	imx27_add_mxc_mmc(0, &sdhc1_pdata);
	imx27_add_fec(NULL);
}

static void __init mxt_td60_timer_init(void)
{
	mx27_clocks_init(26000000);
}

static struct sys_timer mxt_td60_timer = {
	.init	= mxt_td60_timer_init,
};

MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
	/* maintainer: Maxtrack Industrial */
	.atag_offset = 0x100,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.timer = &mxt_td60_timer,
	.init_machine = mxt_td60_board_init,
MACHINE_END
Commit	Line	Data
143a179d ACA	1	/*
	2	* Copyright (C) 2000 Deep Blue Solutions Ltd
	3	* Copyright (C) 2002 Shane Nay (shane@minirl.com)
	4	* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
143a179d ACA	15	*/
	16
	17	#include <linux/platform_device.h>
	18	#include <linux/mtd/mtd.h>
	19	#include <linux/mtd/map.h>
	20	#include <linux/mtd/partitions.h>
	21	#include <linux/mtd/physmap.h>
	22	#include <linux/i2c.h>
	23	#include <linux/irq.h>
	24	#include <mach/common.h>
	25	#include <mach/hardware.h>
	26	#include <asm/mach-types.h>
	27	#include <asm/mach/arch.h>
	28	#include <asm/mach/time.h>
	29	#include <asm/mach/map.h>
	30	#include <linux/gpio.h>
e835d88e	31	#include <mach/iomux-mx27.h>
9e3e7afe	32	#include <linux/i2c/pca953x.h>
143a179d	33
0e7a29a8	34	#include "devices-imx27.h"
143a179d	35
6c80ee51	36	static const int mxt_td60_pins[] __initconst = {
143a179d ACA	37	/* UART0 */
	38	PE12_PF_UART1_TXD,
	39	PE13_PF_UART1_RXD,
	40	PE14_PF_UART1_CTS,
	41	PE15_PF_UART1_RTS,
	42	/* UART1 */
	43	PE3_PF_UART2_CTS,
	44	PE4_PF_UART2_RTS,
	45	PE6_PF_UART2_TXD,
	46	PE7_PF_UART2_RXD,
	47	/* UART2 */
	48	PE8_PF_UART3_TXD,
	49	PE9_PF_UART3_RXD,
	50	PE10_PF_UART3_CTS,
	51	PE11_PF_UART3_RTS,
143a179d ACA	52	/* FEC */
	53	PD0_AIN_FEC_TXD0,
	54	PD1_AIN_FEC_TXD1,
	55	PD2_AIN_FEC_TXD2,
	56	PD3_AIN_FEC_TXD3,
	57	PD4_AOUT_FEC_RX_ER,
	58	PD5_AOUT_FEC_RXD1,
	59	PD6_AOUT_FEC_RXD2,
	60	PD7_AOUT_FEC_RXD3,
	61	PD8_AF_FEC_MDIO,
	62	PD9_AIN_FEC_MDC,
	63	PD10_AOUT_FEC_CRS,
	64	PD11_AOUT_FEC_TX_CLK,
	65	PD12_AOUT_FEC_RXD0,
	66	PD13_AOUT_FEC_RX_DV,
	67	PD14_AOUT_FEC_RX_CLK,
	68	PD15_AOUT_FEC_COL,
	69	PD16_AIN_FEC_TX_ER,
	70	PF23_AIN_FEC_TX_EN,
	71	/* I2C1 */
	72	PD17_PF_I2C_DATA,
	73	PD18_PF_I2C_CLK,
	74	/* I2C2 */
	75	PC5_PF_I2C2_SDA,
	76	PC6_PF_I2C2_SCL,
	77	/* FB */
	78	PA5_PF_LSCLK,
	79	PA6_PF_LD0,
	80	PA7_PF_LD1,
	81	PA8_PF_LD2,
	82	PA9_PF_LD3,
	83	PA10_PF_LD4,
	84	PA11_PF_LD5,
	85	PA12_PF_LD6,
	86	PA13_PF_LD7,
	87	PA14_PF_LD8,
	88	PA15_PF_LD9,
	89	PA16_PF_LD10,
	90	PA17_PF_LD11,
	91	PA18_PF_LD12,
	92	PA19_PF_LD13,
	93	PA20_PF_LD14,
	94	PA21_PF_LD15,
	95	PA22_PF_LD16,
	96	PA23_PF_LD17,
	97	PA25_PF_CLS,
	98	PA27_PF_SPL_SPR,
	99	PA28_PF_HSYNC,
	100	PA29_PF_VSYNC,
	101	PA30_PF_CONTRAST,
	102	PA31_PF_OE_ACD,
	103	/* OWIRE */
	104	PE16_AF_OWIRE,
	105	/* SDHC1*/
	106	PE18_PF_SD1_D0,
	107	PE19_PF_SD1_D1,
	108	PE20_PF_SD1_D2,
	109	PE21_PF_SD1_D3,
	110	PE22_PF_SD1_CMD,
	111	PE23_PF_SD1_CLK,
9e3e7afe	112	PF8_AF_ATA_IORDY,
143a179d ACA	113	/* SDHC2*/
	114	PB4_PF_SD2_D0,
	115	PB5_PF_SD2_D1,
	116	PB6_PF_SD2_D2,
	117	PB7_PF_SD2_D3,
	118	PB8_PF_SD2_CMD,
	119	PB9_PF_SD2_CLK,
	120	};
	121
0e7a29a8 UKK	122	static const struct mxc_nand_platform_data
0e7a29a8 UKK	123	mxt_td60_nand_board_info __initconst = {
143a179d ACA	124	.width = 1,
	125	.hw_ecc = 1,
	126	};
	127
c6987159	128	static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
143a179d ACA	129	.bitrate = 100000,
	130	};
	131
9e3e7afe ACA	132	/* PCA9557 */
	133	static int mxt_td60_pca9557_setup(struct i2c_client *client,
	134	unsigned gpio_base, unsigned ngpio,
	135	void *context)
	136	{
	137	static int mxt_td60_gpio_value[] = {
	138	-1, -1, -1, -1, -1, -1, -1, 1
	139	};
	140	int n;
	141
	142	for (n = 0; n < ARRAY_SIZE(mxt_td60_gpio_value); ++n) {
	143	gpio_request(gpio_base + n, "MXT_TD60 GPIO Exp");
	144	if (mxt_td60_gpio_value[n] < 0)
	145	gpio_direction_input(gpio_base + n);
	146	else
	147	gpio_direction_output(gpio_base + n,
	148	mxt_td60_gpio_value[n]);
	149	gpio_export(gpio_base + n, 0);
	150	}
	151
	152	return 0;
	153	}
	154
	155	static struct pca953x_platform_data mxt_td60_pca9557_pdata = {
	156	.gpio_base = 240, /* place PCA9557 after all MX27 gpio pins */
	157	.invert = 0, /* Do not invert */
	158	.setup = mxt_td60_pca9557_setup,
	159	};
	160
143a179d	161	static struct i2c_board_info mxt_td60_i2c_devices[] = {
9e3e7afe ACA	162	{
	163	I2C_BOARD_INFO("pca9557", 0x18),
	164	.platform_data = &mxt_td60_pca9557_pdata,
	165	},
143a179d ACA	166	};
143a179d ACA	167
c6987159	168	static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
143a179d ACA	169	.bitrate = 100000,
	170	};
	171
	172	static struct i2c_board_info mxt_td60_i2c2_devices[] = {
	173	};
	174
	175	static struct imx_fb_videomode mxt_td60_modes[] = {
	176	{
	177	.mode = {
	178	.name = "Chimei LW700AT9003",
	179	.refresh = 60,
	180	.xres = 800,
	181	.yres = 480,
	182	.pixclock = 30303,
	183	.hsync_len = 64,
	184	.left_margin = 0x67,
	185	.right_margin = 0x68,
	186	.vsync_len = 16,
	187	.upper_margin = 0x0f,
	188	.lower_margin = 0x0f,
	189	},
	190	.bpp = 16,
	191	.pcr = 0xFA208B83,
	192	},
	193	};
	194
ad851bff	195	static const struct imx_fb_platform_data mxt_td60_fb_data __initconst = {
143a179d ACA	196	.mode = mxt_td60_modes,
	197	.num_modes = ARRAY_SIZE(mxt_td60_modes),
	198
	199	/*
	200	* - HSYNC active high
	201	* - VSYNC active high
	202	* - clk notenabled while idle
	203	* - clock inverted
	204	* - data not inverted
	205	* - data enable low active
	206	* - enable sharp mode
	207	*/
	208	.pwmr = 0x00A903FF,
	209	.lscr1 = 0x00120300,
	210	.dmacr = 0x00020010,
	211	};
	212
	213	static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
	214	void *data)
	215	{
9e3e7afe	216	return request_irq(IRQ_GPIOF(8), detect_irq, IRQF_TRIGGER_FALLING,
143a179d ACA	217	"sdhc1-card-detect", data);
	218	}
	219
	220	static void mxt_td60_sdhc1_exit(struct device dev, void data)
	221	{
9e3e7afe	222	free_irq(IRQ_GPIOF(8), data);
143a179d ACA	223	}
143a179d ACA	224
9d3d945a	225	static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
143a179d ACA	226	.init = mxt_td60_sdhc1_init,
	227	.exit = mxt_td60_sdhc1_exit,
	228	};
	229
d5dac4a6 UKK	230	static const struct imxuart_platform_data uart_pdata __initconst = {
d5dac4a6 UKK	231	.flags = IMXUART_HAVE_RTSCTS,
143a179d ACA	232	};
	233
	234	static void __init mxt_td60_board_init(void)
	235	{
b78d8e59 SG	236	imx27_soc_init();
b78d8e59 SG	237
143a179d ACA	238	mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
	239	"MXT_TD60");
	240
d5dac4a6 UKK	241	imx27_add_imx_uart0(&uart_pdata);
	242	imx27_add_imx_uart1(&uart_pdata);
	243	imx27_add_imx_uart2(&uart_pdata);
0e7a29a8	244	imx27_add_mxc_nand(&mxt_td60_nand_board_info);
143a179d ACA	245
	246	i2c_register_board_info(0, mxt_td60_i2c_devices,
	247	ARRAY_SIZE(mxt_td60_i2c_devices));
	248
	249	i2c_register_board_info(1, mxt_td60_i2c2_devices,
	250	ARRAY_SIZE(mxt_td60_i2c2_devices));
	251
77a406da UKK	252	imx27_add_imx_i2c(0, &mxt_td60_i2c0_data);
77a406da UKK	253	imx27_add_imx_i2c(1, &mxt_td60_i2c1_data);
ad851bff	254	imx27_add_imx_fb(&mxt_td60_fb_data);
9d3d945a	255	imx27_add_mxc_mmc(0, &sdhc1_pdata);
6bd96f3c	256	imx27_add_fec(NULL);
143a179d ACA	257	}
	258
	259	static void __init mxt_td60_timer_init(void)
	260	{
	261	mx27_clocks_init(26000000);
	262	}
	263
	264	static struct sys_timer mxt_td60_timer = {
	265	.init = mxt_td60_timer_init,
	266	};
	267
	268	MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
	269	/* maintainer: Maxtrack Industrial */
dc8f1907	270	.atag_offset = 0x100,
3dac2196 UKK	271	.map_io = mx27_map_io,
	272	.init_early = imx27_init_early,
	273	.init_irq = mx27_init_irq,
	274	.timer = &mxt_td60_timer,
	275	.init_machine = mxt_td60_board_init,
143a179d	276	MACHINE_END