Commit | Line | Data |
---|---|---|
c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
988d2d49 VL |
2 | /* |
3 | * Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group | |
988d2d49 VL |
4 | */ |
5 | ||
b23f1534 | 6 | #include <linux/delay.h> |
04ea3c80 | 7 | #include <linux/dma-mapping.h> |
5a0e3ad6 | 8 | #include <linux/gfp.h> |
45b131a7 | 9 | #include <linux/gpio.h> |
988d2d49 | 10 | #include <linux/init.h> |
45b131a7 | 11 | #include <linux/interrupt.h> |
9e907416 | 12 | #include <linux/moduleparam.h> |
77aa561d | 13 | #include <linux/leds.h> |
220bbcea | 14 | #include <linux/memory.h> |
988d2d49 VL |
15 | #include <linux/mtd/physmap.h> |
16 | #include <linux/mtd/partitions.h> | |
220bbcea | 17 | #include <linux/platform_device.h> |
65da9791 VL |
18 | #include <linux/regulator/machine.h> |
19 | #include <linux/mfd/mc13783.h> | |
20 | #include <linux/spi/spi.h> | |
220bbcea | 21 | #include <linux/types.h> |
031e9127 | 22 | #include <linux/memblock.h> |
40d97b89 PR |
23 | #include <linux/clk.h> |
24 | #include <linux/io.h> | |
25 | #include <linux/err.h> | |
1f08c112 | 26 | #include <linux/input.h> |
988d2d49 | 27 | |
d67d1075 VL |
28 | #include <linux/usb/otg.h> |
29 | #include <linux/usb/ulpi.h> | |
30 | ||
988d2d49 VL |
31 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | |
33 | #include <asm/mach/time.h> | |
34 | #include <asm/mach/map.h> | |
716a3dc2 | 35 | #include <asm/memblock.h> |
82906b13 | 36 | #include <linux/platform_data/asoc-imx-ssi.h> |
988d2d49 | 37 | |
3ed0bcb4 | 38 | #include "board-mx31moboard.h" |
e3372474 | 39 | #include "common.h" |
4a9b8b0b | 40 | #include "devices-imx31.h" |
641dfe8b | 41 | #include "ehci.h" |
50f2de61 | 42 | #include "hardware.h" |
267dd34c | 43 | #include "iomux-mx3.h" |
39ef6340 | 44 | #include "ulpi.h" |
988d2d49 | 45 | |
220bbcea VL |
46 | static unsigned int moboard_pins[] = { |
47 | /* UART0 */ | |
220bbcea | 48 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, |
421bf82e | 49 | MX31_PIN_CTS1__GPIO2_7, |
220bbcea VL |
50 | /* UART4 */ |
51 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | |
52 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | |
56c7a45b VL |
53 | /* I2C0 */ |
54 | MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL, | |
55 | /* I2C1 */ | |
56 | MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL, | |
57 | /* SDHC1 */ | |
58 | MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, | |
59 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | |
60 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | |
61 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | |
b23f1534 VL |
62 | /* USB reset */ |
63 | MX31_PIN_GPIO1_0__GPIO1_0, | |
88b05647 VL |
64 | /* USB OTG */ |
65 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | |
66 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | |
67 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | |
68 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | |
69 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | |
70 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | |
71 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | |
72 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | |
73 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | |
74 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | |
75 | MX31_PIN_USB_OC__GPIO1_30, | |
d67d1075 VL |
76 | /* USB H2 */ |
77 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | |
78 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | |
79 | MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3, | |
80 | MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5, | |
81 | MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7, | |
82 | MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR, | |
83 | MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP, | |
84 | MX31_PIN_SCK6__GPIO1_25, | |
77aa561d VL |
85 | /* LEDs */ |
86 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, | |
87 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, | |
65da9791 VL |
88 | /* SPI1 */ |
89 | MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, | |
90 | MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | |
91 | MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2, | |
92 | /* Atlas IRQ */ | |
93 | MX31_PIN_GPIO1_3__GPIO1_3, | |
94 | /* SPI2 */ | |
95 | MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO, | |
96 | MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY, | |
97 | MX31_PIN_CSPI2_SS1__CSPI3_SS1, | |
2f7b9451 PR |
98 | /* SSI */ |
99 | MX31_PIN_STXD4__STXD4, MX31_PIN_SRXD4__SRXD4, | |
100 | MX31_PIN_SCK4__SCK4, MX31_PIN_SFS4__SFS4, | |
220bbcea VL |
101 | }; |
102 | ||
988d2d49 | 103 | static struct physmap_flash_data mx31moboard_flash_data = { |
27ad4bf7 | 104 | .width = 2, |
988d2d49 VL |
105 | }; |
106 | ||
107 | static struct resource mx31moboard_flash_resource = { | |
108 | .start = 0xa0000000, | |
109 | .end = 0xa1ffffff, | |
110 | .flags = IORESOURCE_MEM, | |
111 | }; | |
112 | ||
113 | static struct platform_device mx31moboard_flash = { | |
114 | .name = "physmap-flash", | |
115 | .id = 0, | |
116 | .dev = { | |
117 | .platform_data = &mx31moboard_flash_data, | |
118 | }, | |
119 | .resource = &mx31moboard_flash_resource, | |
120 | .num_resources = 1, | |
121 | }; | |
122 | ||
45af780a | 123 | static void __init moboard_uart0_init(void) |
421bf82e | 124 | { |
45af780a AS |
125 | if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack")) { |
126 | gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0); | |
5109a459 | 127 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1)); |
45af780a | 128 | } |
421bf82e VL |
129 | } |
130 | ||
16cf5c41 | 131 | static const struct imxuart_platform_data uart0_pdata __initconst = { |
421bf82e VL |
132 | }; |
133 | ||
16cf5c41 | 134 | static const struct imxuart_platform_data uart4_pdata __initconst = { |
988d2d49 VL |
135 | .flags = IMXUART_HAVE_RTSCTS, |
136 | }; | |
137 | ||
4a9b8b0b | 138 | static const struct imxi2c_platform_data moboard_i2c0_data __initconst = { |
4ec6ecc7 VL |
139 | .bitrate = 400000, |
140 | }; | |
141 | ||
4a9b8b0b | 142 | static const struct imxi2c_platform_data moboard_i2c1_data __initconst = { |
4ec6ecc7 VL |
143 | .bitrate = 100000, |
144 | }; | |
145 | ||
06606ff1 | 146 | static const struct spi_imx_master moboard_spi1_pdata __initconst = { |
fe1bd78b | 147 | .num_chipselect = 3, |
65da9791 VL |
148 | }; |
149 | ||
150 | static struct regulator_consumer_supply sdhc_consumers[] = { | |
151 | { | |
7f917a8d | 152 | .dev_name = "imx31-mmc.0", |
65da9791 VL |
153 | .supply = "sdhc0_vcc", |
154 | }, | |
155 | { | |
7f917a8d | 156 | .dev_name = "imx31-mmc.1", |
65da9791 VL |
157 | .supply = "sdhc1_vcc", |
158 | }, | |
159 | }; | |
160 | ||
161 | static struct regulator_init_data sdhc_vreg_data = { | |
162 | .constraints = { | |
163 | .min_uV = 2700000, | |
164 | .max_uV = 3000000, | |
165 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
166 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
167 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
168 | REGULATOR_MODE_FAST, | |
169 | .always_on = 0, | |
170 | .boot_on = 1, | |
171 | }, | |
172 | .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers), | |
173 | .consumer_supplies = sdhc_consumers, | |
174 | }; | |
175 | ||
176 | static struct regulator_consumer_supply cam_consumers[] = { | |
177 | { | |
afa77ef3 UKK |
178 | .dev_name = "mx3_camera.0", |
179 | .supply = "cam_vcc", | |
65da9791 VL |
180 | }, |
181 | }; | |
182 | ||
183 | static struct regulator_init_data cam_vreg_data = { | |
184 | .constraints = { | |
185 | .min_uV = 2700000, | |
186 | .max_uV = 3000000, | |
187 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
188 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
189 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
190 | REGULATOR_MODE_FAST, | |
191 | .always_on = 0, | |
192 | .boot_on = 1, | |
193 | }, | |
194 | .num_consumer_supplies = ARRAY_SIZE(cam_consumers), | |
195 | .consumer_supplies = cam_consumers, | |
196 | }; | |
197 | ||
5836372e | 198 | static struct mc13xxx_regulator_init_data moboard_regulators[] = { |
65da9791 | 199 | { |
57c78e35 | 200 | .id = MC13783_REG_VMMC1, |
65da9791 VL |
201 | .init_data = &sdhc_vreg_data, |
202 | }, | |
203 | { | |
57c78e35 | 204 | .id = MC13783_REG_VCAM, |
65da9791 VL |
205 | .init_data = &cam_vreg_data, |
206 | }, | |
207 | }; | |
208 | ||
d3efa4ed | 209 | static struct mc13xxx_led_platform_data moboard_led[] = { |
a7cca8ae PR |
210 | { |
211 | .id = MC13783_LED_R1, | |
212 | .name = "coreboard-led-4:red", | |
a7cca8ae PR |
213 | }, |
214 | { | |
215 | .id = MC13783_LED_G1, | |
216 | .name = "coreboard-led-4:green", | |
a7cca8ae PR |
217 | }, |
218 | { | |
219 | .id = MC13783_LED_B1, | |
220 | .name = "coreboard-led-4:blue", | |
a7cca8ae PR |
221 | }, |
222 | { | |
223 | .id = MC13783_LED_R2, | |
224 | .name = "coreboard-led-5:red", | |
a7cca8ae PR |
225 | }, |
226 | { | |
227 | .id = MC13783_LED_G2, | |
228 | .name = "coreboard-led-5:green", | |
a7cca8ae PR |
229 | }, |
230 | { | |
231 | .id = MC13783_LED_B2, | |
232 | .name = "coreboard-led-5:blue", | |
a7cca8ae PR |
233 | }, |
234 | }; | |
235 | ||
d3efa4ed | 236 | static struct mc13xxx_leds_platform_data moboard_leds = { |
a7cca8ae PR |
237 | .num_leds = ARRAY_SIZE(moboard_led), |
238 | .led = moboard_led, | |
9d263813 AS |
239 | .led_control[0] = MC13783_LED_C0_ENABLE | MC13783_LED_C0_ABMODE(0), |
240 | .led_control[1] = MC13783_LED_C1_SLEWLIM, | |
241 | .led_control[2] = MC13783_LED_C2_SLEWLIM, | |
01a7a063 AS |
242 | .led_control[3] = MC13783_LED_C3_PERIOD(0) | |
243 | MC13783_LED_C3_CURRENT_R1(2) | | |
244 | MC13783_LED_C3_CURRENT_G1(2) | | |
245 | MC13783_LED_C3_CURRENT_B1(2), | |
246 | .led_control[4] = MC13783_LED_C4_PERIOD(0) | | |
247 | MC13783_LED_C4_CURRENT_R2(3) | | |
248 | MC13783_LED_C4_CURRENT_G2(3) | | |
249 | MC13783_LED_C4_CURRENT_B2(3), | |
a7cca8ae PR |
250 | }; |
251 | ||
d3efa4ed | 252 | static struct mc13xxx_buttons_platform_data moboard_buttons = { |
1f08c112 PR |
253 | .b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE | |
254 | MC13783_BUTTON_POL_INVERT, | |
255 | .b1on_key = KEY_POWER, | |
256 | }; | |
257 | ||
2f7b9451 PR |
258 | static struct mc13xxx_codec_platform_data moboard_codec = { |
259 | .dac_ssi_port = MC13783_SSI1_PORT, | |
260 | .adc_ssi_port = MC13783_SSI1_PORT, | |
261 | }; | |
262 | ||
5836372e | 263 | static struct mc13xxx_platform_data moboard_pmic = { |
4ec1b54c AS |
264 | .regulators = { |
265 | .regulators = moboard_regulators, | |
266 | .num_regulators = ARRAY_SIZE(moboard_regulators), | |
267 | }, | |
a7cca8ae | 268 | .leds = &moboard_leds, |
1f08c112 | 269 | .buttons = &moboard_buttons, |
2f7b9451 PR |
270 | .codec = &moboard_codec, |
271 | .flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC | MC13XXX_USE_CODEC, | |
272 | }; | |
273 | ||
274 | static struct imx_ssi_platform_data moboard_ssi_pdata = { | |
275 | .flags = IMX_SSI_DMA | IMX_SSI_NET, | |
65da9791 VL |
276 | }; |
277 | ||
278 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | |
279 | { | |
280 | .modalias = "mc13783", | |
ed175343 | 281 | /* irq number is run-time assigned */ |
65da9791 VL |
282 | .max_speed_hz = 300000, |
283 | .bus_num = 1, | |
fe1bd78b | 284 | .chip_select = 0, |
65da9791 VL |
285 | .platform_data = &moboard_pmic, |
286 | .mode = SPI_CS_HIGH, | |
287 | }, | |
65da9791 VL |
288 | }; |
289 | ||
06606ff1 | 290 | static const struct spi_imx_master moboard_spi2_pdata __initconst = { |
fe1bd78b | 291 | .num_chipselect = 2, |
65da9791 VL |
292 | }; |
293 | ||
45b131a7 VL |
294 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) |
295 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) | |
296 | ||
297 | static int moboard_sdhc1_get_ro(struct device *dev) | |
298 | { | |
563abb4b | 299 | return !gpio_get_value(SDHC1_WP); |
45b131a7 VL |
300 | } |
301 | ||
302 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | |
303 | void *data) | |
304 | { | |
4f163eb8 SH |
305 | int ret; |
306 | ||
307 | ret = gpio_request(SDHC1_CD, "sdhc-detect"); | |
308 | if (ret) | |
309 | return ret; | |
310 | ||
311 | gpio_direction_input(SDHC1_CD); | |
312 | ||
313 | ret = gpio_request(SDHC1_WP, "sdhc-wp"); | |
314 | if (ret) | |
315 | goto err_gpio_free; | |
316 | gpio_direction_input(SDHC1_WP); | |
317 | ||
318 | ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq, | |
45b131a7 VL |
319 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
320 | "sdhc1-card-detect", data); | |
4f163eb8 SH |
321 | if (ret) |
322 | goto err_gpio_free_2; | |
323 | ||
324 | return 0; | |
325 | ||
326 | err_gpio_free_2: | |
327 | gpio_free(SDHC1_WP); | |
328 | err_gpio_free: | |
329 | gpio_free(SDHC1_CD); | |
330 | ||
331 | return ret; | |
45b131a7 VL |
332 | } |
333 | ||
334 | static void moboard_sdhc1_exit(struct device *dev, void *data) | |
335 | { | |
336 | free_irq(gpio_to_irq(SDHC1_CD), data); | |
4f163eb8 SH |
337 | gpio_free(SDHC1_WP); |
338 | gpio_free(SDHC1_CD); | |
45b131a7 VL |
339 | } |
340 | ||
6a697e3d | 341 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { |
45b131a7 VL |
342 | .get_ro = moboard_sdhc1_get_ro, |
343 | .init = moboard_sdhc1_init, | |
344 | .exit = moboard_sdhc1_exit, | |
345 | }; | |
346 | ||
b23f1534 VL |
347 | /* |
348 | * this pin is dedicated for all mx31moboard systems, so we do it here | |
349 | */ | |
350 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | |
88b05647 | 351 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
25783602 | 352 | PAD_CTL_ODE_CMOS) |
88b05647 VL |
353 | |
354 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | |
25783602 | 355 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) |
88b05647 | 356 | |
25783602 | 357 | static void usb_xcvr_reset(void) |
88b05647 | 358 | { |
25783602 PR |
359 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); |
360 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | |
361 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD); | |
362 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
363 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD); | |
364 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD); | |
365 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
366 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD); | |
367 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | |
368 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | |
369 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | |
370 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | |
371 | ||
372 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | |
373 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | |
374 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | |
375 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | |
376 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | |
377 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); | |
378 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | |
379 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
380 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
381 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
382 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
383 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
384 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
88b05647 VL |
385 | |
386 | gpio_request(OTG_EN_B, "usb-udc-en"); | |
387 | gpio_direction_output(OTG_EN_B, 0); | |
25783602 PR |
388 | gpio_request(USBH2_EN_B, "usbh2-en"); |
389 | gpio_direction_output(USBH2_EN_B, 0); | |
390 | ||
391 | gpio_request(USB_RESET_B, "usb-reset"); | |
392 | gpio_direction_output(USB_RESET_B, 0); | |
393 | mdelay(1); | |
394 | gpio_set_value(USB_RESET_B, 1); | |
395 | mdelay(1); | |
88b05647 VL |
396 | } |
397 | ||
4bd597b6 SH |
398 | static int moboard_usbh2_init_hw(struct platform_device *pdev) |
399 | { | |
400 | return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED); | |
401 | } | |
f9ffaa9c | 402 | |
2d58de28 | 403 | static struct mxc_usbh_platform_data usbh2_pdata __initdata = { |
4bd597b6 | 404 | .init = moboard_usbh2_init_hw, |
d67d1075 | 405 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
d67d1075 VL |
406 | }; |
407 | ||
408 | static int __init moboard_usbh2_init(void) | |
409 | { | |
2d58de28 UKK |
410 | struct platform_device *pdev; |
411 | ||
48f6b099 SH |
412 | usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | |
413 | ULPI_OTG_DRVVBUS_EXT); | |
414 | if (!usbh2_pdata.otg) | |
415 | return -ENODEV; | |
d67d1075 | 416 | |
2d58de28 | 417 | pdev = imx31_add_mxc_ehci_hs(2, &usbh2_pdata); |
2d58de28 | 418 | |
d3a22442 | 419 | return PTR_ERR_OR_ZERO(pdev); |
d67d1075 | 420 | } |
d67d1075 | 421 | |
47e837b5 | 422 | static const struct gpio_led mx31moboard_leds[] __initconst = { |
77aa561d | 423 | { |
27ad4bf7 | 424 | .name = "coreboard-led-0:red:running", |
77aa561d | 425 | .default_trigger = "heartbeat", |
27ad4bf7 | 426 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0), |
77aa561d VL |
427 | }, { |
428 | .name = "coreboard-led-1:red", | |
429 | .gpio = IOMUX_TO_GPIO(MX31_PIN_STX0), | |
430 | }, { | |
431 | .name = "coreboard-led-2:red", | |
432 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0), | |
433 | }, { | |
434 | .name = "coreboard-led-3:red", | |
435 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0), | |
436 | }, | |
437 | }; | |
438 | ||
47e837b5 | 439 | static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = { |
27ad4bf7 | 440 | .num_leds = ARRAY_SIZE(mx31moboard_leds), |
77aa561d VL |
441 | .leds = mx31moboard_leds, |
442 | }; | |
443 | ||
988d2d49 VL |
444 | static struct platform_device *devices[] __initdata = { |
445 | &mx31moboard_flash, | |
446 | }; | |
447 | ||
afa77ef3 | 448 | static struct mx3_camera_pdata camera_pdata __initdata = { |
04ea3c80 VL |
449 | .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10, |
450 | .mclk_10khz = 4800, | |
451 | }; | |
452 | ||
031e9127 UKK |
453 | static phys_addr_t mx3_camera_base __initdata; |
454 | #define MX3_CAMERA_BUF_SIZE SZ_4M | |
04ea3c80 | 455 | |
afa77ef3 | 456 | static int __init mx31moboard_init_cam(void) |
04ea3c80 | 457 | { |
edeb8e4c | 458 | int ret; |
afa77ef3 UKK |
459 | struct platform_device *pdev; |
460 | ||
88289c80 | 461 | imx31_add_ipu_core(); |
04ea3c80 | 462 | |
afa77ef3 UKK |
463 | pdev = imx31_alloc_mx3_camera(&camera_pdata); |
464 | if (IS_ERR(pdev)) | |
465 | return PTR_ERR(pdev); | |
04ea3c80 | 466 | |
2436bdcd CH |
467 | ret = dma_declare_coherent_memory(&pdev->dev, |
468 | mx3_camera_base, mx3_camera_base, | |
82c5de0a | 469 | MX3_CAMERA_BUF_SIZE); |
2436bdcd | 470 | if (ret) |
afa77ef3 UKK |
471 | goto err; |
472 | ||
473 | ret = platform_device_add(pdev); | |
474 | if (ret) | |
475 | err: | |
476 | platform_device_put(pdev); | |
477 | ||
478 | return ret; | |
04ea3c80 | 479 | |
04ea3c80 VL |
480 | } |
481 | ||
40d97b89 PR |
482 | static void mx31moboard_poweroff(void) |
483 | { | |
484 | struct clk *clk = clk_get_sys("imx2-wdt.0", NULL); | |
485 | ||
486 | if (!IS_ERR(clk)) | |
8186064c | 487 | clk_prepare_enable(clk); |
40d97b89 PR |
488 | |
489 | mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST); | |
490 | ||
c553138f | 491 | imx_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
40d97b89 PR |
492 | } |
493 | ||
e00f0b4a VL |
494 | static int mx31moboard_baseboard; |
495 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | |
496 | ||
988d2d49 VL |
497 | /* |
498 | * Board specific initialization. | |
499 | */ | |
e134fb2b | 500 | static void __init mx31moboard_init(void) |
988d2d49 | 501 | { |
b78d8e59 SG |
502 | imx31_soc_init(); |
503 | ||
220bbcea VL |
504 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), |
505 | "moboard"); | |
506 | ||
988d2d49 VL |
507 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
508 | ||
bec31a85 | 509 | imx31_add_imx2_wdt(); |
31776fbc | 510 | |
16cf5c41 UKK |
511 | imx31_add_imx_uart0(&uart0_pdata); |
512 | imx31_add_imx_uart4(&uart4_pdata); | |
e00f0b4a | 513 | |
4a9b8b0b UKK |
514 | imx31_add_imx_i2c0(&moboard_i2c0_data); |
515 | imx31_add_imx_i2c1(&moboard_i2c1_data); | |
4ec6ecc7 | 516 | |
06606ff1 UKK |
517 | imx31_add_spi_imx1(&moboard_spi1_pdata); |
518 | imx31_add_spi_imx2(&moboard_spi2_pdata); | |
65da9791 | 519 | |
1cecfa48 VZ |
520 | mx31moboard_init_cam(); |
521 | ||
522 | imx31_add_imx_ssi(0, &moboard_ssi_pdata); | |
523 | ||
524 | pm_power_off = mx31moboard_poweroff; | |
525 | } | |
526 | ||
527 | static void __init mx31moboard_late(void) | |
528 | { | |
529 | gpio_led_register_device(-1, &mx31moboard_led_pdata); | |
530 | ||
531 | moboard_uart0_init(); | |
532 | ||
65da9791 VL |
533 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); |
534 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | |
ed175343 SG |
535 | moboard_spi_board_info[0].irq = |
536 | gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | |
65da9791 VL |
537 | spi_register_board_info(moboard_spi_board_info, |
538 | ARRAY_SIZE(moboard_spi_board_info)); | |
539 | ||
6a697e3d | 540 | imx31_add_mxc_mmc(0, &sdhc1_pdata); |
45b131a7 | 541 | |
b23f1534 | 542 | usb_xcvr_reset(); |
d67d1075 | 543 | moboard_usbh2_init(); |
88b05647 | 544 | |
2f7b9451 PR |
545 | imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); |
546 | ||
e00f0b4a VL |
547 | switch (mx31moboard_baseboard) { |
548 | case MX31NOBOARD: | |
549 | break; | |
550 | case MX31DEVBOARD: | |
551 | mx31moboard_devboard_init(); | |
552 | break; | |
553 | case MX31MARXBOT: | |
554 | mx31moboard_marxbot_init(); | |
555 | break; | |
e335c75c | 556 | case MX31SMARTBOT: |
3a47b1a4 PR |
557 | case MX31EYEBOT: |
558 | mx31moboard_smartbot_init(mx31moboard_baseboard); | |
e335c75c | 559 | break; |
e00f0b4a | 560 | default: |
220bbcea VL |
561 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
562 | mx31moboard_baseboard); | |
e00f0b4a | 563 | } |
988d2d49 VL |
564 | } |
565 | ||
988d2d49 VL |
566 | static void __init mx31moboard_timer_init(void) |
567 | { | |
30c730f8 | 568 | mx31_clocks_init(26000000); |
988d2d49 VL |
569 | } |
570 | ||
031e9127 UKK |
571 | static void __init mx31moboard_reserve(void) |
572 | { | |
573 | /* reserve 4 MiB for mx3-camera */ | |
716a3dc2 | 574 | mx3_camera_base = arm_memblock_steal(MX3_CAMERA_BUF_SIZE, |
031e9127 | 575 | MX3_CAMERA_BUF_SIZE); |
031e9127 UKK |
576 | } |
577 | ||
988d2d49 | 578 | MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") |
0fbe6b07 | 579 | /* Maintainer: Philippe Retornaz, EPFL Mobots group */ |
dc8f1907 | 580 | .atag_offset = 0x100, |
031e9127 | 581 | .reserve = mx31moboard_reserve, |
97976e22 UKK |
582 | .map_io = mx31_map_io, |
583 | .init_early = imx31_init_early, | |
584 | .init_irq = mx31_init_irq, | |
6bb27d73 | 585 | .init_time = mx31moboard_timer_init, |
e134fb2b | 586 | .init_machine = mx31moboard_init, |
1cecfa48 | 587 | .init_late = mx31moboard_late, |
65ea7884 | 588 | .restart = mxc_restart, |
988d2d49 | 589 | MACHINE_END |