[linux-2.6-block.git] / arch / arm / mach-imx / mach-mx27_3ds.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
 *
 * Author: Fabio Estevam <fabio.estevam@freescale.com>
 */

/*
 * This machine is known as:
 *  - i.MX27 3-Stack Development System
 *  - i.MX27 Platform Development Kit (i.MX27 PDK)
 */

#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/delay.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/regulator/machine.h>
#include <linux/spi/l4f00242t03.h>


#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>

#include "3ds_debugboard.h"
#include "common.h"
#include "devices-imx27.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx27.h"
#include "ulpi.h"

#define SD1_EN_GPIO		IMX_GPIO_NR(2, 25)
#define OTG_PHY_RESET_GPIO	IMX_GPIO_NR(2, 23)
#define SPI2_SS0		IMX_GPIO_NR(4, 21)
#define PMIC_INT		IMX_GPIO_NR(3, 14)
#define SPI1_SS0		IMX_GPIO_NR(4, 28)
#define SD1_CD			IMX_GPIO_NR(2, 26)
#define LCD_RESET		IMX_GPIO_NR(1, 3)
#define LCD_ENABLE		IMX_GPIO_NR(1, 31)

static const int mx27pdk_pins[] __initconst = {
	/* UART1 */
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS,
	/* FEC */
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_RX_CLK,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN,
	/* SDHC1 */
	PE18_PF_SD1_D0,
	PE19_PF_SD1_D1,
	PE20_PF_SD1_D2,
	PE21_PF_SD1_D3,
	PE22_PF_SD1_CMD,
	PE23_PF_SD1_CLK,
	SD1_EN_GPIO | GPIO_GPIO | GPIO_OUT,
	/* OTG */
	OTG_PHY_RESET_GPIO | GPIO_GPIO | GPIO_OUT,
	PC7_PF_USBOTG_DATA5,
	PC8_PF_USBOTG_DATA6,
	PC9_PF_USBOTG_DATA0,
	PC10_PF_USBOTG_DATA2,
	PC11_PF_USBOTG_DATA1,
	PC12_PF_USBOTG_DATA4,
	PC13_PF_USBOTG_DATA3,
	PE0_PF_USBOTG_NXT,
	PE1_PF_USBOTG_STP,
	PE2_PF_USBOTG_DIR,
	PE24_PF_USBOTG_CLK,
	PE25_PF_USBOTG_DATA7,
	/* CSPI1 */
	PD31_PF_CSPI1_MOSI,
	PD30_PF_CSPI1_MISO,
	PD29_PF_CSPI1_SCLK,
	PD25_PF_CSPI1_RDY,
	SPI1_SS0 | GPIO_GPIO | GPIO_OUT,
	/* CSPI2 */
	PD22_PF_CSPI2_SCLK,
	PD23_PF_CSPI2_MISO,
	PD24_PF_CSPI2_MOSI,
	SPI2_SS0 | GPIO_GPIO | GPIO_OUT,
	/* I2C1 */
	PD17_PF_I2C_DATA,
	PD18_PF_I2C_CLK,
	/* PMIC INT */
	PMIC_INT | GPIO_GPIO | GPIO_IN,
	/* LCD */
	PA5_PF_LSCLK,
	PA6_PF_LD0,
	PA7_PF_LD1,
	PA8_PF_LD2,
	PA9_PF_LD3,
	PA10_PF_LD4,
	PA11_PF_LD5,
	PA12_PF_LD6,
	PA13_PF_LD7,
	PA14_PF_LD8,
	PA15_PF_LD9,
	PA16_PF_LD10,
	PA17_PF_LD11,
	PA18_PF_LD12,
	PA19_PF_LD13,
	PA20_PF_LD14,
	PA21_PF_LD15,
	PA22_PF_LD16,
	PA23_PF_LD17,
	PA28_PF_HSYNC,
	PA29_PF_VSYNC,
	PA30_PF_CONTRAST,
	LCD_ENABLE | GPIO_GPIO | GPIO_OUT,
	LCD_RESET | GPIO_GPIO | GPIO_OUT,
	/* SSI4 */
	PC16_PF_SSI4_FS,
	PC17_PF_SSI4_RXD,
	PC18_PF_SSI4_TXD,
	PC19_PF_SSI4_CLK,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

/*
 * Matrix keyboard
 */

static const uint32_t mx27_3ds_keymap[] = {
	KEY(0, 0, KEY_UP),
	KEY(0, 1, KEY_DOWN),
	KEY(1, 0, KEY_RIGHT),
	KEY(1, 1, KEY_LEFT),
	KEY(1, 2, KEY_ENTER),
	KEY(2, 0, KEY_F6),
	KEY(2, 1, KEY_F8),
	KEY(2, 2, KEY_F9),
	KEY(2, 3, KEY_F10),
};

static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
	.keymap		= mx27_3ds_keymap,
	.keymap_size	= ARRAY_SIZE(mx27_3ds_keymap),
};

static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
				void *data)
{
	return request_irq(gpio_to_irq(SD1_CD), detect_irq,
	IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
}

static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(SD1_CD), data);
}

static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
	.init = mx27_3ds_sdhc1_init,
	.exit = mx27_3ds_sdhc1_exit,
};

static void mx27_3ds_sdhc1_enable_level_translator(void)
{
	/* Turn on TXB0108 OE pin */
	gpio_request(SD1_EN_GPIO, "sd1_enable");
	gpio_direction_output(SD1_EN_GPIO, 1);
}


static int otg_phy_init(void)
{
	gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
	gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
	mdelay(1);
	gpio_set_value(OTG_PHY_RESET_GPIO, 1);
	return 0;
}

static int mx27_3ds_otg_init(struct platform_device *pdev)
{
	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
}

static struct mxc_usbh_platform_data otg_pdata __initdata = {
	.init	= mx27_3ds_otg_init,
	.portsc	= MXC_EHCI_MODE_ULPI,
};

static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
	.operating_mode = FSL_USB2_DR_DEVICE,
	.phy_mode       = FSL_USB2_PHY_ULPI,
};

static bool otg_mode_host __initdata;

static int __init mx27_3ds_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = true;
	else if (!strcmp(options, "device"))
		otg_mode_host = false;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 1;
}
__setup("otg_mode=", mx27_3ds_otg_mode);

/* Regulators */
static struct regulator_init_data gpo_init = {
	.constraints = {
		.boot_on = 1,
		.always_on = 1,
	}
};

static struct regulator_consumer_supply vmmc1_consumers[] = {
	REGULATOR_SUPPLY("vcore", "spi0.0"),
};

static struct regulator_init_data vmmc1_init = {
	.constraints = {
		.min_uV	= 2800000,
		.max_uV = 2800000,
		.apply_uV = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
				  REGULATOR_CHANGE_STATUS,
	},
	.num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
	.consumer_supplies = vmmc1_consumers,
};

static struct regulator_consumer_supply vgen_consumers[] = {
	REGULATOR_SUPPLY("vdd", "spi0.0"),
};

static struct regulator_init_data vgen_init = {
	.constraints = {
		.min_uV	= 1800000,
		.max_uV = 1800000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
	.consumer_supplies = vgen_consumers,
};

static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
	{
		.id = MC13783_REG_VMMC1,
		.init_data = &vmmc1_init,
	}, {
		.id = MC13783_REG_VGEN,
		.init_data = &vgen_init,
	}, {
		.id = MC13783_REG_GPO1, /* Turn on 1.8V */
		.init_data = &gpo_init,
	}, {
		.id = MC13783_REG_GPO3, /* Turn on 3.3V */
		.init_data = &gpo_init,
	},
};

/* MC13783 */
static struct mc13xxx_codec_platform_data mx27_3ds_codec = {
	.dac_ssi_port = MC13783_SSI1_PORT,
	.adc_ssi_port = MC13783_SSI1_PORT,
};

static struct mc13xxx_platform_data mc13783_pdata = {
	.regulators = {
		.regulators = mx27_3ds_regulators,
		.num_regulators = ARRAY_SIZE(mx27_3ds_regulators),

	},
	.flags  = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC |
						MC13XXX_USE_CODEC,
	.codec = &mx27_3ds_codec,
};

static struct imx_ssi_platform_data mx27_3ds_ssi_pdata = {
	.flags = IMX_SSI_DMA | IMX_SSI_NET,
};

/* SPI */
static int spi1_chipselect[] = {SPI1_SS0};

static const struct spi_imx_master spi1_pdata __initconst = {
	.chipselect	= spi1_chipselect,
	.num_chipselect	= ARRAY_SIZE(spi1_chipselect),
};

static int spi2_chipselect[] = {SPI2_SS0};

static const struct spi_imx_master spi2_pdata __initconst = {
	.chipselect	= spi2_chipselect,
	.num_chipselect	= ARRAY_SIZE(spi2_chipselect),
};

static struct imx_fb_videomode mx27_3ds_modes[] = {
	{	/* 480x640 @ 60 Hz */
		.mode = {
			.name		= "Epson-VGA",
			.refresh	= 60,
			.xres		= 480,
			.yres		= 640,
			.pixclock	= 41701,
			.left_margin	= 20,
			.right_margin	= 41,
			.upper_margin	= 10,
			.lower_margin	= 5,
			.hsync_len	= 20,
			.vsync_len	= 10,
			.sync		= FB_SYNC_OE_ACT_HIGH |
						FB_SYNC_CLK_INVERT,
			.vmode		= FB_VMODE_NONINTERLACED,
			.flag		= 0,
		},
		.bpp		= 16,
		.pcr		= 0xFAC08B82,
	},
};

static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
	.mode = mx27_3ds_modes,
	.num_modes = ARRAY_SIZE(mx27_3ds_modes),
	.pwmr		= 0x00A903FF,
	.lscr1		= 0x00120300,
	.dmacr		= 0x00020010,
};

/* LCD */
static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = {
	.reset_gpio		= LCD_RESET,
	.data_enable_gpio	= LCD_ENABLE,
};

static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
	{
		.modalias	= "mc13783",
		.max_speed_hz	= 1000000,
		.bus_num	= 1,
		.chip_select	= 0, /* SS0 */
		.platform_data	= &mc13783_pdata,
		/* irq number is run-time assigned */
		.mode = SPI_CS_HIGH,
	}, {
		.modalias	= "l4f00242t03",
		.max_speed_hz	= 5000000,
		.bus_num	= 0,
		.chip_select	= 0, /* SS0 */
		.platform_data	= &mx27_3ds_lcd_pdata,
	},
};

static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
	.bitrate = 100000,
};

static void __init mx27pdk_init(void)
{
	imx27_soc_init();

	mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
		"mx27pdk");
	imx27_add_imx_uart0(&uart_pdata);
	imx27_add_fec(NULL);
	imx27_add_imx_keypad(&mx27_3ds_keymap_data);
	imx27_add_imx2_wdt();

	imx27_add_spi_imx1(&spi2_pdata);
	imx27_add_spi_imx0(&spi1_pdata);

	imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
	imx27_add_imx_fb(&mx27_3ds_fb_data);

	imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata);
}

static void __init mx27pdk_late_init(void)
{
	mx27_3ds_sdhc1_enable_level_translator();
	imx27_add_mxc_mmc(0, &sdhc1_pdata);

	otg_phy_init();

	if (otg_mode_host) {
		otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
				ULPI_OTG_DRVVBUS_EXT);

		if (otg_pdata.otg)
			imx27_add_mxc_ehci_otg(&otg_pdata);
	}

	if (!otg_mode_host)
		imx27_add_fsl_usb2_udc(&otg_device_pdata);

	mx27_3ds_spi_devs[0].irq = gpio_to_irq(PMIC_INT);
	spi_register_board_info(mx27_3ds_spi_devs,
				ARRAY_SIZE(mx27_3ds_spi_devs));

	if (mxc_expio_init(MX27_CS5_BASE_ADDR, IMX_GPIO_NR(3, 28)))
		pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");


	imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
}

static void __init mx27pdk_timer_init(void)
{
	mx27_clocks_init(26000000);
}

MACHINE_START(MX27_3DS, "Freescale MX27PDK")
	/* maintainer: Freescale Semiconductor, Inc. */
	.atag_offset = 0x100,
	.map_io = mx27_map_io,
	.init_early = imx27_init_early,
	.init_irq = mx27_init_irq,
	.init_time	= mx27pdk_timer_init,
	.init_machine = mx27pdk_init,
	.init_late	= mx27pdk_late_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
ec9be0de FE	2	/*
	3	* Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
	4	*
	5	* Author: Fabio Estevam <fabio.estevam@freescale.com>
ec9be0de FE	6	*/
ec9be0de FE	7
8fdca37a UKK	8	/*
	9	* This machine is known as:
	10	* - i.MX27 3-Stack Development System
	11	* - i.MX27 Platform Development Kit (i.MX27 PDK)
	12	*/
	13
ec9be0de FE	14	#include <linux/platform_device.h>
ec9be0de FE	15	#include <linux/gpio.h>
b5ec73eb	16	#include <linux/irq.h>
96cf4239 FE	17	#include <linux/usb/otg.h>
	18	#include <linux/usb/ulpi.h>
	19	#include <linux/delay.h>
c67a3e09 FE	20	#include <linux/mfd/mc13783.h>
	21	#include <linux/spi/spi.h>
	22	#include <linux/regulator/machine.h>
1abcb4cc	23	#include <linux/spi/l4f00242t03.h>
96cf4239	24
4c11c286	25
ec9be0de FE	26	#include <asm/mach-types.h>
	27	#include <asm/mach/arch.h>
	28	#include <asm/mach/time.h>
ec9be0de	29
3ed0bcb4	30	#include "3ds_debugboard.h"
e3372474	31	#include "common.h"
d5dac4a6	32	#include "devices-imx27.h"
641dfe8b	33	#include "ehci.h"
50f2de61	34	#include "hardware.h"
267dd34c	35	#include "iomux-mx27.h"
39ef6340	36	#include "ulpi.h"
ec9be0de	37
98618cfe FE	38	#define SD1_EN_GPIO IMX_GPIO_NR(2, 25)
	39	#define OTG_PHY_RESET_GPIO IMX_GPIO_NR(2, 23)
	40	#define SPI2_SS0 IMX_GPIO_NR(4, 21)
aec250dc	41	#define PMIC_INT IMX_GPIO_NR(3, 14)
1abcb4cc	42	#define SPI1_SS0 IMX_GPIO_NR(4, 28)
c084473d	43	#define SD1_CD IMX_GPIO_NR(2, 26)
1abcb4cc FE	44	#define LCD_RESET IMX_GPIO_NR(1, 3)
1abcb4cc FE	45	#define LCD_ENABLE IMX_GPIO_NR(1, 31)
b5ec73eb	46
6c80ee51	47	static const int mx27pdk_pins[] __initconst = {
ec9be0de FE	48	/* UART1 */
	49	PE12_PF_UART1_TXD,
	50	PE13_PF_UART1_RXD,
	51	PE14_PF_UART1_CTS,
	52	PE15_PF_UART1_RTS,
	53	/* FEC */
	54	PD0_AIN_FEC_TXD0,
	55	PD1_AIN_FEC_TXD1,
	56	PD2_AIN_FEC_TXD2,
	57	PD3_AIN_FEC_TXD3,
	58	PD4_AOUT_FEC_RX_ER,
	59	PD5_AOUT_FEC_RXD1,
	60	PD6_AOUT_FEC_RXD2,
	61	PD7_AOUT_FEC_RXD3,
	62	PD8_AF_FEC_MDIO,
	63	PD9_AIN_FEC_MDC,
	64	PD10_AOUT_FEC_CRS,
	65	PD11_AOUT_FEC_TX_CLK,
	66	PD12_AOUT_FEC_RXD0,
	67	PD13_AOUT_FEC_RX_DV,
	68	PD14_AOUT_FEC_RX_CLK,
	69	PD15_AOUT_FEC_COL,
	70	PD16_AIN_FEC_TX_ER,
	71	PF23_AIN_FEC_TX_EN,
b5ec73eb RP	72	/* SDHC1 */
	73	PE18_PF_SD1_D0,
	74	PE19_PF_SD1_D1,
	75	PE20_PF_SD1_D2,
	76	PE21_PF_SD1_D3,
	77	PE22_PF_SD1_CMD,
	78	PE23_PF_SD1_CLK,
	79	SD1_EN_GPIO \| GPIO_GPIO \| GPIO_OUT,
96cf4239 FE	80	/* OTG */
	81	OTG_PHY_RESET_GPIO \| GPIO_GPIO \| GPIO_OUT,
	82	PC7_PF_USBOTG_DATA5,
	83	PC8_PF_USBOTG_DATA6,
	84	PC9_PF_USBOTG_DATA0,
	85	PC10_PF_USBOTG_DATA2,
	86	PC11_PF_USBOTG_DATA1,
	87	PC12_PF_USBOTG_DATA4,
	88	PC13_PF_USBOTG_DATA3,
	89	PE0_PF_USBOTG_NXT,
	90	PE1_PF_USBOTG_STP,
	91	PE2_PF_USBOTG_DIR,
	92	PE24_PF_USBOTG_CLK,
	93	PE25_PF_USBOTG_DATA7,
1abcb4cc FE	94	/* CSPI1 */
	95	PD31_PF_CSPI1_MOSI,
	96	PD30_PF_CSPI1_MISO,
	97	PD29_PF_CSPI1_SCLK,
	98	PD25_PF_CSPI1_RDY,
	99	SPI1_SS0 \| GPIO_GPIO \| GPIO_OUT,
c67a3e09 FE	100	/* CSPI2 */
	101	PD22_PF_CSPI2_SCLK,
	102	PD23_PF_CSPI2_MISO,
	103	PD24_PF_CSPI2_MOSI,
aec250dc	104	SPI2_SS0 \| GPIO_GPIO \| GPIO_OUT,
5885f036 FE	105	/* I2C1 */
	106	PD17_PF_I2C_DATA,
	107	PD18_PF_I2C_CLK,
aec250dc FE	108	/* PMIC INT */
aec250dc FE	109	PMIC_INT \| GPIO_GPIO \| GPIO_IN,
1abcb4cc FE	110	/* LCD */
	111	PA5_PF_LSCLK,
	112	PA6_PF_LD0,
	113	PA7_PF_LD1,
	114	PA8_PF_LD2,
	115	PA9_PF_LD3,
	116	PA10_PF_LD4,
	117	PA11_PF_LD5,
	118	PA12_PF_LD6,
	119	PA13_PF_LD7,
	120	PA14_PF_LD8,
	121	PA15_PF_LD9,
	122	PA16_PF_LD10,
	123	PA17_PF_LD11,
	124	PA18_PF_LD12,
	125	PA19_PF_LD13,
	126	PA20_PF_LD14,
	127	PA21_PF_LD15,
	128	PA22_PF_LD16,
	129	PA23_PF_LD17,
	130	PA28_PF_HSYNC,
	131	PA29_PF_VSYNC,
	132	PA30_PF_CONTRAST,
	133	LCD_ENABLE \| GPIO_GPIO \| GPIO_OUT,
	134	LCD_RESET \| GPIO_GPIO \| GPIO_OUT,
688b5cbb FE	135	/* SSI4 */
	136	PC16_PF_SSI4_FS,
	137	PC17_PF_SSI4_RXD,
	138	PC18_PF_SSI4_TXD,
	139	PC19_PF_SSI4_CLK,
4c11c286 FE	140	};
4c11c286 FE	141
d5dac4a6	142	static const struct imxuart_platform_data uart_pdata __initconst = {
ec9be0de FE	143	.flags = IMXUART_HAVE_RTSCTS,
	144	};
	145
3fac6cf3 RP	146	/*
	147	* Matrix keyboard
	148	*/
	149
	150	static const uint32_t mx27_3ds_keymap[] = {
	151	KEY(0, 0, KEY_UP),
	152	KEY(0, 1, KEY_DOWN),
	153	KEY(1, 0, KEY_RIGHT),
	154	KEY(1, 1, KEY_LEFT),
	155	KEY(1, 2, KEY_ENTER),
	156	KEY(2, 0, KEY_F6),
	157	KEY(2, 1, KEY_F8),
	158	KEY(2, 2, KEY_F9),
	159	KEY(2, 3, KEY_F10),
	160	};
	161
3f880141	162	static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
3fac6cf3 RP	163	.keymap = mx27_3ds_keymap,
	164	.keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
	165	};
	166
b5ec73eb RP	167	static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
	168	void *data)
	169	{
c084473d FE	170	return request_irq(gpio_to_irq(SD1_CD), detect_irq,
c084473d FE	171	IRQF_TRIGGER_FALLING \| IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
b5ec73eb RP	172	}
	173
	174	static void mx27_3ds_sdhc1_exit(struct device dev, void data)
	175	{
c084473d	176	free_irq(gpio_to_irq(SD1_CD), data);
b5ec73eb RP	177	}
b5ec73eb RP	178
9d3d945a	179	static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
b5ec73eb RP	180	.init = mx27_3ds_sdhc1_init,
	181	.exit = mx27_3ds_sdhc1_exit,
	182	};
	183
	184	static void mx27_3ds_sdhc1_enable_level_translator(void)
	185	{
	186	/* Turn on TXB0108 OE pin */
	187	gpio_request(SD1_EN_GPIO, "sd1_enable");
	188	gpio_direction_output(SD1_EN_GPIO, 1);
	189	}
	190
96cf4239 FE	191
	192	static int otg_phy_init(void)
	193	{
	194	gpio_request(OTG_PHY_RESET_GPIO, "usb-otg-reset");
	195	gpio_direction_output(OTG_PHY_RESET_GPIO, 0);
	196	mdelay(1);
	197	gpio_set_value(OTG_PHY_RESET_GPIO, 1);
	198	return 0;
	199	}
	200
4bd597b6 SH	201	static int mx27_3ds_otg_init(struct platform_device *pdev)
	202	{
	203	return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
	204	}
96cf4239 FE	205
96cf4239 FE	206	static struct mxc_usbh_platform_data otg_pdata __initdata = {
4bd597b6	207	.init = mx27_3ds_otg_init,
96cf4239	208	.portsc = MXC_EHCI_MODE_ULPI,
96cf4239	209	};
96cf4239 FE	210
	211	static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
	212	.operating_mode = FSL_USB2_DR_DEVICE,
	213	.phy_mode = FSL_USB2_PHY_ULPI,
	214	};
	215
33a264dd	216	static bool otg_mode_host __initdata;
96cf4239 FE	217
	218	static int __init mx27_3ds_otg_mode(char *options)
	219	{
	220	if (!strcmp(options, "host"))
33a264dd	221	otg_mode_host = true;
96cf4239	222	else if (!strcmp(options, "device"))
33a264dd	223	otg_mode_host = false;
96cf4239 FE	224	else
	225	pr_info("otg_mode neither \"host\" nor \"device\". "
	226	"Defaulting to device\n");
33a264dd	227	return 1;
96cf4239 FE	228	}
	229	__setup("otg_mode=", mx27_3ds_otg_mode);
	230
c67a3e09	231	/* Regulators */
aec250dc FE	232	static struct regulator_init_data gpo_init = {
	233	.constraints = {
	234	.boot_on = 1,
	235	.always_on = 1,
	236	}
	237	};
	238
c67a3e09	239	static struct regulator_consumer_supply vmmc1_consumers[] = {
0556dc34	240	REGULATOR_SUPPLY("vcore", "spi0.0"),
c67a3e09 FE	241	};
	242
	243	static struct regulator_init_data vmmc1_init = {
	244	.constraints = {
	245	.min_uV = 2800000,
	246	.max_uV = 2800000,
aec250dc FE	247	.apply_uV = 1,
	248	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
	249	REGULATOR_CHANGE_STATUS,
c67a3e09 FE	250	},
	251	.num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
	252	.consumer_supplies = vmmc1_consumers,
	253	};
	254
	255	static struct regulator_consumer_supply vgen_consumers[] = {
0556dc34	256	REGULATOR_SUPPLY("vdd", "spi0.0"),
c67a3e09 FE	257	};
	258
	259	static struct regulator_init_data vgen_init = {
	260	.constraints = {
	261	.min_uV = 1800000,
	262	.max_uV = 1800000,
	263	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	264	},
	265	.num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
	266	.consumer_supplies = vgen_consumers,
	267	};
	268
5836372e	269	static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = {
c67a3e09	270	{
074cee92	271	.id = MC13783_REG_VMMC1,
c67a3e09 FE	272	.init_data = &vmmc1_init,
c67a3e09 FE	273	}, {
074cee92	274	.id = MC13783_REG_VGEN,
c67a3e09	275	.init_data = &vgen_init,
aec250dc FE	276	}, {
	277	.id = MC13783_REG_GPO1, /* Turn on 1.8V */
	278	.init_data = &gpo_init,
	279	}, {
	280	.id = MC13783_REG_GPO3, /* Turn on 3.3V */
	281	.init_data = &gpo_init,
c67a3e09 FE	282	},
	283	};
	284
	285	/* MC13783 */
688b5cbb FE	286	static struct mc13xxx_codec_platform_data mx27_3ds_codec = {
	287	.dac_ssi_port = MC13783_SSI1_PORT,
	288	.adc_ssi_port = MC13783_SSI1_PORT,
	289	};
	290
4ec1b54c AS	291	static struct mc13xxx_platform_data mc13783_pdata = {
	292	.regulators = {
	293	.regulators = mx27_3ds_regulators,
	294	.num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
	295
	296	},
688b5cbb FE	297	.flags = MC13XXX_USE_TOUCHSCREEN \| MC13XXX_USE_RTC \|
	298	MC13XXX_USE_CODEC,
	299	.codec = &mx27_3ds_codec,
	300	};
	301
	302	static struct imx_ssi_platform_data mx27_3ds_ssi_pdata = {
	303	.flags = IMX_SSI_DMA \| IMX_SSI_NET,
c67a3e09 FE	304	};
	305
	306	/* SPI */
1abcb4cc FE	307	static int spi1_chipselect[] = {SPI1_SS0};
	308
	309	static const struct spi_imx_master spi1_pdata __initconst = {
	310	.chipselect = spi1_chipselect,
	311	.num_chipselect = ARRAY_SIZE(spi1_chipselect),
	312	};
	313
6d2385ab	314	static int spi2_chipselect[] = {SPI2_SS0};
c67a3e09 FE	315
c67a3e09 FE	316	static const struct spi_imx_master spi2_pdata __initconst = {
6d2385ab FE	317	.chipselect = spi2_chipselect,
6d2385ab FE	318	.num_chipselect = ARRAY_SIZE(spi2_chipselect),
c67a3e09 FE	319	};
c67a3e09 FE	320
1abcb4cc FE	321	static struct imx_fb_videomode mx27_3ds_modes[] = {
	322	{ /* 480x640 @ 60 Hz */
	323	.mode = {
	324	.name = "Epson-VGA",
	325	.refresh = 60,
	326	.xres = 480,
	327	.yres = 640,
	328	.pixclock = 41701,
	329	.left_margin = 20,
	330	.right_margin = 41,
	331	.upper_margin = 10,
	332	.lower_margin = 5,
	333	.hsync_len = 20,
	334	.vsync_len = 10,
	335	.sync = FB_SYNC_OE_ACT_HIGH \|
	336	FB_SYNC_CLK_INVERT,
	337	.vmode = FB_VMODE_NONINTERLACED,
	338	.flag = 0,
	339	},
	340	.bpp = 16,
	341	.pcr = 0xFAC08B82,
	342	},
	343	};
	344
	345	static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = {
	346	.mode = mx27_3ds_modes,
	347	.num_modes = ARRAY_SIZE(mx27_3ds_modes),
	348	.pwmr = 0x00A903FF,
	349	.lscr1 = 0x00120300,
	350	.dmacr = 0x00020010,
	351	};
	352
	353	/* LCD */
	354	static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = {
	355	.reset_gpio = LCD_RESET,
	356	.data_enable_gpio = LCD_ENABLE,
1abcb4cc FE	357	};
1abcb4cc FE	358
c67a3e09 FE	359	static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
	360	{
	361	.modalias = "mc13783",
	362	.max_speed_hz = 1000000,
	363	.bus_num = 1,
	364	.chip_select = 0, /* SS0 */
	365	.platform_data = &mc13783_pdata,
84715dd6	366	/* irq number is run-time assigned */
c67a3e09	367	.mode = SPI_CS_HIGH,
1abcb4cc FE	368	}, {
	369	.modalias = "l4f00242t03",
	370	.max_speed_hz = 5000000,
	371	.bus_num = 0,
	372	.chip_select = 0, /* SS0 */
	373	.platform_data = &mx27_3ds_lcd_pdata,
c67a3e09 FE	374	},
	375	};
	376
5885f036 FE	377	static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = {
	378	.bitrate = 100000,
	379	};
96cf4239	380
ec9be0de FE	381	static void __init mx27pdk_init(void)
ec9be0de FE	382	{
b78d8e59 SG	383	imx27_soc_init();
b78d8e59 SG	384
ec9be0de FE	385	mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
ec9be0de FE	386	"mx27pdk");
d5dac4a6	387	imx27_add_imx_uart0(&uart_pdata);
6bd96f3c	388	imx27_add_fec(NULL);
3f880141	389	imx27_add_imx_keypad(&mx27_3ds_keymap_data);
bec31a85	390	imx27_add_imx2_wdt();
88b07462 VZ	391
	392	imx27_add_spi_imx1(&spi2_pdata);
	393	imx27_add_spi_imx0(&spi1_pdata);
	394
	395	imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data);
88b07462 VZ	396	imx27_add_imx_fb(&mx27_3ds_fb_data);
	397
	398	imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata);
	399	}
	400
	401	static void __init mx27pdk_late_init(void)
	402	{
88b07462 VZ	403	mx27_3ds_sdhc1_enable_level_translator();
	404	imx27_add_mxc_mmc(0, &sdhc1_pdata);
	405
96cf4239	406	otg_phy_init();
48f6b099	407
96cf4239	408	if (otg_mode_host) {
48f6b099 SH	409	otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
48f6b099 SH	410	ULPI_OTG_DRVVBUS_EXT);
96cf4239	411
48f6b099 SH	412	if (otg_pdata.otg)
48f6b099 SH	413	imx27_add_mxc_ehci_otg(&otg_pdata);
96cf4239	414	}
48f6b099	415
96cf4239 FE	416	if (!otg_mode_host)
	417	imx27_add_fsl_usb2_udc(&otg_device_pdata);
	418
84715dd6	419	mx27_3ds_spi_devs[0].irq = gpio_to_irq(PMIC_INT);
c67a3e09	420	spi_register_board_info(mx27_3ds_spi_devs,
88b07462	421	ARRAY_SIZE(mx27_3ds_spi_devs));
92cb33f1	422
ed4a7fb0	423	if (mxc_expio_init(MX27_CS5_BASE_ADDR, IMX_GPIO_NR(3, 28)))
92cb33f1	424	pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n");
4c11c286	425
688b5cbb FE	426
688b5cbb FE	427	imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
ec9be0de FE	428	}
	429
	430	static void __init mx27pdk_timer_init(void)
	431	{
	432	mx27_clocks_init(26000000);
	433	}
	434
ec9be0de FE	435	MACHINE_START(MX27_3DS, "Freescale MX27PDK")
ec9be0de FE	436	/* maintainer: Freescale Semiconductor, Inc. */
dc8f1907	437	.atag_offset = 0x100,
3dac2196 UKK	438	.map_io = mx27_map_io,
	439	.init_early = imx27_init_early,
	440	.init_irq = mx27_init_irq,
6bb27d73	441	.init_time = mx27pdk_timer_init,
3dac2196	442	.init_machine = mx27pdk_init,
88b07462	443	.init_late = mx27pdk_late_init,
65ea7884	444	.restart = mxc_restart,
ec9be0de	445	MACHINE_END