Linux 3.7-rc3
[linux-2.6-block.git] / arch / arm / mach-imx / mach-imx27_visstrim_m10.c
CommitLineData
3b161e51
JM
1/*
2 * mach-imx27_visstrim_m10.c
3 *
4 * Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
5 *
6 * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 * MA 02110-1301, USA.
22 */
23
24#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25
26#include <linux/platform_device.h>
27#include <linux/mtd/physmap.h>
28#include <linux/i2c.h>
29#include <linux/i2c/pca953x.h>
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JM
30#include <linux/input.h>
31#include <linux/gpio.h>
4bd597b6 32#include <linux/delay.h>
f52f5a55 33#include <linux/dma-mapping.h>
acb6464c 34#include <linux/leds.h>
d41789b2 35#include <linux/platform_data/asoc-mx27vis.h>
f52f5a55 36#include <media/soc_camera.h>
c86566bb 37#include <sound/tlv320aic32x4.h>
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JM
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/mach/time.h>
396c89b3 41#include <asm/system_info.h>
b6c14dc2 42#include <asm/memblock.h>
3b161e51 43#include <mach/common.h>
438196c3 44#include <mach/hardware.h>
c0450dff 45#include <mach/iomux-mx27.h>
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46
47#include "devices-imx27.h"
3b161e51 48
f52f5a55
JM
49#define TVP5150_RSTN (GPIO_PORTC + 18)
50#define TVP5150_PWDN (GPIO_PORTC + 19)
3b161e51 51#define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
438196c3 52#define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)
3b161e51 53
435ca241
JM
54#define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
55#define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
56#define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
57
58#define EXPBOARD_BIT2 (GPIO_PORTD + 25)
59#define EXPBOARD_BIT1 (GPIO_PORTD + 27)
60#define EXPBOARD_BIT0 (GPIO_PORTD + 28)
61
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SG
62#define AMP_GAIN_0 (GPIO_PORTF + 9)
63#define AMP_GAIN_1 (GPIO_PORTF + 8)
64#define AMP_MUTE_SDL (GPIO_PORTE + 5)
65#define AMP_MUTE_SDR (GPIO_PORTF + 7)
66
6c80ee51 67static const int visstrim_m10_pins[] __initconst = {
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JM
68 /* UART1 (console) */
69 PE12_PF_UART1_TXD,
70 PE13_PF_UART1_RXD,
71 PE14_PF_UART1_CTS,
72 PE15_PF_UART1_RTS,
73 /* FEC */
74 PD0_AIN_FEC_TXD0,
75 PD1_AIN_FEC_TXD1,
76 PD2_AIN_FEC_TXD2,
77 PD3_AIN_FEC_TXD3,
78 PD4_AOUT_FEC_RX_ER,
79 PD5_AOUT_FEC_RXD1,
80 PD6_AOUT_FEC_RXD2,
81 PD7_AOUT_FEC_RXD3,
82 PD8_AF_FEC_MDIO,
83 PD9_AIN_FEC_MDC,
84 PD10_AOUT_FEC_CRS,
85 PD11_AOUT_FEC_TX_CLK,
86 PD12_AOUT_FEC_RXD0,
87 PD13_AOUT_FEC_RX_DV,
88 PD14_AOUT_FEC_RX_CLK,
89 PD15_AOUT_FEC_COL,
90 PD16_AIN_FEC_TX_ER,
91 PF23_AIN_FEC_TX_EN,
a5e2051b
JM
92 /* SSI1 */
93 PC20_PF_SSI1_FS,
94 PC21_PF_SSI1_RXD,
95 PC22_PF_SSI1_TXD,
96 PC23_PF_SSI1_CLK,
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JM
97 /* SDHC1 */
98 PE18_PF_SD1_D0,
99 PE19_PF_SD1_D1,
100 PE20_PF_SD1_D2,
101 PE21_PF_SD1_D3,
102 PE22_PF_SD1_CMD,
103 PE23_PF_SD1_CLK,
104 /* Both I2Cs */
105 PD17_PF_I2C_DATA,
106 PD18_PF_I2C_CLK,
107 PC5_PF_I2C2_SDA,
108 PC6_PF_I2C2_SCL,
109 /* USB OTG */
110 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
111 PC9_PF_USBOTG_DATA0,
112 PC11_PF_USBOTG_DATA1,
113 PC10_PF_USBOTG_DATA2,
114 PC13_PF_USBOTG_DATA3,
115 PC12_PF_USBOTG_DATA4,
116 PC7_PF_USBOTG_DATA5,
117 PC8_PF_USBOTG_DATA6,
118 PE25_PF_USBOTG_DATA7,
119 PE24_PF_USBOTG_CLK,
120 PE2_PF_USBOTG_DIR,
121 PE0_PF_USBOTG_NXT,
122 PE1_PF_USBOTG_STP,
123 PB23_PF_USB_PWR,
124 PB24_PF_USB_OC,
f52f5a55 125 /* CSI */
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JM
126 TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
127 TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
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JM
128 PB10_PF_CSI_D0,
129 PB11_PF_CSI_D1,
130 PB12_PF_CSI_D2,
131 PB13_PF_CSI_D3,
132 PB14_PF_CSI_D4,
133 PB15_PF_CSI_MCLK,
134 PB16_PF_CSI_PIXCLK,
135 PB17_PF_CSI_D5,
136 PB18_PF_CSI_D6,
137 PB19_PF_CSI_D7,
138 PB20_PF_CSI_VSYNC,
139 PB21_PF_CSI_HSYNC,
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JM
140 /* mother board version */
141 MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
142 MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
143 MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
144 /* expansion board version */
145 EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
146 EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
147 EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
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SG
148 /* Audio AMP control */
149 AMP_GAIN_0 | GPIO_GPIO | GPIO_OUT,
150 AMP_GAIN_1 | GPIO_GPIO | GPIO_OUT,
151 AMP_MUTE_SDL | GPIO_GPIO | GPIO_OUT,
152 AMP_MUTE_SDR | GPIO_GPIO | GPIO_OUT,
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JM
153};
154
155static struct gpio visstrim_m10_version_gpios[] = {
156 { EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
157 { EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
158 { EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
159 { MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
160 { MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
161 { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
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JM
162};
163
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JM
164static const struct gpio visstrim_m10_gpios[] __initconst = {
165 {
166 .gpio = TVP5150_RSTN,
167 .flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
168 .label = "tvp5150_rstn",
169 },
170 {
171 .gpio = TVP5150_PWDN,
172 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
173 .label = "tvp5150_pwdn",
174 },
175 {
176 .gpio = OTG_PHY_CS_GPIO,
177 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
178 .label = "usbotg_cs",
179 },
d41789b2
SG
180 {
181 .gpio = AMP_GAIN_0,
182 .flags = GPIOF_DIR_OUT,
183 .label = "amp-gain-0",
184 },
185 {
186 .gpio = AMP_GAIN_1,
187 .flags = GPIOF_DIR_OUT,
188 .label = "amp-gain-1",
189 },
190 {
191 .gpio = AMP_MUTE_SDL,
192 .flags = GPIOF_DIR_OUT,
193 .label = "amp-mute-sdl",
194 },
195 {
196 .gpio = AMP_MUTE_SDR,
197 .flags = GPIOF_DIR_OUT,
198 .label = "amp-mute-sdr",
199 },
18847b42
JM
200};
201
f52f5a55
JM
202/* Camera */
203static int visstrim_camera_power(struct device *dev, int on)
204{
205 gpio_set_value(TVP5150_PWDN, on);
206
207 return 0;
208};
209
210static int visstrim_camera_reset(struct device *dev)
211{
212 gpio_set_value(TVP5150_RSTN, 0);
213 ndelay(500);
214 gpio_set_value(TVP5150_RSTN, 1);
215
216 return 0;
217};
218
219static struct i2c_board_info visstrim_i2c_camera = {
220 I2C_BOARD_INFO("tvp5150", 0x5d),
221};
222
223static struct soc_camera_link iclink_tvp5150 = {
224 .bus_id = 0,
225 .board_info = &visstrim_i2c_camera,
226 .i2c_adapter_id = 0,
227 .power = visstrim_camera_power,
228 .reset = visstrim_camera_reset,
229};
230
231static struct mx2_camera_platform_data visstrim_camera = {
232 .flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
5ff203b5 233 MX2_CAMERA_PCLK_SAMPLE_RISING,
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JM
234 .clk = 100000,
235};
236
237static phys_addr_t mx2_camera_base __initdata;
238#define MX2_CAMERA_BUF_SIZE SZ_8M
239
240static void __init visstrim_camera_init(void)
241{
242 struct platform_device *pdev;
243 int dma;
244
f52f5a55
JM
245 gpio_set_value(TVP5150_PWDN, 1);
246 ndelay(1);
247 gpio_set_value(TVP5150_RSTN, 0);
248 ndelay(500);
249 gpio_set_value(TVP5150_RSTN, 1);
250 ndelay(200000);
251
252 pdev = imx27_add_mx2_camera(&visstrim_camera);
253 if (IS_ERR(pdev))
254 return;
255
256 dma = dma_declare_coherent_memory(&pdev->dev,
257 mx2_camera_base, mx2_camera_base,
258 MX2_CAMERA_BUF_SIZE,
259 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
260 if (!(dma & DMA_MEMORY_MAP))
261 return;
262}
263
264static void __init visstrim_reserve(void)
265{
266 /* reserve 4 MiB for mx2-camera */
062a15cf 267 mx2_camera_base = arm_memblock_steal(3 * MX2_CAMERA_BUF_SIZE,
f52f5a55 268 MX2_CAMERA_BUF_SIZE);
f52f5a55
JM
269}
270
3b161e51
JM
271/* GPIOs used as events for applications */
272static struct gpio_keys_button visstrim_gpio_keys[] = {
273 {
274 .type = EV_KEY,
275 .code = KEY_RESTART,
276 .gpio = (GPIO_PORTC + 15),
277 .desc = "Default config",
278 .active_low = 0,
279 .wakeup = 1,
280 },
281 {
282 .type = EV_KEY,
283 .code = KEY_RECORD,
284 .gpio = (GPIO_PORTF + 14),
285 .desc = "Record",
286 .active_low = 0,
287 .wakeup = 1,
288 },
289 {
290 .type = EV_KEY,
291 .code = KEY_STOP,
292 .gpio = (GPIO_PORTF + 13),
293 .desc = "Stop",
294 .active_low = 0,
295 .wakeup = 1,
296 }
297};
298
5309498a
UKK
299static const struct gpio_keys_platform_data
300 visstrim_gpio_keys_platform_data __initconst = {
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JM
301 .buttons = visstrim_gpio_keys,
302 .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
303};
304
acb6464c
JM
305/* led */
306static const struct gpio_led visstrim_m10_leds[] __initconst = {
307 {
308 .name = "visstrim:ld0",
309 .default_trigger = "nand-disk",
310 .gpio = (GPIO_PORTC + 29),
311 },
312 {
313 .name = "visstrim:ld1",
314 .default_trigger = "nand-disk",
315 .gpio = (GPIO_PORTC + 24),
316 },
317 {
318 .name = "visstrim:ld2",
319 .default_trigger = "nand-disk",
320 .gpio = (GPIO_PORTC + 28),
321 },
322 {
323 .name = "visstrim:ld3",
324 .default_trigger = "nand-disk",
325 .gpio = (GPIO_PORTC + 25),
326 },
327};
328
329static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
330 .leds = visstrim_m10_leds,
331 .num_leds = ARRAY_SIZE(visstrim_m10_leds),
332};
333
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JM
334/* Visstrim_SM10 has a microSD slot connected to sdhc1 */
335static int visstrim_m10_sdhc1_init(struct device *dev,
336 irq_handler_t detect_irq, void *data)
337{
338 int ret;
339
438196c3
SG
340 ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
341 IRQF_TRIGGER_FALLING, "mmc-detect", data);
3b161e51
JM
342 return ret;
343}
344
345static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
346{
438196c3 347 free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
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JM
348}
349
9d3d945a 350static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
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JM
351 .init = visstrim_m10_sdhc1_init,
352 .exit = visstrim_m10_sdhc1_exit,
353};
354
355/* Visstrim_SM10 NOR flash */
356static struct physmap_flash_data visstrim_m10_flash_data = {
357 .width = 2,
358};
359
360static struct resource visstrim_m10_flash_resource = {
361 .start = 0xc0000000,
362 .end = 0xc0000000 + SZ_64M - 1,
363 .flags = IORESOURCE_MEM,
364};
365
366static struct platform_device visstrim_m10_nor_mtd_device = {
367 .name = "physmap-flash",
368 .id = 0,
369 .dev = {
370 .platform_data = &visstrim_m10_flash_data,
371 },
372 .num_resources = 1,
373 .resource = &visstrim_m10_flash_resource,
374};
375
376static struct platform_device *platform_devices[] __initdata = {
3b161e51 377 &visstrim_m10_nor_mtd_device,
3b161e51
JM
378};
379
380/* Visstrim_M10 uses UART0 as console */
381static const struct imxuart_platform_data uart_pdata __initconst = {
382 .flags = IMXUART_HAVE_RTSCTS,
383};
384
385/* I2C */
386static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
387 .bitrate = 100000,
388};
389
390static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
391 .gpio_base = 240, /* After MX27 internal GPIOs */
392 .invert = 0,
393};
394
c86566bb
JM
395static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
396 .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
397 AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
398 AIC32X4_PWR_AIC32X4_LDO_ENABLE |
399 AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
400 AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
401 .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
402 AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
403 .swapdacs = false,
404};
405
3b161e51
JM
406static struct i2c_board_info visstrim_m10_i2c_devices[] = {
407 {
408 I2C_BOARD_INFO("pca9555", 0x20),
409 .platform_data = &visstrim_m10_pca9555_pdata,
410 },
a5e2051b
JM
411 {
412 I2C_BOARD_INFO("tlv320aic32x4", 0x18),
c86566bb 413 .platform_data = &visstrim_m10_aic32x4_pdata,
257b49c3
JM
414 },
415 {
416 I2C_BOARD_INFO("m41t00", 0x68),
a5e2051b 417 }
3b161e51
JM
418};
419
420/* USB OTG */
421static int otg_phy_init(struct platform_device *pdev)
422{
4bd597b6 423 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
3b161e51
JM
424}
425
2eb42d5c
UKK
426static const struct mxc_usbh_platform_data
427visstrim_m10_usbotg_pdata __initconst = {
3b161e51
JM
428 .init = otg_phy_init,
429 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
3b161e51
JM
430};
431
a5e2051b
JM
432/* SSI */
433static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
434 .flags = IMX_SSI_DMA | IMX_SSI_SYN,
435};
436
b6c14dc2
JM
437/* coda */
438
439static void __init visstrim_coda_init(void)
440{
441 struct platform_device *pdev;
442 int dma;
443
444 pdev = imx27_add_coda();
445 dma = dma_declare_coherent_memory(&pdev->dev,
446 mx2_camera_base + MX2_CAMERA_BUF_SIZE,
447 mx2_camera_base + MX2_CAMERA_BUF_SIZE,
448 MX2_CAMERA_BUF_SIZE,
449 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
450 if (!(dma & DMA_MEMORY_MAP))
451 return;
452}
453
062a15cf
JM
454/* DMA deinterlace */
455static struct platform_device visstrim_deinterlace = {
456 .name = "m2m-deinterlace",
457 .id = 0,
458};
459
460static void __init visstrim_deinterlace_init(void)
461{
462 int ret = -ENOMEM;
463 struct platform_device *pdev = &visstrim_deinterlace;
464 int dma;
465
466 ret = platform_device_register(pdev);
467
468 dma = dma_declare_coherent_memory(&pdev->dev,
469 mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
470 mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
471 MX2_CAMERA_BUF_SIZE,
472 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
473 if (!(dma & DMA_MEMORY_MAP))
474 return;
475}
476
477
d41789b2
SG
478/* Audio */
479static const struct snd_mx27vis_platform_data snd_mx27vis_pdata __initconst = {
480 .amp_gain0_gpio = AMP_GAIN_0,
481 .amp_gain1_gpio = AMP_GAIN_1,
482 .amp_mutel_gpio = AMP_MUTE_SDL,
483 .amp_muter_gpio = AMP_MUTE_SDR,
484};
485
435ca241
JM
486static void __init visstrim_m10_revision(void)
487{
488 int exp_version = 0;
489 int mo_version = 0;
490 int ret;
491
492 ret = gpio_request_array(visstrim_m10_version_gpios,
493 ARRAY_SIZE(visstrim_m10_version_gpios));
494 if (ret) {
495 pr_err("Failed to request version gpios");
496 return;
497 }
498
499 /* Get expansion board version (negative logic) */
500 exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
501 exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
502 exp_version |= !gpio_get_value(EXPBOARD_BIT0);
503
504 /* Get mother board version (negative logic) */
505 mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
506 mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
507 mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);
508
509 system_rev = 0x27000;
510 system_rev |= (mo_version << 4);
511 system_rev |= exp_version;
512}
513
3b161e51
JM
514static void __init visstrim_m10_board_init(void)
515{
516 int ret;
517
b78d8e59 518 imx27_soc_init();
435ca241 519 visstrim_m10_revision();
b78d8e59 520
3b161e51
JM
521 ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
522 ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
523 if (ret)
524 pr_err("Failed to setup pins (%d)\n", ret);
525
18847b42
JM
526 ret = gpio_request_array(visstrim_m10_gpios,
527 ARRAY_SIZE(visstrim_m10_gpios));
528 if (ret)
529 pr_err("Failed to request gpios (%d)\n", ret);
530
a5e2051b 531 imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
3b161e51
JM
532 imx27_add_imx_uart0(&uart_pdata);
533
77a406da
UKK
534 imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
535 imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
baa1dee1
JM
536 i2c_register_board_info(0, visstrim_m10_i2c_devices,
537 ARRAY_SIZE(visstrim_m10_i2c_devices));
538
9d3d945a 539 imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
2eb42d5c 540 imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
6bd96f3c 541 imx27_add_fec(NULL);
5309498a 542 imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
3b161e51 543 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
d41789b2
SG
544 imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata,
545 sizeof(snd_mx27vis_pdata));
f52f5a55
JM
546 platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
547 &iclink_tvp5150, sizeof(iclink_tvp5150));
acb6464c 548 gpio_led_register_device(0, &visstrim_m10_led_data);
062a15cf 549 visstrim_deinterlace_init();
f52f5a55 550 visstrim_camera_init();
b6c14dc2 551 visstrim_coda_init();
3b161e51
JM
552}
553
554static void __init visstrim_m10_timer_init(void)
555{
556 mx27_clocks_init((unsigned long)25000000);
557}
558
559static struct sys_timer visstrim_m10_timer = {
560 .init = visstrim_m10_timer_init,
561};
562
563MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
dc8f1907 564 .atag_offset = 0x100,
f52f5a55 565 .reserve = visstrim_reserve,
3dac2196
UKK
566 .map_io = mx27_map_io,
567 .init_early = imx27_init_early,
568 .init_irq = mx27_init_irq,
ffa2ea3f 569 .handle_irq = imx27_handle_irq,
3dac2196
UKK
570 .timer = &visstrim_m10_timer,
571 .init_machine = visstrim_m10_board_init,
65ea7884 572 .restart = mxc_restart,
3b161e51 573MACHINE_END