[linux-2.6-block.git] / arch / arm / mach-imx / mach-armadillo5x0.c

/*
 * armadillo5x0.c
 *
 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
 * updates in http://alberdroid.blogspot.com/
 *
 * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
 * Based on mx31ads.c and pcm037.c Great Work!
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <linux/input.h>
#include <linux/i2c.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>

#include "common.h"
#include "devices-imx31.h"
#include "crmregs-imx3.h"
#include "ehci.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"

static int armadillo5x0_pins[] = {
	/* UART1 */
	MX31_PIN_CTS1__CTS1,
	MX31_PIN_RTS1__RTS1,
	MX31_PIN_TXD1__TXD1,
	MX31_PIN_RXD1__RXD1,
	/* UART2 */
	MX31_PIN_CTS2__CTS2,
	MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2,
	MX31_PIN_RXD2__RXD2,
	/* LAN9118_IRQ */
	IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
	/* SDHC1 */
	MX31_PIN_SD1_DATA3__SD1_DATA3,
	MX31_PIN_SD1_DATA2__SD1_DATA2,
	MX31_PIN_SD1_DATA1__SD1_DATA1,
	MX31_PIN_SD1_DATA0__SD1_DATA0,
	MX31_PIN_SD1_CLK__SD1_CLK,
	MX31_PIN_SD1_CMD__SD1_CMD,
	/* Framebuffer */
	MX31_PIN_LD0__LD0,
	MX31_PIN_LD1__LD1,
	MX31_PIN_LD2__LD2,
	MX31_PIN_LD3__LD3,
	MX31_PIN_LD4__LD4,
	MX31_PIN_LD5__LD5,
	MX31_PIN_LD6__LD6,
	MX31_PIN_LD7__LD7,
	MX31_PIN_LD8__LD8,
	MX31_PIN_LD9__LD9,
	MX31_PIN_LD10__LD10,
	MX31_PIN_LD11__LD11,
	MX31_PIN_LD12__LD12,
	MX31_PIN_LD13__LD13,
	MX31_PIN_LD14__LD14,
	MX31_PIN_LD15__LD15,
	MX31_PIN_LD16__LD16,
	MX31_PIN_LD17__LD17,
	MX31_PIN_VSYNC3__VSYNC3,
	MX31_PIN_HSYNC__HSYNC,
	MX31_PIN_FPSHIFT__FPSHIFT,
	MX31_PIN_DRDY0__DRDY0,
	IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
	/* I2C2 */
	MX31_PIN_CSPI2_MOSI__SCL,
	MX31_PIN_CSPI2_MISO__SDA,
	/* OTG */
	MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
	MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
	MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
	MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
	MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
	MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
	MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
	MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
	MX31_PIN_USBOTG_CLK__USBOTG_CLK,
	MX31_PIN_USBOTG_DIR__USBOTG_DIR,
	MX31_PIN_USBOTG_NXT__USBOTG_NXT,
	MX31_PIN_USBOTG_STP__USBOTG_STP,
	/* USB host 2 */
	IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
	IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
};

/* USB */

#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)

#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

static int usbotg_init(struct platform_device *pdev)
{
	int err;

	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);

	/* Chip already enabled by hardware */
	/* OTG phy reset*/
	err = gpio_request(OTG_RESET, "USB-OTG-RESET");
	if (err) {
		pr_err("Failed to request the usb otg reset gpio\n");
		return err;
	}

	err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
	if (err) {
		pr_err("Failed to reset the usb otg phy\n");
		goto otg_free_reset;
	}

	gpio_set_value(OTG_RESET, 0/*LOW*/);
	mdelay(5);
	gpio_set_value(OTG_RESET, 1/*HIGH*/);
	mdelay(10);

	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
			MXC_EHCI_INTERFACE_DIFF_UNI);

otg_free_reset:
	gpio_free(OTG_RESET);
	return err;
}

static int usbh2_init(struct platform_device *pdev)
{
	int err;

	mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);

	mxc_iomux_set_gpr(MUX_PGP_UH2, true);


	/* Enable the chip */
	err = gpio_request(USBH2_CS, "USB-H2-CS");
	if (err) {
		pr_err("Failed to request the usb host 2 CS gpio\n");
		return err;
	}

	err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
	if (err) {
		pr_err("Failed to drive the usb host 2 CS gpio\n");
		goto h2_free_cs;
	}

	/* H2 phy reset*/
	err = gpio_request(USBH2_RESET, "USB-H2-RESET");
	if (err) {
		pr_err("Failed to request the usb host 2 reset gpio\n");
		goto h2_free_cs;
	}

	err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
	if (err) {
		pr_err("Failed to reset the usb host 2 phy\n");
		goto h2_free_reset;
	}

	gpio_set_value(USBH2_RESET, 0/*LOW*/);
	mdelay(5);
	gpio_set_value(USBH2_RESET, 1/*HIGH*/);
	mdelay(10);

	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
			MXC_EHCI_INTERFACE_DIFF_UNI);

h2_free_reset:
	gpio_free(USBH2_RESET);
h2_free_cs:
	gpio_free(USBH2_CS);
	return err;
}

static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
	.init	= usbotg_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
	.init	= usbh2_init,
	.portsc	= MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
};

/* RTC over I2C*/
#define ARMADILLO5X0_RTC_GPIO	IOMUX_TO_GPIO(MX31_PIN_SRXD4)

static struct i2c_board_info armadillo5x0_i2c_rtc = {
	I2C_BOARD_INFO("s35390a", 0x30),
};

/* GPIO BUTTONS */
static struct gpio_keys_button armadillo5x0_buttons[] = {
	{
		.code		= KEY_ENTER, /*28*/
		.gpio		= IOMUX_TO_GPIO(MX31_PIN_SCLK0),
		.active_low	= 1,
		.desc		= "menu",
		.wakeup		= 1,
	}, {
		.code		= KEY_BACK, /*158*/
		.gpio		= IOMUX_TO_GPIO(MX31_PIN_SRST0),
		.active_low	= 1,
		.desc		= "back",
		.wakeup		= 1,
	}
};

static const struct gpio_keys_platform_data
		armadillo5x0_button_data __initconst = {
	.buttons	= armadillo5x0_buttons,
	.nbuttons	= ARRAY_SIZE(armadillo5x0_buttons),
};

/*
 * NAND Flash
 */
static const struct mxc_nand_platform_data
armadillo5x0_nand_board_info __initconst = {
	.width		= 1,
	.hw_ecc		= 1,
};

/*
 * MTD NOR Flash
 */
static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
	{
		.name		= "nor.bootloader",
		.offset		= 0x00000000,
		.size		= 4*32*1024,
	}, {
		.name		= "nor.kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 16*128*1024,
	}, {
		.name		= "nor.userland",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 110*128*1024,
	}, {
		.name		= "nor.config",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 1*128*1024,
	},
};

static const struct physmap_flash_data
		armadillo5x0_nor_flash_pdata __initconst = {
	.width		= 2,
	.parts		= armadillo5x0_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
};

static const struct resource armadillo5x0_nor_flash_resource __initconst = {
	.flags		= IORESOURCE_MEM,
	.start		= MX31_CS0_BASE_ADDR,
	.end		= MX31_CS0_BASE_ADDR + SZ_64M - 1,
};

/*
 * FB support
 */
static const struct fb_videomode fb_modedb[] = {
	{	/* 640x480 @ 60 Hz */
		.name		= "CRT-VGA",
		.refresh	= 60,
		.xres		= 640,
		.yres		= 480,
		.pixclock	= 39721,
		.left_margin	= 35,
		.right_margin	= 115,
		.upper_margin	= 43,
		.lower_margin	= 1,
		.hsync_len	= 10,
		.vsync_len	= 1,
		.sync		= FB_SYNC_OE_ACT_HIGH,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	}, {/* 800x600 @ 56 Hz */
		.name		= "CRT-SVGA",
		.refresh	= 56,
		.xres		= 800,
		.yres		= 600,
		.pixclock	= 30000,
		.left_margin	= 30,
		.right_margin	= 108,
		.upper_margin	= 13,
		.lower_margin	= 10,
		.hsync_len	= 10,
		.vsync_len	= 1,
		.sync		= FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
				  FB_SYNC_VERT_HIGH_ACT,
		.vmode		= FB_VMODE_NONINTERLACED,
		.flag		= 0,
	},
};

static struct mx3fb_platform_data mx3fb_pdata __initdata = {
	.name		= "CRT-VGA",
	.mode		= fb_modedb,
	.num_modes	= ARRAY_SIZE(fb_modedb),
};

/*
 * SDHC 1
 * MMC support
 */
static int armadillo5x0_sdhc1_get_ro(struct device *dev)
{
	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
}

static int armadillo5x0_sdhc1_init(struct device *dev,
				   irq_handler_t detect_irq, void *data)
{
	int ret;
	int gpio_det, gpio_wp;

	gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);

	ret = gpio_request(gpio_det, "sdhc-card-detect");
	if (ret)
		return ret;

	gpio_direction_input(gpio_det);

	ret = gpio_request(gpio_wp, "sdhc-write-protect");
	if (ret)
		goto err_gpio_free;

	gpio_direction_input(gpio_wp);

	/* When supported the trigger type have to be BOTH */
	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)),
			  detect_irq, IRQF_TRIGGER_FALLING,
			  "sdhc-detect", data);

	if (ret)
		goto err_gpio_free_2;

	return 0;

err_gpio_free_2:
	gpio_free(gpio_wp);

err_gpio_free:
	gpio_free(gpio_det);

	return ret;

}

static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)), data);
	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
}

static const struct imxmmc_platform_data sdhc_pdata __initconst = {
	.get_ro = armadillo5x0_sdhc1_get_ro,
	.init = armadillo5x0_sdhc1_init,
	.exit = armadillo5x0_sdhc1_exit,
};

/*
 * SMSC 9118
 * Network support
 */
static struct resource armadillo5x0_smc911x_resources[] = {
	{
		.start	= MX31_CS3_BASE_ADDR,
		.end	= MX31_CS3_BASE_ADDR + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		/* irq number is run-time assigned */
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
	},
};

static struct smsc911x_platform_config smsc911x_info = {
	.flags		= SMSC911X_USE_16BIT,
	.irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
};

static struct platform_device armadillo5x0_smc911x_device = {
	.name           = "smsc911x",
	.id             = -1,
	.num_resources  = ARRAY_SIZE(armadillo5x0_smc911x_resources),
	.resource       = armadillo5x0_smc911x_resources,
	.dev            = {
		.platform_data = &smsc911x_info,
	},
};

/* UART device data */
static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static struct platform_device *devices[] __initdata = {
	&armadillo5x0_smc911x_device,
};

static struct regulator_consumer_supply dummy_supplies[] = {
	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
	REGULATOR_SUPPLY("vddvario", "smsc911x"),
};

/*
 * Perform board specific initializations
 */
static void __init armadillo5x0_init(void)
{
	imx31_soc_init();

	mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
			ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");

	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));

	armadillo5x0_smc911x_resources[1].start =
			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
	armadillo5x0_smc911x_resources[1].end =
			gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
	platform_add_devices(devices, ARRAY_SIZE(devices));
	imx_add_gpio_keys(&armadillo5x0_button_data);
	imx31_add_imx_i2c1(NULL);

	/* Register UART */
	imx31_add_imx_uart0(&uart_pdata);
	imx31_add_imx_uart1(&uart_pdata);

	/* SMSC9118 IRQ pin */
	gpio_direction_input(MX31_PIN_GPIO1_0);

	/* Register SDHC */
	imx31_add_mxc_mmc(0, &sdhc_pdata);

	/* Register FB */
	imx31_add_ipu_core();
	imx31_add_mx3_sdc_fb(&mx3fb_pdata);

	/* Register NOR Flash */
	platform_device_register_resndata(NULL, "physmap-flash", -1,
			&armadillo5x0_nor_flash_resource, 1,
			&armadillo5x0_nor_flash_pdata,
			sizeof(armadillo5x0_nor_flash_pdata));

	/* Register NAND Flash */
	imx31_add_mxc_nand(&armadillo5x0_nand_board_info);

	/* set NAND page size to 2k if not configured via boot mode pins */
	imx_writel(imx_readl(mx3_ccm_base + MXC_CCM_RCSR) | (1 << 30),
		   mx3_ccm_base + MXC_CCM_RCSR);

	/* RTC */
	/* Get RTC IRQ and register the chip */
	if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
		if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
			armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
		else
			gpio_free(ARMADILLO5X0_RTC_GPIO);
	}
	if (armadillo5x0_i2c_rtc.irq == 0)
		pr_warn("armadillo5x0_init: failed to get RTC IRQ\n");
	i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);

	/* USB */

	usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
			ULPI_OTG_DRVVBUS_EXT);
	if (usbotg_pdata.otg)
		imx31_add_mxc_ehci_otg(&usbotg_pdata);
	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
			ULPI_OTG_DRVVBUS_EXT);
	if (usbh2_pdata.otg)
		imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
}

static void __init armadillo5x0_timer_init(void)
{
	mx31_clocks_init(26000000);
}

MACHINE_START(ARMADILLO5X0, "Armadillo-500")
	/* Maintainer: Alberto Panizzo  */
	.atag_offset = 0x100,
	.map_io = mx31_map_io,
	.init_early = imx31_init_early,
	.init_irq = mx31_init_irq,
	.init_time	= armadillo5x0_timer_init,
	.init_machine = armadillo5x0_init,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
5e9145ed AP	1	/*
	2	* armadillo5x0.c
	3	*
	4	* Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
	5	* updates in http://alberdroid.blogspot.com/
	6	*
	7	* Based on Atmark Techno, Inc. armadillo 500 BSP 2008
	8	* Based on mx31ads.c and pcm037.c Great Work!
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; either version 2 of the License, or
	13	* (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	23	* MA 02110-1301, USA.
	24	*/
	25
	26	#include <linux/types.h>
	27	#include <linux/init.h>
	28	#include <linux/clk.h>
	29	#include <linux/platform_device.h>
	30	#include <linux/gpio.h>
	31	#include <linux/smsc911x.h>
	32	#include <linux/interrupt.h>
	33	#include <linux/irq.h>
c3a9c7f5	34	#include <linux/mtd/physmap.h>
0c8bad6a	35	#include <linux/io.h>
e33c049c	36	#include <linux/input.h>
2097abcb	37	#include <linux/i2c.h>
b3aa111f AP	38	#include <linux/usb/otg.h>
	39	#include <linux/usb/ulpi.h>
	40	#include <linux/delay.h>
7a4302a6 FE	41	#include <linux/regulator/machine.h>
7a4302a6 FE	42	#include <linux/regulator/fixed.h>
5e9145ed	43
5e9145ed AP	44	#include <asm/mach-types.h>
	45	#include <asm/mach/arch.h>
	46	#include <asm/mach/time.h>
	47	#include <asm/memory.h>
	48	#include <asm/mach/map.h>
	49
e3372474	50	#include "common.h"
a2ceeef5	51	#include "devices-imx31.h"
29781fa6	52	#include "crmregs-imx3.h"
641dfe8b	53	#include "ehci.h"
50f2de61	54	#include "hardware.h"
267dd34c	55	#include "iomux-mx3.h"
39ef6340	56	#include "ulpi.h"
5e9145ed AP	57
	58	static int armadillo5x0_pins[] = {
	59	/* UART1 */
	60	MX31_PIN_CTS1__CTS1,
	61	MX31_PIN_RTS1__RTS1,
	62	MX31_PIN_TXD1__TXD1,
	63	MX31_PIN_RXD1__RXD1,
	64	/* UART2 */
	65	MX31_PIN_CTS2__CTS2,
	66	MX31_PIN_RTS2__RTS2,
	67	MX31_PIN_TXD2__TXD2,
	68	MX31_PIN_RXD2__RXD2,
	69	/* LAN9118_IRQ */
	70	IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
	71	/* SDHC1 */
	72	MX31_PIN_SD1_DATA3__SD1_DATA3,
	73	MX31_PIN_SD1_DATA2__SD1_DATA2,
	74	MX31_PIN_SD1_DATA1__SD1_DATA1,
	75	MX31_PIN_SD1_DATA0__SD1_DATA0,
	76	MX31_PIN_SD1_CLK__SD1_CLK,
	77	MX31_PIN_SD1_CMD__SD1_CMD,
	78	/* Framebuffer */
	79	MX31_PIN_LD0__LD0,
	80	MX31_PIN_LD1__LD1,
	81	MX31_PIN_LD2__LD2,
	82	MX31_PIN_LD3__LD3,
	83	MX31_PIN_LD4__LD4,
	84	MX31_PIN_LD5__LD5,
	85	MX31_PIN_LD6__LD6,
	86	MX31_PIN_LD7__LD7,
	87	MX31_PIN_LD8__LD8,
	88	MX31_PIN_LD9__LD9,
	89	MX31_PIN_LD10__LD10,
	90	MX31_PIN_LD11__LD11,
	91	MX31_PIN_LD12__LD12,
	92	MX31_PIN_LD13__LD13,
	93	MX31_PIN_LD14__LD14,
	94	MX31_PIN_LD15__LD15,
	95	MX31_PIN_LD16__LD16,
	96	MX31_PIN_LD17__LD17,
	97	MX31_PIN_VSYNC3__VSYNC3,
	98	MX31_PIN_HSYNC__HSYNC,
	99	MX31_PIN_FPSHIFT__FPSHIFT,
	100	MX31_PIN_DRDY0__DRDY0,
	101	IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /ADV7125_PSAVE/
e9a6c5d0 AP	102	/* I2C2 */
	103	MX31_PIN_CSPI2_MOSI__SCL,
	104	MX31_PIN_CSPI2_MISO__SDA,
b3aa111f AP	105	/* OTG */
	106	MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
	107	MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
	108	MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
	109	MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
	110	MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
	111	MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
	112	MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
	113	MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
	114	MX31_PIN_USBOTG_CLK__USBOTG_CLK,
	115	MX31_PIN_USBOTG_DIR__USBOTG_DIR,
	116	MX31_PIN_USBOTG_NXT__USBOTG_NXT,
	117	MX31_PIN_USBOTG_STP__USBOTG_STP,
	118	/* USB host 2 */
	119	IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
	120	IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
	121	IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
	122	IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
	123	IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
	124	IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
	125	IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
	126	IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
	127	IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
	128	IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
	129	IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
	130	IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
0c8bad6a	131	};
e9a6c5d0	132
b3aa111f	133	/* USB */
b3aa111f AP	134
	135	#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
	136	#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
	137	#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
	138
	139	#define USB_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	140	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	141
	142	static int usbotg_init(struct platform_device *pdev)
	143	{
	144	int err;
	145
	146	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
	147	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
	148	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
	149	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
	150	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
	151	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
	152	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
	153	mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
	154	mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
	155	mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
	156	mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
	157	mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
	158
	159	/* Chip already enabled by hardware */
	160	/* OTG phy reset*/
	161	err = gpio_request(OTG_RESET, "USB-OTG-RESET");
	162	if (err) {
	163	pr_err("Failed to request the usb otg reset gpio\n");
	164	return err;
	165	}
	166
	167	err = gpio_direction_output(OTG_RESET, 1/HIGH/);
	168	if (err) {
	169	pr_err("Failed to reset the usb otg phy\n");
	170	goto otg_free_reset;
	171	}
	172
	173	gpio_set_value(OTG_RESET, 0/LOW/);
	174	mdelay(5);
	175	gpio_set_value(OTG_RESET, 1/HIGH/);
4bd597b6	176	mdelay(10);
b3aa111f	177
4bd597b6 SH	178	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED \|
4bd597b6 SH	179	MXC_EHCI_INTERFACE_DIFF_UNI);
b3aa111f AP	180
	181	otg_free_reset:
	182	gpio_free(OTG_RESET);
	183	return err;
	184	}
	185
	186	static int usbh2_init(struct platform_device *pdev)
	187	{
	188	int err;
	189
	190	mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
	191	mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
	192	mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
	193	mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
	194	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
	195	mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
	196	mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
	197	mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
	198	mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
	199	mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
	200	mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
	201	mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
	202
	203	mxc_iomux_set_gpr(MUX_PGP_UH2, true);
	204
	205
	206	/* Enable the chip */
	207	err = gpio_request(USBH2_CS, "USB-H2-CS");
	208	if (err) {
	209	pr_err("Failed to request the usb host 2 CS gpio\n");
	210	return err;
	211	}
	212
	213	err = gpio_direction_output(USBH2_CS, 0/Enabled/);
	214	if (err) {
	215	pr_err("Failed to drive the usb host 2 CS gpio\n");
	216	goto h2_free_cs;
	217	}
	218
	219	/* H2 phy reset*/
	220	err = gpio_request(USBH2_RESET, "USB-H2-RESET");
	221	if (err) {
	222	pr_err("Failed to request the usb host 2 reset gpio\n");
	223	goto h2_free_cs;
	224	}
	225
	226	err = gpio_direction_output(USBH2_RESET, 1/HIGH/);
	227	if (err) {
	228	pr_err("Failed to reset the usb host 2 phy\n");
	229	goto h2_free_reset;
	230	}
	231
	232	gpio_set_value(USBH2_RESET, 0/LOW/);
	233	mdelay(5);
	234	gpio_set_value(USBH2_RESET, 1/HIGH/);
4bd597b6	235	mdelay(10);
b3aa111f	236
4bd597b6 SH	237	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED \|
4bd597b6 SH	238	MXC_EHCI_INTERFACE_DIFF_UNI);
b3aa111f AP	239
	240	h2_free_reset:
	241	gpio_free(USBH2_RESET);
	242	h2_free_cs:
	243	gpio_free(USBH2_CS);
	244	return err;
	245	}
	246
2d58de28	247	static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
b3aa111f AP	248	.init = usbotg_init,
b3aa111f AP	249	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
b3aa111f AP	250	};
b3aa111f AP	251
2d58de28	252	static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
b3aa111f AP	253	.init = usbh2_init,
b3aa111f AP	254	.portsc = MXC_EHCI_MODE_ULPI \| MXC_EHCI_UTMI_8BIT,
b3aa111f	255	};
b3aa111f	256
2097abcb AP	257	/* RTC over I2C*/
	258	#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
	259
	260	static struct i2c_board_info armadillo5x0_i2c_rtc = {
	261	I2C_BOARD_INFO("s35390a", 0x30),
	262	};
	263
e33c049c AP	264	/* GPIO BUTTONS */
	265	static struct gpio_keys_button armadillo5x0_buttons[] = {
	266	{
	267	.code = KEY_ENTER, /28/
	268	.gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
	269	.active_low = 1,
	270	.desc = "menu",
	271	.wakeup = 1,
	272	}, {
	273	.code = KEY_BACK, /158/
	274	.gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
	275	.active_low = 1,
	276	.desc = "back",
	277	.wakeup = 1,
	278	}
	279	};
	280
5309498a UKK	281	static const struct gpio_keys_platform_data
5309498a UKK	282	armadillo5x0_button_data __initconst = {
e33c049c AP	283	.buttons = armadillo5x0_buttons,
	284	.nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
	285	};
	286
0c8bad6a AP	287	/*
	288	* NAND Flash
	289	*/
a2ceeef5 UKK	290	static const struct mxc_nand_platform_data
a2ceeef5 UKK	291	armadillo5x0_nand_board_info __initconst = {
0c8bad6a AP	292	.width = 1,
0c8bad6a AP	293	.hw_ecc = 1,
5e9145ed AP	294	};
5e9145ed AP	295
c3a9c7f5 AP	296	/*
	297	* MTD NOR Flash
	298	*/
	299	static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
	300	{
	301	.name = "nor.bootloader",
	302	.offset = 0x00000000,
	303	.size = 4321024,
	304	}, {
	305	.name = "nor.kernel",
	306	.offset = MTDPART_OFS_APPEND,
	307	.size = 161281024,
	308	}, {
	309	.name = "nor.userland",
	310	.offset = MTDPART_OFS_APPEND,
	311	.size = 1101281024,
	312	}, {
	313	.name = "nor.config",
	314	.offset = MTDPART_OFS_APPEND,
	315	.size = 11281024,
	316	},
	317	};
	318
47ccfc34 UKK	319	static const struct physmap_flash_data
47ccfc34 UKK	320	armadillo5x0_nor_flash_pdata __initconst = {
c3a9c7f5 AP	321	.width = 2,
	322	.parts = armadillo5x0_nor_flash_partitions,
	323	.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
	324	};
	325
47ccfc34	326	static const struct resource armadillo5x0_nor_flash_resource __initconst = {
c3a9c7f5	327	.flags = IORESOURCE_MEM,
f568dd7f UKK	328	.start = MX31_CS0_BASE_ADDR,
f568dd7f UKK	329	.end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
c3a9c7f5 AP	330	};
c3a9c7f5 AP	331
5e9145ed AP	332	/*
	333	* FB support
	334	*/
	335	static const struct fb_videomode fb_modedb[] = {
	336	{ /* 640x480 @ 60 Hz */
	337	.name = "CRT-VGA",
	338	.refresh = 60,
	339	.xres = 640,
	340	.yres = 480,
	341	.pixclock = 39721,
	342	.left_margin = 35,
	343	.right_margin = 115,
	344	.upper_margin = 43,
	345	.lower_margin = 1,
	346	.hsync_len = 10,
	347	.vsync_len = 1,
	348	.sync = FB_SYNC_OE_ACT_HIGH,
	349	.vmode = FB_VMODE_NONINTERLACED,
	350	.flag = 0,
	351	}, {/* 800x600 @ 56 Hz */
	352	.name = "CRT-SVGA",
	353	.refresh = 56,
	354	.xres = 800,
	355	.yres = 600,
	356	.pixclock = 30000,
	357	.left_margin = 30,
	358	.right_margin = 108,
	359	.upper_margin = 13,
	360	.lower_margin = 10,
	361	.hsync_len = 10,
	362	.vsync_len = 1,
	363	.sync = FB_SYNC_OE_ACT_HIGH \| FB_SYNC_HOR_HIGH_ACT \|
	364	FB_SYNC_VERT_HIGH_ACT,
	365	.vmode = FB_VMODE_NONINTERLACED,
	366	.flag = 0,
	367	},
	368	};
	369
afa77ef3	370	static struct mx3fb_platform_data mx3fb_pdata __initdata = {
5e9145ed AP	371	.name = "CRT-VGA",
	372	.mode = fb_modedb,
	373	.num_modes = ARRAY_SIZE(fb_modedb),
	374	};
	375
	376	/*
	377	* SDHC 1
	378	* MMC support
	379	*/
	380	static int armadillo5x0_sdhc1_get_ro(struct device *dev)
	381	{
	382	return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
	383	}
	384
	385	static int armadillo5x0_sdhc1_init(struct device *dev,
	386	irq_handler_t detect_irq, void *data)
	387	{
	388	int ret;
	389	int gpio_det, gpio_wp;
	390
	391	gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
	392	gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
	393
	394	ret = gpio_request(gpio_det, "sdhc-card-detect");
	395	if (ret)
	396	return ret;
	397
	398	gpio_direction_input(gpio_det);
	399
	400	ret = gpio_request(gpio_wp, "sdhc-write-protect");
	401	if (ret)
	402	goto err_gpio_free;
	403
	404	gpio_direction_input(gpio_wp);
	405
	406	/* When supported the trigger type have to be BOTH */
ed175343	407	ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)),
4c1dd3e5	408	detect_irq, IRQF_TRIGGER_FALLING,
5e9145ed AP	409	"sdhc-detect", data);
	410
	411	if (ret)
	412	goto err_gpio_free_2;
	413
	414	return 0;
	415
	416	err_gpio_free_2:
	417	gpio_free(gpio_wp);
	418
	419	err_gpio_free:
	420	gpio_free(gpio_det);
	421
	422	return ret;
	423
	424	}
	425
	426	static void armadillo5x0_sdhc1_exit(struct device dev, void data)
	427	{
ed175343	428	free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)), data);
5e9145ed AP	429	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
	430	gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
	431	}
	432
6a697e3d	433	static const struct imxmmc_platform_data sdhc_pdata __initconst = {
5e9145ed AP	434	.get_ro = armadillo5x0_sdhc1_get_ro,
	435	.init = armadillo5x0_sdhc1_init,
	436	.exit = armadillo5x0_sdhc1_exit,
	437	};
	438
	439	/*
	440	* SMSC 9118
	441	* Network support
	442	*/
	443	static struct resource armadillo5x0_smc911x_resources[] = {
	444	{
f568dd7f UKK	445	.start = MX31_CS3_BASE_ADDR,
f568dd7f UKK	446	.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
5e9145ed AP	447	.flags = IORESOURCE_MEM,
5e9145ed AP	448	}, {
ed175343	449	/* irq number is run-time assigned */
5e9145ed AP	450	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_LOWLEVEL,
	451	},
	452	};
	453
	454	static struct smsc911x_platform_config smsc911x_info = {
07299ca3	455	.flags = SMSC911X_USE_16BIT,
5e9145ed AP	456	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	457	.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
	458	};
	459
	460	static struct platform_device armadillo5x0_smc911x_device = {
	461	.name = "smsc911x",
	462	.id = -1,
	463	.num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
	464	.resource = armadillo5x0_smc911x_resources,
	465	.dev = {
	466	.platform_data = &smsc911x_info,
	467	},
	468	};
	469
	470	/* UART device data */
16cf5c41	471	static const struct imxuart_platform_data uart_pdata __initconst = {
5e9145ed AP	472	.flags = IMXUART_HAVE_RTSCTS,
	473	};
	474
	475	static struct platform_device *devices[] __initdata = {
	476	&armadillo5x0_smc911x_device,
	477	};
	478
7a4302a6 FE	479	static struct regulator_consumer_supply dummy_supplies[] = {
	480	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
	481	REGULATOR_SUPPLY("vddvario", "smsc911x"),
	482	};
	483
5e9145ed AP	484	/*
	485	* Perform board specific initializations
	486	*/
	487	static void __init armadillo5x0_init(void)
	488	{
b78d8e59 SG	489	imx31_soc_init();
b78d8e59 SG	490
5e9145ed AP	491	mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
	492	ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
	493
7a4302a6 FE	494	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
7a4302a6 FE	495
ed175343 SG	496	armadillo5x0_smc911x_resources[1].start =
	497	gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
	498	armadillo5x0_smc911x_resources[1].end =
	499	gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
5e9145ed	500	platform_add_devices(devices, ARRAY_SIZE(devices));
5309498a	501	imx_add_gpio_keys(&armadillo5x0_button_data);
4a9b8b0b	502	imx31_add_imx_i2c1(NULL);
5e9145ed AP	503
5e9145ed AP	504	/* Register UART */
16cf5c41 UKK	505	imx31_add_imx_uart0(&uart_pdata);
16cf5c41 UKK	506	imx31_add_imx_uart1(&uart_pdata);
5e9145ed AP	507
	508	/* SMSC9118 IRQ pin */
	509	gpio_direction_input(MX31_PIN_GPIO1_0);
	510
	511	/* Register SDHC */
6a697e3d	512	imx31_add_mxc_mmc(0, &sdhc_pdata);
5e9145ed AP	513
5e9145ed AP	514	/* Register FB */
88289c80	515	imx31_add_ipu_core();
afa77ef3	516	imx31_add_mx3_sdc_fb(&mx3fb_pdata);
c3a9c7f5 AP	517
c3a9c7f5 AP	518	/* Register NOR Flash */
47ccfc34 UKK	519	platform_device_register_resndata(NULL, "physmap-flash", -1,
	520	&armadillo5x0_nor_flash_resource, 1,
	521	&armadillo5x0_nor_flash_pdata,
	522	sizeof(armadillo5x0_nor_flash_pdata));
0c8bad6a AP	523
0c8bad6a AP	524	/* Register NAND Flash */
a2ceeef5	525	imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
0c8bad6a AP	526
0c8bad6a AP	527	/* set NAND page size to 2k if not configured via boot mode pins */
c553138f JB	528	imx_writel(imx_readl(mx3_ccm_base + MXC_CCM_RCSR) \| (1 << 30),
c553138f JB	529	mx3_ccm_base + MXC_CCM_RCSR);
2097abcb AP	530
	531	/* RTC */
	532	/* Get RTC IRQ and register the chip */
	533	if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) {
	534	if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0)
	535	armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
	536	else
	537	gpio_free(ARMADILLO5X0_RTC_GPIO);
	538	}
	539	if (armadillo5x0_i2c_rtc.irq == 0)
75fd32b8	540	pr_warn("armadillo5x0_init: failed to get RTC IRQ\n");
2097abcb	541	i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
b3aa111f AP	542
b3aa111f AP	543	/* USB */
48f6b099 SH	544
	545	usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	546	ULPI_OTG_DRVVBUS_EXT);
	547	if (usbotg_pdata.otg)
	548	imx31_add_mxc_ehci_otg(&usbotg_pdata);
	549	usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS \|
	550	ULPI_OTG_DRVVBUS_EXT);
	551	if (usbh2_pdata.otg)
	552	imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
5e9145ed AP	553	}
5e9145ed AP	554
5e9145ed AP	555	static void __init armadillo5x0_timer_init(void)
	556	{
	557	mx31_clocks_init(26000000);
	558	}
	559
5e9145ed AP	560	MACHINE_START(ARMADILLO5X0, "Armadillo-500")
5e9145ed AP	561	/* Maintainer: Alberto Panizzo */
dc8f1907	562	.atag_offset = 0x100,
97976e22 UKK	563	.map_io = mx31_map_io,
	564	.init_early = imx31_init_early,
	565	.init_irq = mx31_init_irq,
6bb27d73	566	.init_time = armadillo5x0_timer_init,
97976e22	567	.init_machine = armadillo5x0_init,
65ea7884	568	.restart = mxc_restart,
5e9145ed	569	MACHINE_END