Merge branch 'for-4.5/lightnvm' of git://git.kernel.dk/linux-block
[linux-2.6-block.git] / arch / arm / mach-imx / iomux-v1.c
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aa10abd3 1/*
5e2e95f5 2 * arch/arm/plat-mxc/iomux-v1.c
aa10abd3 3 *
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4 * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
5 * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
aa10abd3 6 *
5e2e95f5 7 * Common code for i.MX1, i.MX21 and i.MX27
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8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
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20 * along with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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22 */
23
24#include <linux/errno.h>
25#include <linux/init.h>
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/string.h>
29#include <linux/gpio.h>
30
aa10abd3 31#include <asm/mach/map.h>
267dd34c 32
50f2de61 33#include "hardware.h"
267dd34c 34#include "iomux-v1.h"
aa10abd3 35
f021b5a1 36static void __iomem *imx_iomuxv1_baseaddr;
bac3fcfa 37static unsigned imx_iomuxv1_numports;
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38
39static inline unsigned long imx_iomuxv1_readl(unsigned offset)
40{
41 return __raw_readl(imx_iomuxv1_baseaddr + offset);
42}
43
44static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
45{
46 __raw_writel(val, imx_iomuxv1_baseaddr + offset);
47}
48
49static inline void imx_iomuxv1_rmwl(unsigned offset,
50 unsigned long mask, unsigned long value)
51{
52 unsigned long reg = imx_iomuxv1_readl(offset);
53
54 reg &= ~mask;
55 reg |= value;
56
57 imx_iomuxv1_writel(reg, offset);
58}
59
60static inline void imx_iomuxv1_set_puen(
61 unsigned int port, unsigned int pin, int on)
62{
63 unsigned long mask = 1 << pin;
64
65 imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
66}
67
68static inline void imx_iomuxv1_set_ddir(
69 unsigned int port, unsigned int pin, int out)
70{
71 unsigned long mask = 1 << pin;
72
73 imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
74}
75
76static inline void imx_iomuxv1_set_gpr(
77 unsigned int port, unsigned int pin, int af)
78{
79 unsigned long mask = 1 << pin;
80
81 imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
82}
83
84static inline void imx_iomuxv1_set_gius(
85 unsigned int port, unsigned int pin, int inuse)
86{
87 unsigned long mask = 1 << pin;
88
89 imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
90}
91
92static inline void imx_iomuxv1_set_ocr(
93 unsigned int port, unsigned int pin, unsigned int ocr)
94{
95 unsigned long shift = (pin & 0xf) << 1;
96 unsigned long mask = 3 << shift;
97 unsigned long value = ocr << shift;
98 unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
99
100 imx_iomuxv1_rmwl(offset, mask, value);
101}
102
103static inline void imx_iomuxv1_set_iconfa(
104 unsigned int port, unsigned int pin, unsigned int aout)
105{
106 unsigned long shift = (pin & 0xf) << 1;
107 unsigned long mask = 3 << shift;
108 unsigned long value = aout << shift;
109 unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
110
111 imx_iomuxv1_rmwl(offset, mask, value);
112}
113
114static inline void imx_iomuxv1_set_iconfb(
115 unsigned int port, unsigned int pin, unsigned int bout)
116{
117 unsigned long shift = (pin & 0xf) << 1;
118 unsigned long mask = 3 << shift;
119 unsigned long value = bout << shift;
120 unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
121
122 imx_iomuxv1_rmwl(offset, mask, value);
123}
124
bac3fcfa 125int mxc_gpio_mode(int gpio_mode)
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126{
127 unsigned int pin = gpio_mode & GPIO_PIN_MASK;
128 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
129 unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
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130 unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
131 unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
aa10abd3 132
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133 if (port >= imx_iomuxv1_numports)
134 return -EINVAL;
135
aa10abd3 136 /* Pullup enable */
f021b5a1 137 imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
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138
139 /* Data direction */
f021b5a1 140 imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
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141
142 /* Primary / alternate function */
f021b5a1 143 imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
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144
145 /* use as gpio? */
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146 imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
147
148 imx_iomuxv1_set_ocr(port, pin, ocr);
149
150 imx_iomuxv1_set_iconfa(port, pin, aout);
151
152 imx_iomuxv1_set_iconfb(port, pin, bout);
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153
154 return 0;
aa10abd3 155}
aa10abd3 156
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157static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
158{
159 size_t i;
6cecabb3 160 int ret = 0;
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161
162 for (i = 0; i < count; ++i) {
163 ret = mxc_gpio_mode(list[i]);
164
165 if (ret)
166 return ret;
167 }
168
169 return ret;
170}
171
aa10abd3 172int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
7bd18221 173 const char *label)
aa10abd3 174{
bac3fcfa 175 int ret;
aa10abd3 176
bac3fcfa 177 ret = imx_iomuxv1_setup_multiple(pin_list, count);
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178 return ret;
179}
aa10abd3 180
ff255feb 181int __init imx_iomuxv1_init(void __iomem *base, int numports)
f021b5a1 182{
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183 imx_iomuxv1_baseaddr = base;
184 imx_iomuxv1_numports = numports;
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185
186 return 0;
187}