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6d45a402 AH |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | |
3 | * Copyright (C) 2016 Freescale Semiconductor, Inc. | |
4 | * Copyright 2017-2018 NXP | |
5 | * Anson Huang <Anson.Huang@nxp.com> | |
6 | */ | |
7 | ||
8 | #include <linux/cpuidle.h> | |
9 | #include <linux/module.h> | |
10 | #include <asm/cpuidle.h> | |
11 | ||
12 | #include "common.h" | |
13 | #include "cpuidle.h" | |
14 | ||
15 | static int imx7ulp_enter_wait(struct cpuidle_device *dev, | |
16 | struct cpuidle_driver *drv, int index) | |
17 | { | |
18 | if (index == 1) | |
19 | imx7ulp_set_lpm(ULP_PM_WAIT); | |
20 | else | |
21 | imx7ulp_set_lpm(ULP_PM_STOP); | |
22 | ||
23 | cpu_do_idle(); | |
24 | ||
25 | imx7ulp_set_lpm(ULP_PM_RUN); | |
26 | ||
27 | return index; | |
28 | } | |
29 | ||
30 | static struct cpuidle_driver imx7ulp_cpuidle_driver = { | |
31 | .name = "imx7ulp_cpuidle", | |
32 | .owner = THIS_MODULE, | |
33 | .states = { | |
34 | /* WFI */ | |
35 | ARM_CPUIDLE_WFI_STATE, | |
36 | /* WAIT */ | |
37 | { | |
38 | .exit_latency = 50, | |
39 | .target_residency = 75, | |
40 | .enter = imx7ulp_enter_wait, | |
41 | .name = "WAIT", | |
42 | .desc = "PSTOP2", | |
43 | }, | |
44 | /* STOP */ | |
45 | { | |
46 | .exit_latency = 100, | |
47 | .target_residency = 150, | |
48 | .enter = imx7ulp_enter_wait, | |
49 | .name = "STOP", | |
50 | .desc = "PSTOP1", | |
51 | }, | |
52 | }, | |
53 | .state_count = 3, | |
54 | .safe_state_index = 0, | |
55 | }; | |
56 | ||
57 | int __init imx7ulp_cpuidle_init(void) | |
58 | { | |
59 | return cpuidle_register(&imx7ulp_cpuidle_driver, NULL); | |
60 | } |