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ARM: EXYNOS: allow dt based discovery of mct controller using clocksource_of_init
[linux-2.6-block.git] / arch / arm / mach-exynos / mach-origen.c
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699efdd2
JK		 1/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
29e7d587 12#include <linux/leds.h>
699efdd2
JK		 13#include <linux/gpio.h>
14#include <linux/mmc/host.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/input.h>
4d8cc596 18#include <linux/pwm.h>
9edff0f7 19#include <linux/pwm_backlight.h>
c86cfdd0 20#include <linux/gpio_keys.h>
6e01280f
IS		 21#include <linux/i2c.h>
22#include <linux/regulator/machine.h>
23#include <linux/mfd/max8997.h>
9421a76d 24#include <linux/lcd.h>
62d30f86 25#include <linux/rfkill-gpio.h>
f034d85e 26#include <linux/platform_data/i2c-s3c2410.h>
9c278d52 27#include <linux/platform_data/s3c-hsotg.h>
f034d85e
JH		 28#include <linux/platform_data/usb-ehci-s5p.h>
29#include <linux/platform_data/usb-exynos.h>
699efdd2
JK		 30
31#include <asm/mach/arch.h>
32#include <asm/mach-types.h>
33
9421a76d 34#include <video/platform_lcd.h>
5a213a55 35#include <video/samsung_fimd.h>
9421a76d 36
699efdd2 37#include <plat/regs-serial.h>
699efdd2
JK		 38#include <plat/cpu.h>
39#include <plat/devs.h>
40#include <plat/sdhci.h>
24f9e1f3 41#include <plat/clock.h>
9edff0f7
GM		 42#include <plat/gpio-cfg.h>
43#include <plat/backlight.h>
9421a76d 44#include <plat/fb.h>
df74a28c 45#include <plat/mfc.h>
ccc61fd4 46#include <plat/hdmi.h>
699efdd2
JK		 47
48#include <mach/map.h>
49
84e6aef0 50#include <drm/exynos_drm.h>
cc511b8d
KK		 51#include "common.h"
52
699efdd2
JK		 53/* Following are default values for UCON, ULCON and UFCON UART registers */
54#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
55 S3C2410_UCON_RXILEVEL | \
56 S3C2410_UCON_TXIRQMODE | \
57 S3C2410_UCON_RXIRQMODE | \
58 S3C2410_UCON_RXFIFO_TOI | \
59 S3C2443_UCON_RXERR_IRQEN)
60
61#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
62
63#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
64 S5PV210_UFCON_TXTRIG4 | \
65 S5PV210_UFCON_RXTRIG4)
66
67static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
68 [0] = {
69 .hwport = 0,
70 .flags = 0,
71 .ucon = ORIGEN_UCON_DEFAULT,
72 .ulcon = ORIGEN_ULCON_DEFAULT,
73 .ufcon = ORIGEN_UFCON_DEFAULT,
74 },
75 [1] = {
76 .hwport = 1,
77 .flags = 0,
78 .ucon = ORIGEN_UCON_DEFAULT,
79 .ulcon = ORIGEN_ULCON_DEFAULT,
80 .ufcon = ORIGEN_UFCON_DEFAULT,
81 },
82 [2] = {
83 .hwport = 2,
84 .flags = 0,
85 .ucon = ORIGEN_UCON_DEFAULT,
86 .ulcon = ORIGEN_ULCON_DEFAULT,
87 .ufcon = ORIGEN_UFCON_DEFAULT,
88 },
89 [3] = {
90 .hwport = 3,
91 .flags = 0,
92 .ucon = ORIGEN_UCON_DEFAULT,
93 .ulcon = ORIGEN_ULCON_DEFAULT,
94 .ufcon = ORIGEN_UFCON_DEFAULT,
95 },
96};
97
6e01280f 98static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
c421a1e4 99 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
5dfb1aa5
SK		 100 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
101 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
75e56c98 102 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* OTG */
6e01280f
IS		 103};
104static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
c421a1e4 105 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
6e01280f
IS		 106};
107static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
108 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
109};
110static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
111 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
5dfb1aa5 112 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
75e56c98 113 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* OTG */
6e01280f
IS		 114};
115static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
116 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
117};
118static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
119 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
120};
121static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
122 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
123};
124static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
125 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
126};
127static struct regulator_consumer_supply __initdata buck1_consumer[] = {
128 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
129};
130static struct regulator_consumer_supply __initdata buck2_consumer[] = {
131 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
132};
133static struct regulator_consumer_supply __initdata buck3_consumer[] = {
134 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
135};
136static struct regulator_consumer_supply __initdata buck7_consumer[] = {
137 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
138};
139
140static struct regulator_init_data __initdata max8997_ldo1_data = {
141 .constraints = {
142 .name = "VDD_ABB_3.3V",
143 .min_uV = 3300000,
144 .max_uV = 3300000,
145 .apply_uV = 1,
146 .state_mem = {
147 .disabled = 1,
148 },
149 },
150};
151
152static struct regulator_init_data __initdata max8997_ldo2_data = {
153 .constraints = {
154 .name = "VDD_ALIVE_1.1V",
155 .min_uV = 1100000,
156 .max_uV = 1100000,
157 .apply_uV = 1,
158 .always_on = 1,
159 .state_mem = {
160 .enabled = 1,
161 },
162 },
163};
164
165static struct regulator_init_data __initdata max8997_ldo3_data = {
166 .constraints = {
167 .name = "VMIPI_1.1V",
168 .min_uV = 1100000,
169 .max_uV = 1100000,
170 .apply_uV = 1,
171 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
172 .state_mem = {
173 .disabled = 1,
174 },
175 },
176 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
177 .consumer_supplies = ldo3_consumer,
178};
179
180static struct regulator_init_data __initdata max8997_ldo4_data = {
181 .constraints = {
182 .name = "VDD_RTC_1.8V",
183 .min_uV = 1800000,
184 .max_uV = 1800000,
185 .apply_uV = 1,
186 .always_on = 1,
187 .state_mem = {
188 .disabled = 1,
189 },
190 },
191};
192
193static struct regulator_init_data __initdata max8997_ldo6_data = {
194 .constraints = {
195 .name = "VMIPI_1.8V",
196 .min_uV = 1800000,
197 .max_uV = 1800000,
198 .apply_uV = 1,
199 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
200 .state_mem = {
201 .disabled = 1,
202 },
203 },
204 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
205 .consumer_supplies = ldo6_consumer,
206};
207
208static struct regulator_init_data __initdata max8997_ldo7_data = {
209 .constraints = {
210 .name = "VDD_AUD_1.8V",
211 .min_uV = 1800000,
212 .max_uV = 1800000,
213 .apply_uV = 1,
214 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
215 .state_mem = {
216 .disabled = 1,
217 },
218 },
219 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
220 .consumer_supplies = ldo7_consumer,
221};
222
223static struct regulator_init_data __initdata max8997_ldo8_data = {
224 .constraints = {
225 .name = "VADC_3.3V",
226 .min_uV = 3300000,
227 .max_uV = 3300000,
228 .apply_uV = 1,
229 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
230 .state_mem = {
231 .disabled = 1,
232 },
233 },
234 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
235 .consumer_supplies = ldo8_consumer,
236};
237
238static struct regulator_init_data __initdata max8997_ldo9_data = {
239 .constraints = {
240 .name = "DVDD_SWB_2.8V",
241 .min_uV = 2800000,
242 .max_uV = 2800000,
243 .apply_uV = 1,
62d30f86 244 .always_on = 1,
6e01280f
IS		 245 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
246 .state_mem = {
247 .disabled = 1,
248 },
249 },
250 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
251 .consumer_supplies = ldo9_consumer,
252};
253
254static struct regulator_init_data __initdata max8997_ldo10_data = {
255 .constraints = {
256 .name = "VDD_PLL_1.1V",
257 .min_uV = 1100000,
258 .max_uV = 1100000,
259 .apply_uV = 1,
260 .always_on = 1,
261 .state_mem = {
262 .disabled = 1,
263 },
264 },
265};
266
267static struct regulator_init_data __initdata max8997_ldo11_data = {
268 .constraints = {
269 .name = "VDD_AUD_3V",
270 .min_uV = 3000000,
271 .max_uV = 3000000,
272 .apply_uV = 1,
273 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
274 .state_mem = {
275 .disabled = 1,
276 },
277 },
278 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
279 .consumer_supplies = ldo11_consumer,
280};
281
282static struct regulator_init_data __initdata max8997_ldo14_data = {
283 .constraints = {
284 .name = "AVDD18_SWB_1.8V",
285 .min_uV = 1800000,
286 .max_uV = 1800000,
287 .apply_uV = 1,
62d30f86 288 .always_on = 1,
6e01280f
IS		 289 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
290 .state_mem = {
291 .disabled = 1,
292 },
293 },
294 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
295 .consumer_supplies = ldo14_consumer,
296};
297
298static struct regulator_init_data __initdata max8997_ldo17_data = {
299 .constraints = {
300 .name = "VDD_SWB_3.3V",
301 .min_uV = 3300000,
302 .max_uV = 3300000,
303 .apply_uV = 1,
62d30f86 304 .always_on = 1,
6e01280f
IS		 305 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
306 .state_mem = {
307 .disabled = 1,
308 },
309 },
310 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
311 .consumer_supplies = ldo17_consumer,
312};
313
314static struct regulator_init_data __initdata max8997_ldo21_data = {
315 .constraints = {
316 .name = "VDD_MIF_1.2V",
317 .min_uV = 1200000,
318 .max_uV = 1200000,
319 .apply_uV = 1,
320 .always_on = 1,
321 .state_mem = {
322 .disabled = 1,
323 },
324 },
325};
326
327static struct regulator_init_data __initdata max8997_buck1_data = {
328 .constraints = {
329 .name = "VDD_ARM_1.2V",
330 .min_uV = 950000,
331 .max_uV = 1350000,
332 .always_on = 1,
333 .boot_on = 1,
334 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
335 .state_mem = {
336 .disabled = 1,
337 },
338 },
339 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
340 .consumer_supplies = buck1_consumer,
341};
342
343static struct regulator_init_data __initdata max8997_buck2_data = {
344 .constraints = {
345 .name = "VDD_INT_1.1V",
346 .min_uV = 900000,
347 .max_uV = 1100000,
348 .always_on = 1,
349 .boot_on = 1,
350 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
351 .state_mem = {
352 .disabled = 1,
353 },
354 },
355 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
356 .consumer_supplies = buck2_consumer,
357};
358
359static struct regulator_init_data __initdata max8997_buck3_data = {
360 .constraints = {
361 .name = "VDD_G3D_1.1V",
362 .min_uV = 900000,
363 .max_uV = 1100000,
364 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
365 REGULATOR_CHANGE_STATUS,
366 .state_mem = {
367 .disabled = 1,
368 },
369 },
370 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
371 .consumer_supplies = buck3_consumer,
372};
373
374static struct regulator_init_data __initdata max8997_buck5_data = {
375 .constraints = {
376 .name = "VDDQ_M1M2_1.2V",
377 .min_uV = 1200000,
378 .max_uV = 1200000,
379 .apply_uV = 1,
380 .always_on = 1,
381 .state_mem = {
382 .disabled = 1,
383 },
384 },
385};
386
387static struct regulator_init_data __initdata max8997_buck7_data = {
388 .constraints = {
389 .name = "VDD_LCD_3.3V",
390 .min_uV = 3300000,
391 .max_uV = 3300000,
392 .boot_on = 1,
393 .apply_uV = 1,
394 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
395 .state_mem = {
396 .disabled = 1
397 },
398 },
399 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
400 .consumer_supplies = buck7_consumer,
401};
402
403static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
404 { MAX8997_LDO1, &max8997_ldo1_data },
405 { MAX8997_LDO2, &max8997_ldo2_data },
406 { MAX8997_LDO3, &max8997_ldo3_data },
407 { MAX8997_LDO4, &max8997_ldo4_data },
408 { MAX8997_LDO6, &max8997_ldo6_data },
409 { MAX8997_LDO7, &max8997_ldo7_data },
410 { MAX8997_LDO8, &max8997_ldo8_data },
411 { MAX8997_LDO9, &max8997_ldo9_data },
412 { MAX8997_LDO10, &max8997_ldo10_data },
413 { MAX8997_LDO11, &max8997_ldo11_data },
414 { MAX8997_LDO14, &max8997_ldo14_data },
415 { MAX8997_LDO17, &max8997_ldo17_data },
416 { MAX8997_LDO21, &max8997_ldo21_data },
417 { MAX8997_BUCK1, &max8997_buck1_data },
418 { MAX8997_BUCK2, &max8997_buck2_data },
419 { MAX8997_BUCK3, &max8997_buck3_data },
420 { MAX8997_BUCK5, &max8997_buck5_data },
421 { MAX8997_BUCK7, &max8997_buck7_data },
422};
423
e745e06f 424static struct max8997_platform_data __initdata origen_max8997_pdata = {
6e01280f
IS		 425 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
426 .regulators = origen_max8997_regulators,
427
428 .wakeup = true,
429 .buck1_gpiodvs = false,
430 .buck2_gpiodvs = false,
431 .buck5_gpiodvs = false,
6e01280f
IS		 432
433 .ignore_gpiodvs_side_effect = true,
434 .buck125_default_idx = 0x0,
435
436 .buck125_gpios[0] = EXYNOS4_GPX0(0),
437 .buck125_gpios[1] = EXYNOS4_GPX0(1),
438 .buck125_gpios[2] = EXYNOS4_GPX0(2),
439
440 .buck1_voltage[0] = 1350000,
441 .buck1_voltage[1] = 1300000,
442 .buck1_voltage[2] = 1250000,
443 .buck1_voltage[3] = 1200000,
444 .buck1_voltage[4] = 1150000,
445 .buck1_voltage[5] = 1100000,
446 .buck1_voltage[6] = 1000000,
447 .buck1_voltage[7] = 950000,
448
449 .buck2_voltage[0] = 1100000,
450 .buck2_voltage[1] = 1100000,
451 .buck2_voltage[2] = 1100000,
452 .buck2_voltage[3] = 1100000,
453 .buck2_voltage[4] = 1000000,
454 .buck2_voltage[5] = 1000000,
455 .buck2_voltage[6] = 1000000,
456 .buck2_voltage[7] = 1000000,
457
458 .buck5_voltage[0] = 1200000,
459 .buck5_voltage[1] = 1200000,
460 .buck5_voltage[2] = 1200000,
461 .buck5_voltage[3] = 1200000,
462 .buck5_voltage[4] = 1200000,
463 .buck5_voltage[5] = 1200000,
464 .buck5_voltage[6] = 1200000,
465 .buck5_voltage[7] = 1200000,
466};
467
468/* I2C0 */
469static struct i2c_board_info i2c0_devs[] __initdata = {
470 {
471 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
472 .platform_data = &origen_max8997_pdata,
473 .irq = IRQ_EINT(4),
474 },
475};
476
cf1dad9d
TB		 477static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
478 .cd_type = S3C_SDHCI_CD_INTERNAL,
cf1dad9d
TB		 479};
480
699efdd2 481static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
92e41efd 482 .cd_type = S3C_SDHCI_CD_INTERNAL,
699efdd2
JK		 483};
484
24f9e1f3
SK		 485/* USB EHCI */
486static struct s5p_ehci_platdata origen_ehci_pdata;
487
488static void __init origen_ehci_init(void)
489{
490 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
491
492 s5p_ehci_set_platdata(pdata);
493}
494
95de77d4
TB		 495/* USB OHCI */
496static struct exynos4_ohci_platdata origen_ohci_pdata;
497
498static void __init origen_ohci_init(void)
499{
500 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
501
502 exynos4_ohci_set_platdata(pdata);
503}
504
9c278d52
SK		 505/* USB OTG */
506static struct s3c_hsotg_plat origen_hsotg_pdata;
507
29e7d587
RSA		 508static struct gpio_led origen_gpio_leds[] = {
509 {
510 .name = "origen::status1",
511 .default_trigger = "heartbeat",
512 .gpio = EXYNOS4_GPX1(3),
513 .active_low = 1,
514 },
515 {
516 .name = "origen::status2",
517 .default_trigger = "mmc0",
518 .gpio = EXYNOS4_GPX1(4),
519 .active_low = 1,
520 },
521};
522
523static struct gpio_led_platform_data origen_gpio_led_info = {
524 .leds = origen_gpio_leds,
525 .num_leds = ARRAY_SIZE(origen_gpio_leds),
526};
527
528static struct platform_device origen_leds_gpio = {
529 .name = "leds-gpio",
530 .id = -1,
531 .dev = {
532 .platform_data = &origen_gpio_led_info,
533 },
534};
535
c86cfdd0
SK		 536static struct gpio_keys_button origen_gpio_keys_table[] = {
537 {
538 .code = KEY_MENU,
539 .gpio = EXYNOS4_GPX1(5),
540 .desc = "gpio-keys: KEY_MENU",
541 .type = EV_KEY,
542 .active_low = 1,
543 .wakeup = 1,
544 .debounce_interval = 1,
545 }, {
546 .code = KEY_HOME,
547 .gpio = EXYNOS4_GPX1(6),
548 .desc = "gpio-keys: KEY_HOME",
549 .type = EV_KEY,
550 .active_low = 1,
551 .wakeup = 1,
552 .debounce_interval = 1,
553 }, {
554 .code = KEY_BACK,
555 .gpio = EXYNOS4_GPX1(7),
556 .desc = "gpio-keys: KEY_BACK",
557 .type = EV_KEY,
558 .active_low = 1,
559 .wakeup = 1,
560 .debounce_interval = 1,
561 }, {
562 .code = KEY_UP,
563 .gpio = EXYNOS4_GPX2(0),
564 .desc = "gpio-keys: KEY_UP",
565 .type = EV_KEY,
566 .active_low = 1,
567 .wakeup = 1,
568 .debounce_interval = 1,
569 }, {
570 .code = KEY_DOWN,
571 .gpio = EXYNOS4_GPX2(1),
572 .desc = "gpio-keys: KEY_DOWN",
573 .type = EV_KEY,
574 .active_low = 1,
575 .wakeup = 1,
576 .debounce_interval = 1,
577 },
578};
579
580static struct gpio_keys_platform_data origen_gpio_keys_data = {
581 .buttons = origen_gpio_keys_table,
582 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
583};
584
585static struct platform_device origen_device_gpiokeys = {
586 .name = "gpio-keys",
587 .dev = {
588 .platform_data = &origen_gpio_keys_data,
589 },
590};
591
9421a76d
TB		 592static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
593{
594 int ret;
595
596 if (power)
597 ret = gpio_request_one(EXYNOS4_GPE3(4),
598 GPIOF_OUT_INIT_HIGH, "GPE3_4");
599 else
600 ret = gpio_request_one(EXYNOS4_GPE3(4),
601 GPIOF_OUT_INIT_LOW, "GPE3_4");
602
603 gpio_free(EXYNOS4_GPE3(4));
604
605 if (ret)
606 pr_err("failed to request gpio for LCD power: %d\n", ret);
607}
608
609static struct plat_lcd_data origen_lcd_hv070wsa_data = {
610 .set_power = lcd_hv070wsa_set_power,
611};
612
613static struct platform_device origen_lcd_hv070wsa = {
614 .name = "platform-lcd",
615 .dev.parent = &s5p_device_fimd0.dev,
616 .dev.platform_data = &origen_lcd_hv070wsa_data,
617};
618
4d8cc596
TB		 619static struct pwm_lookup origen_pwm_lookup[] = {
620 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
621};
622
479dda22 623#ifdef CONFIG_DRM_EXYNOS_FIMD
84e6aef0
SK		 624static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
625 .panel = {
626 .timing = {
627 .left_margin = 64,
628 .right_margin = 16,
629 .upper_margin = 64,
630 .lower_margin = 16,
631 .hsync_len = 48,
632 .vsync_len = 3,
633 .xres = 1024,
634 .yres = 600,
635 },
636 },
637 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
638 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
639 VIDCON1_INV_VCLK,
640 .default_win = 0,
641 .bpp = 32,
642};
643#else
9421a76d 644static struct s3c_fb_pd_win origen_fb_win0 = {
79d3c41a
TA		 645 .xres = 1024,
646 .yres = 600,
9421a76d
TB		 647 .max_bpp = 32,
648 .default_bpp = 24,
384b1049
TB		 649 .virtual_x = 1024,
650 .virtual_y = 2 * 600,
9421a76d
TB		 651};
652
79d3c41a
TA		 653static struct fb_videomode origen_lcd_timing = {
654 .left_margin = 64,
655 .right_margin = 16,
656 .upper_margin = 64,
657 .lower_margin = 16,
658 .hsync_len = 48,
659 .vsync_len = 3,
660 .xres = 1024,
661 .yres = 600,
662};
663
9421a76d
TB		 664static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
665 .win[0] = &origen_fb_win0,
79d3c41a 666 .vtiming = &origen_lcd_timing,
9421a76d 667 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
815ed6fc
TB		 668 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
669 VIDCON1_INV_VCLK,
9421a76d
TB		 670 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
671};
84e6aef0 672#endif
9421a76d 673
62d30f86 674/* Bluetooth rfkill gpio platform data */
023c9ff6 675static struct rfkill_gpio_platform_data origen_bt_pdata = {
62d30f86
SL		 676 .reset_gpio = EXYNOS4_GPX2(2),
677 .shutdown_gpio = -1,
678 .type = RFKILL_TYPE_BLUETOOTH,
679 .name = "origen-bt",
680};
681
682/* Bluetooth Platform device */
683static struct platform_device origen_device_bluetooth = {
684 .name = "rfkill_gpio",
685 .id = -1,
686 .dev = {
687 .platform_data = &origen_bt_pdata,
688 },
689};
690
699efdd2
JK		 691static struct platform_device *origen_devices[] __initdata = {
692 &s3c_device_hsmmc2,
cf1dad9d 693 &s3c_device_hsmmc0,
9421a76d 694 &s3c_device_i2c0,
699efdd2 695 &s3c_device_rtc,
9c278d52 696 &s3c_device_usb_hsotg,
699efdd2 697 &s3c_device_wdt,
24f9e1f3 698 &s5p_device_ehci,
6f8eb324
SK		 699 &s5p_device_fimc0,
700 &s5p_device_fimc1,
701 &s5p_device_fimc2,
702 &s5p_device_fimc3,
26e14514 703 &s5p_device_fimc_md,
9421a76d 704 &s5p_device_fimd0,
84207d83 705 &s5p_device_g2d,
6ca3f8bd
SK		 706 &s5p_device_hdmi,
707 &s5p_device_i2c_hdmiphy,
965a330d 708 &s5p_device_jpeg,
df74a28c
SK		 709 &s5p_device_mfc,
710 &s5p_device_mfc_l,
711 &s5p_device_mfc_r,
6ca3f8bd 712 &s5p_device_mixer,
95de77d4 713 &exynos4_device_ohci,
c86cfdd0 714 &origen_device_gpiokeys,
9421a76d 715 &origen_lcd_hv070wsa,
29e7d587 716 &origen_leds_gpio,
62d30f86 717 &origen_device_bluetooth,
699efdd2
JK		 718};
719
9edff0f7
GM		 720/* LCD Backlight data */
721static struct samsung_bl_gpio_info origen_bl_gpio_info = {
6e01280f
IS		 722 .no = EXYNOS4_GPD0(0),
723 .func = S3C_GPIO_SFN(2),
9edff0f7
GM		 724};
725
726static struct platform_pwm_backlight_data origen_bl_data = {
6e01280f
IS		 727 .pwm_id = 0,
728 .pwm_period_ns = 1000,
9edff0f7
GM		 729};
730
62d30f86
SL		 731static void __init origen_bt_setup(void)
732{
733 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
734 /* 4 UART Pins configuration */
735 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
736 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
737 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
738 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
739}
740
ccc61fd4
TB		 741/* I2C module and id for HDMIPHY */
742static struct i2c_board_info hdmiphy_info = {
743 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
744};
745
3c766699
SK		 746static void s5p_tv_setup(void)
747{
748 /* Direct HPD to HDMI chip */
749 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
750 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
751 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
752}
753
699efdd2
JK		 754static void __init origen_map_io(void)
755{
cc511b8d 756 exynos_init_io(NULL, 0);
2e27437a 757 s3c24xx_init_clocks(clk_xusbxti.rate);
699efdd2
JK		 758 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
759}
760
6e01280f
IS		 761static void __init origen_power_init(void)
762{
763 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
764 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
765 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
766}
767
df74a28c
SK		 768static void __init origen_reserve(void)
769{
770 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
771}
772
699efdd2
JK		 773static void __init origen_machine_init(void)
774{
6e01280f
IS		 775 origen_power_init();
776
777 s3c_i2c0_set_platdata(NULL);
778 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
779
cf1dad9d
TB		 780 /*
781 * Since sdhci instance 2 can contain a bootable media,
782 * sdhci instance 0 is registered after instance 2.
783 */
699efdd2 784 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
cf1dad9d 785 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
24f9e1f3
SK		 786
787 origen_ehci_init();
95de77d4 788 origen_ohci_init();
9c278d52 789 s3c_hsotg_set_platdata(&origen_hsotg_pdata);
24f9e1f3 790
3c766699 791 s5p_tv_setup();
6ca3f8bd 792 s5p_i2c_hdmiphy_set_platdata(NULL);
ccc61fd4 793 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
6ca3f8bd 794
479dda22 795#ifdef CONFIG_DRM_EXYNOS_FIMD
84e6aef0
SK		 796 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
797 exynos4_fimd0_gpio_setup_24bpp();
798#else
9421a76d 799 s5p_fimd0_set_platdata(&origen_lcd_pdata);
84e6aef0 800#endif
9421a76d 801
699efdd2 802 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
df74a28c 803
4d8cc596 804 pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup));
9edff0f7 805 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
62d30f86
SL		 806
807 origen_bt_setup();
699efdd2
JK		 808}
809
810MACHINE_START(ORIGEN, "ORIGEN")
811 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
1abd328e 812 .atag_offset = 0x100,
06853ae4 813 .smp = smp_ops(exynos_smp_ops),
699efdd2
JK		 814 .init_irq = exynos4_init_irq,
815 .map_io = origen_map_io,
816 .init_machine = origen_machine_init,
bb13fabc 817 .init_late = exynos_init_late,
9fbf0c85 818 .init_time = mct_init,
df74a28c 819 .reserve = &origen_reserve,
9eb48595 820 .restart = exynos4_restart,
699efdd2 821MACHINE_END
Linux 6.x block layer and io_uring tree(s)