[linux-2.6-block.git] / arch / arm / mach-exynos / common.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Common Header for EXYNOS machines
 */

#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
#define __ARCH_ARM_MACH_EXYNOS_COMMON_H

#include <linux/platform_data/cpuidle-exynos.h>

#define EXYNOS3250_SOC_ID	0xE3472000
#define EXYNOS3_SOC_MASK	0xFFFFF000

#define EXYNOS4210_CPU_ID	0x43210000
#define EXYNOS4412_CPU_ID	0xE4412200
#define EXYNOS4_CPU_MASK	0xFFFE0000

#define EXYNOS5250_SOC_ID	0x43520000
#define EXYNOS5410_SOC_ID	0xE5410000
#define EXYNOS5420_SOC_ID	0xE5420000
#define EXYNOS5440_SOC_ID	0xE5440000
#define EXYNOS5800_SOC_ID	0xE5422000
#define EXYNOS5_SOC_MASK	0xFFFFF000

extern unsigned long samsung_cpu_id;

#define IS_SAMSUNG_CPU(name, id, mask)		\
static inline int is_samsung_##name(void)	\
{						\
	return ((samsung_cpu_id & mask) == (id & mask));	\
}

IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)

#if defined(CONFIG_SOC_EXYNOS3250)
# define soc_is_exynos3250()	is_samsung_exynos3250()
#else
# define soc_is_exynos3250()	0
#endif

#if defined(CONFIG_CPU_EXYNOS4210)
# define soc_is_exynos4210()	is_samsung_exynos4210()
#else
# define soc_is_exynos4210()	0
#endif

#if defined(CONFIG_SOC_EXYNOS4412)
# define soc_is_exynos4412()	is_samsung_exynos4412()
#else
# define soc_is_exynos4412()	0
#endif

#define EXYNOS4210_REV_0	(0x0)
#define EXYNOS4210_REV_1_0	(0x10)
#define EXYNOS4210_REV_1_1	(0x11)

#if defined(CONFIG_SOC_EXYNOS5250)
# define soc_is_exynos5250()	is_samsung_exynos5250()
#else
# define soc_is_exynos5250()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5410)
# define soc_is_exynos5410()	is_samsung_exynos5410()
#else
# define soc_is_exynos5410()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5420)
# define soc_is_exynos5420()	is_samsung_exynos5420()
#else
# define soc_is_exynos5420()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5440)
# define soc_is_exynos5440()	is_samsung_exynos5440()
#else
# define soc_is_exynos5440()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5800)
# define soc_is_exynos5800()	is_samsung_exynos5800()
#else
# define soc_is_exynos5800()	0
#endif

#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4412())
#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
			  soc_is_exynos5420() || soc_is_exynos5800())

extern u32 cp15_save_diag;
extern u32 cp15_save_power;

extern void __iomem *sysram_ns_base_addr;
extern void __iomem *sysram_base_addr;
extern void __iomem *pmu_base_addr;
void exynos_sysram_init(void);

enum {
	FW_DO_IDLE_SLEEP,
	FW_DO_IDLE_AFTR,
};

void exynos_firmware_init(void);

/* CPU BOOT mode flag for Exynos3250 SoC bootloader */
#define C2_STATE	(1 << 3)
/*
 * Magic values for bootloader indicating chosen low power mode.
 * See also Documentation/arm/Samsung/Bootloader-interface.txt
 */
#define EXYNOS_SLEEP_MAGIC	0x00000bad
#define EXYNOS_AFTR_MAGIC	0xfcba0d10

void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);

extern u32 exynos_get_eint_wake_mask(void);

#ifdef CONFIG_PM_SLEEP
extern void __init exynos_pm_init(void);
#else
static inline void exynos_pm_init(void) {}
#endif

extern void exynos_cpu_resume(void);
extern void exynos_cpu_resume_ns(void);

extern const struct smp_operations exynos_smp_ops;

extern void exynos_cpu_power_down(int cpu);
extern void exynos_cpu_power_up(int cpu);
extern int  exynos_cpu_power_state(int cpu);
extern void exynos_cluster_power_down(int cluster);
extern void exynos_cluster_power_up(int cluster);
extern int  exynos_cluster_power_state(int cluster);
extern void exynos_cpu_save_register(void);
extern void exynos_cpu_restore_register(void);
extern void exynos_pm_central_suspend(void);
extern int exynos_pm_central_resume(void);
extern void exynos_enter_aftr(void);

extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;

extern void exynos_set_delayed_reset_assertion(bool enable);

extern unsigned int samsung_rev(void);
extern void exynos_core_restart(u32 core_id);
extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);
extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);

static inline void pmu_raw_writel(u32 val, u32 offset)
{
	writel_relaxed(val, pmu_base_addr + offset);
}

static inline u32 pmu_raw_readl(u32 offset)
{
	return readl_relaxed(pmu_base_addr + offset);
}

#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
Commit	Line	Data
347863d4	1	/* SPDX-License-Identifier: GPL-2.0 */
cc511b8d KK	2	/*
	3	* Copyright (c) 2011 Samsung Electronics Co., Ltd.
	4	* http://www.samsung.com
	5	*
	6	* Common Header for EXYNOS machines
cc511b8d KK	7	*/
	8
	9	#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
	10	#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
	11
712eddf7	12	#include <linux/platform_data/cpuidle-exynos.h>
6e6aac75	13
940bc58d CC	14	#define EXYNOS3250_SOC_ID 0xE3472000
	15	#define EXYNOS3_SOC_MASK 0xFFFFF000
	16
7cb2ded1	17	#define EXYNOS4210_CPU_ID 0x43210000
7cb2ded1 SK	18	#define EXYNOS4412_CPU_ID 0xE4412200
	19	#define EXYNOS4_CPU_MASK 0xFFFE0000
	20
	21	#define EXYNOS5250_SOC_ID 0x43520000
723c9c7e	22	#define EXYNOS5410_SOC_ID 0xE5410000
7cb2ded1 SK	23	#define EXYNOS5420_SOC_ID 0xE5420000
7cb2ded1 SK	24	#define EXYNOS5440_SOC_ID 0xE5440000
86c6f148	25	#define EXYNOS5800_SOC_ID 0xE5422000
7cb2ded1 SK	26	#define EXYNOS5_SOC_MASK 0xFFFFF000
	27
	28	extern unsigned long samsung_cpu_id;
	29
	30	#define IS_SAMSUNG_CPU(name, id, mask) \
	31	static inline int is_samsung_##name(void) \
	32	{ \
	33	return ((samsung_cpu_id & mask) == (id & mask)); \
	34	}
	35
940bc58d	36	IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
7cb2ded1	37	IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
7cb2ded1 SK	38	IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
7cb2ded1 SK	39	IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
723c9c7e	40	IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
7cb2ded1 SK	41	IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
7cb2ded1 SK	42	IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
86c6f148	43	IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
7cb2ded1	44
940bc58d CC	45	#if defined(CONFIG_SOC_EXYNOS3250)
	46	# define soc_is_exynos3250() is_samsung_exynos3250()
	47	#else
	48	# define soc_is_exynos3250() 0
	49	#endif
	50
7cb2ded1 SK	51	#if defined(CONFIG_CPU_EXYNOS4210)
	52	# define soc_is_exynos4210() is_samsung_exynos4210()
	53	#else
	54	# define soc_is_exynos4210() 0
	55	#endif
	56
7cb2ded1 SK	57	#if defined(CONFIG_SOC_EXYNOS4412)
	58	# define soc_is_exynos4412() is_samsung_exynos4412()
	59	#else
	60	# define soc_is_exynos4412() 0
	61	#endif
	62
	63	#define EXYNOS4210_REV_0 (0x0)
	64	#define EXYNOS4210_REV_1_0 (0x10)
	65	#define EXYNOS4210_REV_1_1 (0x11)
	66
	67	#if defined(CONFIG_SOC_EXYNOS5250)
	68	# define soc_is_exynos5250() is_samsung_exynos5250()
	69	#else
	70	# define soc_is_exynos5250() 0
	71	#endif
	72
723c9c7e TD	73	#if defined(CONFIG_SOC_EXYNOS5410)
	74	# define soc_is_exynos5410() is_samsung_exynos5410()
	75	#else
	76	# define soc_is_exynos5410() 0
	77	#endif
	78
7cb2ded1 SK	79	#if defined(CONFIG_SOC_EXYNOS5420)
	80	# define soc_is_exynos5420() is_samsung_exynos5420()
	81	#else
	82	# define soc_is_exynos5420() 0
	83	#endif
	84
	85	#if defined(CONFIG_SOC_EXYNOS5440)
	86	# define soc_is_exynos5440() is_samsung_exynos5440()
	87	#else
	88	# define soc_is_exynos5440() 0
	89	#endif
	90
86c6f148 AK	91	#if defined(CONFIG_SOC_EXYNOS5800)
	92	# define soc_is_exynos5800() is_samsung_exynos5800()
	93	#else
	94	# define soc_is_exynos5800() 0
	95	#endif
	96
9e43eca3	97	#define soc_is_exynos4() (soc_is_exynos4210() \|\| soc_is_exynos4412())
723c9c7e TD	98	#define soc_is_exynos5() (soc_is_exynos5250() \|\| soc_is_exynos5410() \|\| \
723c9c7e TD	99	soc_is_exynos5420() \|\| soc_is_exynos5800())
7cb2ded1	100
2b9d9c32 TF	101	extern u32 cp15_save_diag;
	102	extern u32 cp15_save_power;
	103
b3205dea	104	extern void __iomem *sysram_ns_base_addr;
cd245f59	105	extern void __iomem *sysram_base_addr;
fce9e5bb	106	extern void __iomem *pmu_base_addr;
1754c42e	107	void exynos_sysram_init(void);
bb13fabc	108
0b7778a8 BZ	109	enum {
	110	FW_DO_IDLE_SLEEP,
	111	FW_DO_IDLE_AFTR,
	112	};
	113
bca28f8f TF	114	void exynos_firmware_init(void);
bca28f8f TF	115
dc1b9448 BZ	116	/* CPU BOOT mode flag for Exynos3250 SoC bootloader */
dc1b9448 BZ	117	#define C2_STATE (1 << 3)
054e6aa1 KK	118	/*
	119	* Magic values for bootloader indicating chosen low power mode.
	120	* See also Documentation/arm/Samsung/Bootloader-interface.txt
	121	*/
	122	#define EXYNOS_SLEEP_MAGIC 0x00000bad
	123	#define EXYNOS_AFTR_MAGIC 0xfcba0d10
dc1b9448 BZ	124
	125	void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
	126	void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);
	127
d710aa31	128	extern u32 exynos_get_eint_wake_mask(void);
d710aa31	129
559ba237 TF	130	#ifdef CONFIG_PM_SLEEP
	131	extern void __init exynos_pm_init(void);
	132	#else
	133	static inline void exynos_pm_init(void) {}
	134	#endif
	135
d710aa31	136	extern void exynos_cpu_resume(void);
2b9d9c32	137	extern void exynos_cpu_resume_ns(void);
d710aa31	138
75305275	139	extern const struct smp_operations exynos_smp_ops;
06853ae4	140
d3af6976 LKA	141	extern void exynos_cpu_power_down(int cpu);
	142	extern void exynos_cpu_power_up(int cpu);
	143	extern int exynos_cpu_power_state(int cpu);
096d21c6 AK	144	extern void exynos_cluster_power_down(int cluster);
	145	extern void exynos_cluster_power_up(int cluster);
	146	extern int exynos_cluster_power_state(int cluster);
0d713cf1 BZ	147	extern void exynos_cpu_save_register(void);
	148	extern void exynos_cpu_restore_register(void);
	149	extern void exynos_pm_central_suspend(void);
	150	extern int exynos_pm_central_resume(void);
3681bafe	151	extern void exynos_enter_aftr(void);
ccd458c1	152
712eddf7 BZ	153	extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
712eddf7 BZ	154
6f024978 KK	155	extern void exynos_set_delayed_reset_assertion(bool enable);
6f024978 KK	156
7cb2ded1	157	extern unsigned int samsung_rev(void);
af997114 BZ	158	extern void exynos_core_restart(u32 core_id);
	159	extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);
	160	extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);
7cb2ded1	161
2e94ac42 PD	162	static inline void pmu_raw_writel(u32 val, u32 offset)
2e94ac42 PD	163	{
d0ceee0b	164	writel_relaxed(val, pmu_base_addr + offset);
2e94ac42 PD	165	}
	166
	167	static inline u32 pmu_raw_readl(u32 offset)
	168	{
d0ceee0b	169	return readl_relaxed(pmu_base_addr + offset);
2e94ac42 PD	170	}
2e94ac42 PD	171
cc511b8d	172	#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */