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[ARM] 5600/1: ep93xx: core.c remove cast when copying dev_addr
[linux-block.git] / arch / arm / mach-ep93xx / gpio.c
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b685004f
RM		 1/*
2 * linux/arch/arm/mach-ep93xx/gpio.c
3 *
4 * Generic EP93xx GPIO handling
5 *
6 * Copyright (c) 2008 Ryan Mallon <ryan@bluewatersys.com>
7 *
8 * Based on code originally from:
9 * linux/arch/arm/mach-ep93xx/core.c
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/seq_file.h>
fced80c7 19#include <linux/io.h>
ddf4f3d9 20#include <linux/gpio.h>
b685004f 21
ddf4f3d9 22#include <mach/hardware.h>
b685004f
RM		 23
24struct ep93xx_gpio_chip {
25 struct gpio_chip chip;
26
ddf4f3d9
HS		 27 void __iomem *data_reg;
28 void __iomem *data_dir_reg;
b685004f
RM		 29};
30
31#define to_ep93xx_gpio_chip(c) container_of(c, struct ep93xx_gpio_chip, chip)
32
33/* From core.c */
34extern void ep93xx_gpio_int_mask(unsigned line);
35extern void ep93xx_gpio_update_int_params(unsigned port);
36
37static int ep93xx_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
38{
39 struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
40 unsigned long flags;
41 u8 v;
42
43 local_irq_save(flags);
44 v = __raw_readb(ep93xx_chip->data_dir_reg);
45 v &= ~(1 << offset);
46 __raw_writeb(v, ep93xx_chip->data_dir_reg);
47 local_irq_restore(flags);
48
49 return 0;
50}
51
52static int ep93xx_gpio_direction_output(struct gpio_chip *chip,
53 unsigned offset, int val)
54{
55 struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
56 unsigned long flags;
57 int line;
58 u8 v;
59
60 local_irq_save(flags);
61
62 /* Set the value */
63 v = __raw_readb(ep93xx_chip->data_reg);
64 if (val)
65 v |= (1 << offset);
66 else
67 v &= ~(1 << offset);
68 __raw_writeb(v, ep93xx_chip->data_reg);
69
70 /* Drive as an output */
71 line = chip->base + offset;
72 if (line <= EP93XX_GPIO_LINE_MAX_IRQ) {
73 /* Ports A/B/F */
74 ep93xx_gpio_int_mask(line);
75 ep93xx_gpio_update_int_params(line >> 3);
76 }
77
78 v = __raw_readb(ep93xx_chip->data_dir_reg);
79 v |= (1 << offset);
80 __raw_writeb(v, ep93xx_chip->data_dir_reg);
81
82 local_irq_restore(flags);
83
84 return 0;
85}
86
87static int ep93xx_gpio_get(struct gpio_chip *chip, unsigned offset)
88{
89 struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
90
91 return !!(__raw_readb(ep93xx_chip->data_reg) & (1 << offset));
92}
93
94static void ep93xx_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
95{
96 struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
97 unsigned long flags;
98 u8 v;
99
100 local_irq_save(flags);
101 v = __raw_readb(ep93xx_chip->data_reg);
102 if (val)
103 v |= (1 << offset);
104 else
105 v &= ~(1 << offset);
106 __raw_writeb(v, ep93xx_chip->data_reg);
107 local_irq_restore(flags);
108}
109
110static void ep93xx_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
111{
112 struct ep93xx_gpio_chip *ep93xx_chip = to_ep93xx_gpio_chip(chip);
113 u8 data_reg, data_dir_reg;
f04989bb 114 int gpio, i;
b685004f
RM		 115
116 data_reg = __raw_readb(ep93xx_chip->data_reg);
117 data_dir_reg = __raw_readb(ep93xx_chip->data_dir_reg);
118
f04989bb
HS		 119 gpio = ep93xx_chip->chip.base;
120 for (i = 0; i < chip->ngpio; i++, gpio++) {
121 int is_out = data_dir_reg & (1 << i);
122
123 seq_printf(s, " %s%d gpio-%-3d (%-12s) %s %s",
124 chip->label, i, gpio,
125 gpiochip_is_requested(chip, i) ? : "",
126 is_out ? "out" : "in ",
127 (data_reg & (1 << i)) ? "hi" : "lo");
128
129 if (!is_out) {
130 int irq = gpio_to_irq(gpio);
131 struct irq_desc *desc = irq_desc + irq;
132
133 if (irq >= 0 && desc->action) {
134 char *trigger;
135
136 switch (desc->status & IRQ_TYPE_SENSE_MASK) {
137 case IRQ_TYPE_NONE:
138 trigger = "(default)";
139 break;
140 case IRQ_TYPE_EDGE_FALLING:
141 trigger = "edge-falling";
142 break;
143 case IRQ_TYPE_EDGE_RISING:
144 trigger = "edge-rising";
145 break;
146 case IRQ_TYPE_EDGE_BOTH:
147 trigger = "edge-both";
148 break;
149 case IRQ_TYPE_LEVEL_HIGH:
150 trigger = "level-high";
151 break;
152 case IRQ_TYPE_LEVEL_LOW:
153 trigger = "level-low";
154 break;
155 default:
156 trigger = "?trigger?";
157 break;
158 }
159
160 seq_printf(s, " irq-%d %s%s",
161 irq, trigger,
162 (desc->status & IRQ_WAKEUP)
163 ? " wakeup" : "");
164 }
165 }
166
167 seq_printf(s, "\n");
168 }
b685004f
RM		 169}
170
171#define EP93XX_GPIO_BANK(name, dr, ddr, base_gpio) \
172 { \
173 .chip = { \
174 .label = name, \
175 .direction_input = ep93xx_gpio_direction_input, \
176 .direction_output = ep93xx_gpio_direction_output, \
177 .get = ep93xx_gpio_get, \
178 .set = ep93xx_gpio_set, \
179 .dbg_show = ep93xx_gpio_dbg_show, \
180 .base = base_gpio, \
181 .ngpio = 8, \
182 }, \
183 .data_reg = EP93XX_GPIO_REG(dr), \
184 .data_dir_reg = EP93XX_GPIO_REG(ddr), \
185 }
186
187static struct ep93xx_gpio_chip ep93xx_gpio_banks[] = {
188 EP93XX_GPIO_BANK("A", 0x00, 0x10, 0),
189 EP93XX_GPIO_BANK("B", 0x04, 0x14, 8),
7a1f3701 190 EP93XX_GPIO_BANK("C", 0x08, 0x18, 40),
b685004f
RM		 191 EP93XX_GPIO_BANK("D", 0x0c, 0x1c, 24),
192 EP93XX_GPIO_BANK("E", 0x20, 0x24, 32),
7a1f3701 193 EP93XX_GPIO_BANK("F", 0x30, 0x34, 16),
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RM		 194 EP93XX_GPIO_BANK("G", 0x38, 0x3c, 48),
195 EP93XX_GPIO_BANK("H", 0x40, 0x44, 56),
196};
197
198void __init ep93xx_gpio_init(void)
199{
200 int i;
201
202 for (i = 0; i < ARRAY_SIZE(ep93xx_gpio_banks); i++)
203 gpiochip_add(&ep93xx_gpio_banks[i].chip);
204}
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