Merge tag 'pm+acpi-3.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[linux-2.6-block.git] / arch / arm / mach-dove / board-dt.c
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1/*
2 * arch/arm/mach-dove/board-dt.c
3 *
4 * Marvell Dove 88AP510 System On Chip FDT Board
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/init.h>
12#include <linux/clk-provider.h>
13#include <linux/clk/mvebu.h>
14#include <linux/of.h>
15#include <linux/of_platform.h>
16#include <linux/platform_data/usb-ehci-orion.h>
17#include <asm/hardware/cache-tauros2.h>
18#include <asm/mach/arch.h>
19#include <mach/pm.h>
20#include <plat/common.h>
21#include <plat/irq.h>
22#include "common.h"
23
24/*
25 * There are still devices that doesn't even know about DT,
26 * get clock gates here and add a clock lookup.
27 */
28static void __init dove_legacy_clk_init(void)
29{
30 struct device_node *np = of_find_compatible_node(NULL, NULL,
31 "marvell,dove-gating-clock");
32 struct of_phandle_args clkspec;
33
34 clkspec.np = np;
35 clkspec.args_count = 1;
36
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37 clkspec.args[0] = CLOCK_GATING_BIT_GBE;
38 orion_clkdev_add(NULL, "mv643xx_eth_port.0",
39 of_clk_get_from_provider(&clkspec));
40
41 clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
42 orion_clkdev_add("0", "pcie",
43 of_clk_get_from_provider(&clkspec));
44
45 clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
46 orion_clkdev_add("1", "pcie",
47 of_clk_get_from_provider(&clkspec));
48}
49
50static void __init dove_of_clk_init(void)
51{
52 mvebu_clocks_init();
53 dove_legacy_clk_init();
54}
55
56static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
57 .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
58};
59
60static void __init dove_dt_init(void)
61{
62 pr_info("Dove 88AP510 SoC\n");
63
64#ifdef CONFIG_CACHE_TAUROS2
65 tauros2_init(0);
66#endif
67 dove_setup_cpu_mbus();
68
69 /* Setup root of clk tree */
70 dove_of_clk_init();
71
72 /* Internal devices not ported to DT yet */
73 dove_ge00_init(&dove_dt_ge00_data);
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74 dove_pcie_init(1, 1);
75
76 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
77}
78
79static const char * const dove_dt_board_compat[] = {
80 "marvell,dove",
81 NULL
82};
83
84DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
85 .map_io = dove_map_io,
86 .init_early = dove_init_early,
87 .init_irq = orion_dt_init_irq,
88 .init_time = dove_timer_init,
89 .init_machine = dove_dt_init,
90 .restart = dove_restart,
91 .dt_compat = dove_dt_board_compat,
92MACHINE_END