[linux-2.6-block.git] / arch / arm / mach-davinci / devices.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * mach-davinci/devices.c
 *
 * DaVinci platform device setup/initialization
 */

#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/edma.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/reboot.h>

#include <mach/hardware.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <mach/time.h>

#include "davinci.h"
#include "irqs.h"

#define DAVINCI_I2C_BASE	     0x01C21000
#define DAVINCI_ATA_BASE	     0x01C66000
#define DAVINCI_MMCSD0_BASE	     0x01E10000
#define DM355_MMCSD0_BASE	     0x01E11000
#define DM355_MMCSD1_BASE	     0x01E00000
#define DM365_MMCSD0_BASE	     0x01D11000
#define DM365_MMCSD1_BASE	     0x01D00000

void __iomem  *davinci_sysmod_base;

void davinci_map_sysmod(void)
{
	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
					      0x800);
	/*
	 * Throw a bug since a lot of board initialization code depends
	 * on system module availability. ioremap() failing this early
	 * need careful looking into anyway.
	 */
	BUG_ON(!davinci_sysmod_base);
}

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
		.end		= DAVINCI_I2C_BASE + 0x40,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= DAVINCI_INTC_IRQ(IRQ_I2C),
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_i2c_device = {
	.name           = "i2c_davinci",
	.id             = 1,
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
{
	if (cpu_is_davinci_dm644x())
		davinci_cfg_reg(DM644X_I2C);

	davinci_i2c_device.dev.platform_data = pdata;
	(void) platform_device_register(&davinci_i2c_device);
}

static struct resource ide_resources[] = {
	{
		.start		= DAVINCI_ATA_BASE,
		.end		= DAVINCI_ATA_BASE + 0x7ff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= DAVINCI_INTC_IRQ(IRQ_IDE),
		.end		= DAVINCI_INTC_IRQ(IRQ_IDE),
		.flags		= IORESOURCE_IRQ,
	},
};

static u64 ide_dma_mask = DMA_BIT_MASK(32);

static struct platform_device ide_device = {
	.name           = "palm_bk3710",
	.id             = -1,
	.resource       = ide_resources,
	.num_resources  = ARRAY_SIZE(ide_resources),
	.dev = {
		.dma_mask		= &ide_dma_mask,
		.coherent_dma_mask      = DMA_BIT_MASK(32),
	},
};

void __init davinci_init_ide(void)
{
	if (cpu_is_davinci_dm644x()) {
		davinci_cfg_reg(DM644X_HPIEN_DISABLE);
		davinci_cfg_reg(DM644X_ATAEN);
		davinci_cfg_reg(DM644X_HDIREN);
	} else if (cpu_is_davinci_dm646x()) {
		/* IRQ_DM646X_IDE is the same as IRQ_IDE */
		davinci_cfg_reg(DM646X_ATAEN);
	} else {
		WARN_ON(1);
		return;
	}

	platform_device_register(&ide_device);
}

#if IS_ENABLED(CONFIG_MMC_DAVINCI)

static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd0_resources[] = {
	{
		/* different on dm355 */
		.start = DAVINCI_MMCSD0_BASE,
		.end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
		.flags = IORESOURCE_IRQ,
	}, {
		/* different on dm355 */
		.start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_mmcsd0_device = {
	.name = "dm6441-mmc",
	.id = 0,
	.dev = {
		.dma_mask = &mmcsd0_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	.resource = mmcsd0_resources,
};

static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd1_resources[] = {
	{
		.start = DM355_MMCSD1_BASE,
		.end   = DM355_MMCSD1_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
		.flags = IORESOURCE_IRQ,
	}, {
		.start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
		.flags = IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_mmcsd1_device = {
	.name = "dm6441-mmc",
	.id = 1,
	.dev = {
		.dma_mask = &mmcsd1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	.resource = mmcsd1_resources,
};


void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
	struct platform_device	*pdev = NULL;

	if (WARN_ON(cpu_is_davinci_dm646x()))
		return;

	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	 *
	 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	 * not handled right here ...
	 */
	switch (module) {
	case 1:
		if (cpu_is_davinci_dm355()) {
			/* REVISIT we may not need all these pins if e.g. this
			 * is a hard-wired SDIO device...
			 */
			davinci_cfg_reg(DM355_SD1_CMD);
			davinci_cfg_reg(DM355_SD1_CLK);
			davinci_cfg_reg(DM355_SD1_DATA0);
			davinci_cfg_reg(DM355_SD1_DATA1);
			davinci_cfg_reg(DM355_SD1_DATA2);
			davinci_cfg_reg(DM355_SD1_DATA3);
		} else if (cpu_is_davinci_dm365()) {
			/* Configure pull down control */
			unsigned v;

			v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
			__raw_writel(v & ~0xfc0,
					DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));

			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
							SZ_4K - 1;
			mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
							IRQ_DM365_SDIOINT1);
			davinci_mmcsd1_device.name = "da830-mmc";
		} else
			break;

		pdev = &davinci_mmcsd1_device;
		break;
	case 0:
		if (cpu_is_davinci_dm355()) {
			mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
			mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
							IRQ_DM355_SDIOINT0);

			/* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
			davinci_cfg_reg(DM355_MMCSD0);

			/* enable RX EDMA */
			davinci_cfg_reg(DM355_EVT26_MMC0_RX);
		} else if (cpu_is_davinci_dm365()) {
			mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
							IRQ_DM365_SDIOINT0);
			davinci_mmcsd0_device.name = "da830-mmc";
		} else if (cpu_is_davinci_dm644x()) {
			/* REVISIT: should this be in board-init code? */
			/* Power-on 3.3V IO cells */
			__raw_writel(0,
				DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
			/*Set up the pull regiter for MMC */
			davinci_cfg_reg(DM644X_MSTK);
		}

		pdev = &davinci_mmcsd0_device;
		break;
	}

	if (WARN_ON(!pdev))
		return;

	pdev->dev.platform_data = config;
	platform_device_register(pdev);
}

#else

void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
}

#endif

/*-------------------------------------------------------------------------*/

static struct resource wdt_resources[] = {
	{
		.start	= DAVINCI_WDOG_BASE,
		.end	= DAVINCI_WDOG_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device davinci_wdt_device = {
	.name		= "davinci-wdt",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

int davinci_init_wdt(void)
{
	return platform_device_register(&davinci_wdt_device);
}

static struct platform_device davinci_gpio_device = {
	.name	= "davinci_gpio",
	.id	= -1,
};

int davinci_gpio_register(struct resource *res, int size, void *pdata)
{
	davinci_gpio_device.resource = res;
	davinci_gpio_device.num_resources = size;
	davinci_gpio_device.dev.platform_data = pdata;
	return platform_device_register(&davinci_gpio_device);
}

/*-------------------------------------------------------------------------*/

/*-------------------------------------------------------------------------*/

struct davinci_timer_instance davinci_timer_instance[2] = {
	{
		.base		= DAVINCI_TIMER0_BASE,
		.bottom_irq	= DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12),
		.top_irq	= DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34),
	},
	{
		.base		= DAVINCI_TIMER1_BASE,
		.bottom_irq	= DAVINCI_INTC_IRQ(IRQ_TINT1_TINT12),
		.top_irq	= DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34),
	},
};
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
d395e6ad KS	2	/*
	3	* mach-davinci/devices.c
	4	*
	5	* DaVinci platform device setup/initialization
d395e6ad KS	6	*/
d395e6ad KS	7
d395e6ad KS	8	#include <linux/init.h>
d395e6ad KS	9	#include <linux/platform_device.h>
544ca0b0 BG	10	#include <linux/platform_data/i2c-davinci.h>
	11	#include <linux/platform_data/mmc-davinci.h>
	12	#include <linux/platform_data/edma.h>
d395e6ad KS	13	#include <linux/dma-mapping.h>
d395e6ad KS	14	#include <linux/io.h>
7b6d864b	15	#include <linux/reboot.h>
d395e6ad	16
d395e6ad	17	#include <mach/hardware.h>
5526b3f7 KH	18	#include <mach/cputype.h>
5526b3f7 KH	19	#include <mach/mux.h>
f64691b3	20	#include <mach/time.h>
d395e6ad	21
5cfb19ac	22	#include "davinci.h"
544ca0b0	23	#include "irqs.h"
28552c2e	24
f5c122da	25	#define DAVINCI_I2C_BASE 0x01C21000
7a9978a1	26	#define DAVINCI_ATA_BASE 0x01C66000
2dbf56ae KH	27	#define DAVINCI_MMCSD0_BASE 0x01E10000
	28	#define DM355_MMCSD0_BASE 0x01E11000
	29	#define DM355_MMCSD1_BASE 0x01E00000
19ff3bf2 SP	30	#define DM365_MMCSD0_BASE 0x01D11000
19ff3bf2 SP	31	#define DM365_MMCSD1_BASE 0x01D00000
f5c122da	32
5cfb19ac MH	33	void __iomem *davinci_sysmod_base;
	34
	35	void davinci_map_sysmod(void)
	36	{
	37	davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
	38	0x800);
	39	/*
	40	* Throw a bug since a lot of board initialization code depends
	41	* on system module availability. ioremap() failing this early
	42	* need careful looking into anyway.
	43	*/
	44	BUG_ON(!davinci_sysmod_base);
	45	}
1a717c00	46
d395e6ad KS	47	static struct resource i2c_resources[] = {
	48	{
	49	.start = DAVINCI_I2C_BASE,
	50	.end = DAVINCI_I2C_BASE + 0x40,
	51	.flags = IORESOURCE_MEM,
	52	},
	53	{
a98ca73e	54	.start = DAVINCI_INTC_IRQ(IRQ_I2C),
d395e6ad KS	55	.flags = IORESOURCE_IRQ,
	56	},
	57	};
	58
	59	static struct platform_device davinci_i2c_device = {
	60	.name = "i2c_davinci",
	61	.id = 1,
	62	.num_resources = ARRAY_SIZE(i2c_resources),
	63	.resource = i2c_resources,
	64	};
	65
	66	void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
	67	{
5526b3f7 KH	68	if (cpu_is_davinci_dm644x())
	69	davinci_cfg_reg(DM644X_I2C);
	70
d395e6ad KS	71	davinci_i2c_device.dev.platform_data = pdata;
	72	(void) platform_device_register(&davinci_i2c_device);
	73	}
	74
7a9978a1 SS	75	static struct resource ide_resources[] = {
	76	{
	77	.start = DAVINCI_ATA_BASE,
	78	.end = DAVINCI_ATA_BASE + 0x7ff,
	79	.flags = IORESOURCE_MEM,
	80	},
	81	{
a98ca73e BG	82	.start = DAVINCI_INTC_IRQ(IRQ_IDE),
a98ca73e BG	83	.end = DAVINCI_INTC_IRQ(IRQ_IDE),
7a9978a1 SS	84	.flags = IORESOURCE_IRQ,
	85	},
	86	};
	87
	88	static u64 ide_dma_mask = DMA_BIT_MASK(32);
	89
	90	static struct platform_device ide_device = {
	91	.name = "palm_bk3710",
	92	.id = -1,
	93	.resource = ide_resources,
	94	.num_resources = ARRAY_SIZE(ide_resources),
	95	.dev = {
	96	.dma_mask = &ide_dma_mask,
	97	.coherent_dma_mask = DMA_BIT_MASK(32),
	98	},
	99	};
	100
	101	void __init davinci_init_ide(void)
	102	{
	103	if (cpu_is_davinci_dm644x()) {
	104	davinci_cfg_reg(DM644X_HPIEN_DISABLE);
	105	davinci_cfg_reg(DM644X_ATAEN);
	106	davinci_cfg_reg(DM644X_HDIREN);
	107	} else if (cpu_is_davinci_dm646x()) {
	108	/* IRQ_DM646X_IDE is the same as IRQ_IDE */
	109	davinci_cfg_reg(DM646X_ATAEN);
	110	} else {
	111	WARN_ON(1);
	112	return;
	113	}
	114
	115	platform_device_register(&ide_device);
	116	}
	117
a0a56db9	118	#if IS_ENABLED(CONFIG_MMC_DAVINCI)
2dbf56ae	119
b0958aed	120	static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	121
	122	static struct resource mmcsd0_resources[] = {
	123	{
	124	/* different on dm355 */
	125	.start = DAVINCI_MMCSD0_BASE,
	126	.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
	127	.flags = IORESOURCE_MEM,
	128	},
	129	/* IRQs: MMC/SD, then SDIO */
	130	{
a98ca73e	131	.start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
2dbf56ae KH	132	.flags = IORESOURCE_IRQ,
	133	}, {
	134	/* different on dm355 */
a98ca73e	135	.start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
2dbf56ae KH	136	.flags = IORESOURCE_IRQ,
2dbf56ae KH	137	},
2dbf56ae KH	138	};
	139
	140	static struct platform_device davinci_mmcsd0_device = {
d7ca4c75	141	.name = "dm6441-mmc",
2dbf56ae KH	142	.id = 0,
	143	.dev = {
	144	.dma_mask = &mmcsd0_dma_mask,
b0958aed	145	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	146	},
	147	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	148	.resource = mmcsd0_resources,
	149	};
	150
b0958aed	151	static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	152
	153	static struct resource mmcsd1_resources[] = {
	154	{
	155	.start = DM355_MMCSD1_BASE,
	156	.end = DM355_MMCSD1_BASE + SZ_4K - 1,
	157	.flags = IORESOURCE_MEM,
	158	},
	159	/* IRQs: MMC/SD, then SDIO */
	160	{
a98ca73e	161	.start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
2dbf56ae KH	162	.flags = IORESOURCE_IRQ,
2dbf56ae KH	163	}, {
a98ca73e	164	.start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
2dbf56ae KH	165	.flags = IORESOURCE_IRQ,
2dbf56ae KH	166	},
2dbf56ae KH	167	};
	168
	169	static struct platform_device davinci_mmcsd1_device = {
d7ca4c75	170	.name = "dm6441-mmc",
2dbf56ae KH	171	.id = 1,
	172	.dev = {
	173	.dma_mask = &mmcsd1_dma_mask,
b0958aed	174	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	175	},
	176	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	177	.resource = mmcsd1_resources,
	178	};
	179
	180
	181	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	182	{
	183	struct platform_device *pdev = NULL;
	184
	185	if (WARN_ON(cpu_is_davinci_dm646x()))
	186	return;
	187
	188	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	189	* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	190	*
	191	* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	192	* not handled right here ...
	193	*/
	194	switch (module) {
	195	case 1:
19ff3bf2 SP	196	if (cpu_is_davinci_dm355()) {
	197	/* REVISIT we may not need all these pins if e.g. this
	198	* is a hard-wired SDIO device...
	199	*/
	200	davinci_cfg_reg(DM355_SD1_CMD);
	201	davinci_cfg_reg(DM355_SD1_CLK);
	202	davinci_cfg_reg(DM355_SD1_DATA0);
	203	davinci_cfg_reg(DM355_SD1_DATA1);
	204	davinci_cfg_reg(DM355_SD1_DATA2);
	205	davinci_cfg_reg(DM355_SD1_DATA3);
	206	} else if (cpu_is_davinci_dm365()) {
19ff3bf2	207	/* Configure pull down control */
5cfb19ac MH	208	unsigned v;
	209
	210	v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
	211	__raw_writel(v & ~0xfc0,
	212	DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
19ff3bf2 SP	213
	214	mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
	215	mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
	216	SZ_4K - 1;
a98ca73e BG	217	mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
a98ca73e BG	218	IRQ_DM365_SDIOINT1);
d7ca4c75	219	davinci_mmcsd1_device.name = "da830-mmc";
19ff3bf2	220	} else
2dbf56ae KH	221	break;
2dbf56ae KH	222
2dbf56ae KH	223	pdev = &davinci_mmcsd1_device;
	224	break;
	225	case 0:
	226	if (cpu_is_davinci_dm355()) {
	227	mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
	228	mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
a98ca73e BG	229	mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
a98ca73e BG	230	IRQ_DM355_SDIOINT0);
2dbf56ae KH	231
	232	/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
	233	davinci_cfg_reg(DM355_MMCSD0);
	234
	235	/* enable RX EDMA */
	236	davinci_cfg_reg(DM355_EVT26_MMC0_RX);
19ff3bf2 SP	237	} else if (cpu_is_davinci_dm365()) {
	238	mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
	239	mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
	240	SZ_4K - 1;
a98ca73e BG	241	mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
a98ca73e BG	242	IRQ_DM365_SDIOINT0);
d7ca4c75	243	davinci_mmcsd0_device.name = "da830-mmc";
19ff3bf2	244	} else if (cpu_is_davinci_dm644x()) {
2dbf56ae	245	/* REVISIT: should this be in board-init code? */
2dbf56ae	246	/* Power-on 3.3V IO cells */
5cfb19ac MH	247	__raw_writel(0,
5cfb19ac MH	248	DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
2dbf56ae KH	249	/Set up the pull regiter for MMC /
	250	davinci_cfg_reg(DM644X_MSTK);
	251	}
	252
	253	pdev = &davinci_mmcsd0_device;
	254	break;
	255	}
	256
	257	if (WARN_ON(!pdev))
	258	return;
	259
	260	pdev->dev.platform_data = config;
	261	platform_device_register(pdev);
	262	}
	263
	264	#else
	265
	266	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	267	{
	268	}
	269
	270	#endif
	271
fb631387 KH	272	/-------------------------------------------------------------------------/
	273
	274	static struct resource wdt_resources[] = {
	275	{
5fcd294d KH	276	.start = DAVINCI_WDOG_BASE,
5fcd294d KH	277	.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
fb631387 KH	278	.flags = IORESOURCE_MEM,
	279	},
	280	};
	281
94f2e945	282	static struct platform_device davinci_wdt_device = {
84374812	283	.name = "davinci-wdt",
fb631387 KH	284	.id = -1,
	285	.num_resources = ARRAY_SIZE(wdt_resources),
	286	.resource = wdt_resources,
	287	};
	288
1233090c	289	int davinci_init_wdt(void)
fb631387	290	{
1233090c	291	return platform_device_register(&davinci_wdt_device);
fb631387 KH	292	}
fb631387 KH	293
9cc1515c PA	294	static struct platform_device davinci_gpio_device = {
	295	.name = "davinci_gpio",
	296	.id = -1,
	297	};
	298
	299	int davinci_gpio_register(struct resource res, int size, void pdata)
	300	{
	301	davinci_gpio_device.resource = res;
	302	davinci_gpio_device.num_resources = size;
	303	davinci_gpio_device.dev.platform_data = pdata;
	304	return platform_device_register(&davinci_gpio_device);
	305	}
	306
fb631387 KH	307	/-------------------------------------------------------------------------/
fb631387 KH	308
f0fba2ad LG	309	/-------------------------------------------------------------------------/
f0fba2ad LG	310
f64691b3 MG	311	struct davinci_timer_instance davinci_timer_instance[2] = {
f64691b3 MG	312	{
1bcd38ad	313	.base = DAVINCI_TIMER0_BASE,
a98ca73e BG	314	.bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12),
a98ca73e BG	315	.top_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34),
f64691b3 MG	316	},
f64691b3 MG	317	{
1bcd38ad	318	.base = DAVINCI_TIMER1_BASE,
a98ca73e BG	319	.bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT12),
a98ca73e BG	320	.top_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34),
f64691b3 MG	321	},
	322	};
	323