[linux-2.6-block.git] / arch / arm / mach-davinci / devices.c

/*
 * mach-davinci/devices.c
 *
 * DaVinci platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>

#include <asm/mach/map.h>

#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
#include <mach/edma.h>
#include <mach/mmc.h>
#include <mach/time.h>

#define DAVINCI_I2C_BASE	     0x01C21000
#define DAVINCI_MMCSD0_BASE	     0x01E10000
#define DM355_MMCSD0_BASE	     0x01E11000
#define DM355_MMCSD1_BASE	     0x01E00000
#define DM365_MMCSD0_BASE	     0x01D11000
#define DM365_MMCSD1_BASE	     0x01D00000

static struct resource i2c_resources[] = {
	{
		.start		= DAVINCI_I2C_BASE,
		.end		= DAVINCI_I2C_BASE + 0x40,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= IRQ_I2C,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device davinci_i2c_device = {
	.name           = "i2c_davinci",
	.id             = 1,
	.num_resources	= ARRAY_SIZE(i2c_resources),
	.resource	= i2c_resources,
};

void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
{
	if (cpu_is_davinci_dm644x())
		davinci_cfg_reg(DM644X_I2C);

	davinci_i2c_device.dev.platform_data = pdata;
	(void) platform_device_register(&davinci_i2c_device);
}

#if	defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)

static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd0_resources[] = {
	{
		/* different on dm355 */
		.start = DAVINCI_MMCSD0_BASE,
		.end   = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_MMCINT,
		.flags = IORESOURCE_IRQ,
	}, {
		/* different on dm355 */
		.start = IRQ_SDIOINT,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd0_device = {
	.name = "davinci_mmc",
	.id = 0,
	.dev = {
		.dma_mask = &mmcsd0_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	.resource = mmcsd0_resources,
};

static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);

static struct resource mmcsd1_resources[] = {
	{
		.start = DM355_MMCSD1_BASE,
		.end   = DM355_MMCSD1_BASE + SZ_4K - 1,
		.flags = IORESOURCE_MEM,
	},
	/* IRQs:  MMC/SD, then SDIO */
	{
		.start = IRQ_DM355_MMCINT1,
		.flags = IORESOURCE_IRQ,
	}, {
		.start = IRQ_DM355_SDIOINT1,
		.flags = IORESOURCE_IRQ,
	},
	/* DMA channels: RX, then TX */
	{
		.start = EDMA_CTLR_CHAN(0, 30),	/* rx */
		.flags = IORESOURCE_DMA,
	}, {
		.start = EDMA_CTLR_CHAN(0, 31),	/* tx */
		.flags = IORESOURCE_DMA,
	},
};

static struct platform_device davinci_mmcsd1_device = {
	.name = "davinci_mmc",
	.id = 1,
	.dev = {
		.dma_mask = &mmcsd1_dma_mask,
		.coherent_dma_mask = DMA_BIT_MASK(32),
	},
	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	.resource = mmcsd1_resources,
};


void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
	struct platform_device	*pdev = NULL;

	if (WARN_ON(cpu_is_davinci_dm646x()))
		return;

	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	 *
	 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	 * not handled right here ...
	 */
	switch (module) {
	case 1:
		if (cpu_is_davinci_dm355()) {
			/* REVISIT we may not need all these pins if e.g. this
			 * is a hard-wired SDIO device...
			 */
			davinci_cfg_reg(DM355_SD1_CMD);
			davinci_cfg_reg(DM355_SD1_CLK);
			davinci_cfg_reg(DM355_SD1_DATA0);
			davinci_cfg_reg(DM355_SD1_DATA1);
			davinci_cfg_reg(DM355_SD1_DATA2);
			davinci_cfg_reg(DM355_SD1_DATA3);
		} else if (cpu_is_davinci_dm365()) {
			void __iomem *pupdctl1 =
				IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);

			/* Configure pull down control */
			__raw_writel((__raw_readl(pupdctl1) & ~0x400),
					pupdctl1);

			mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
			mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT1;
		} else
			break;

		pdev = &davinci_mmcsd1_device;
		break;
	case 0:
		if (cpu_is_davinci_dm355()) {
			mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;

			/* expose all 6 MMC0 signals:  CLK, CMD, DATA[0..3] */
			davinci_cfg_reg(DM355_MMCSD0);

			/* enable RX EDMA */
			davinci_cfg_reg(DM355_EVT26_MMC0_RX);
		} else if (cpu_is_davinci_dm365()) {
			mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
			mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
							SZ_4K - 1;
			mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
		} else if (cpu_is_davinci_dm644x()) {
			/* REVISIT: should this be in board-init code? */
			void __iomem *base =
				IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);

			/* Power-on 3.3V IO cells */
			__raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
			/*Set up the pull regiter for MMC */
			davinci_cfg_reg(DM644X_MSTK);
		}

		pdev = &davinci_mmcsd0_device;
		break;
	}

	if (WARN_ON(!pdev))
		return;

	pdev->dev.platform_data = config;
	platform_device_register(pdev);
}

#else

void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
{
}

#endif

/*-------------------------------------------------------------------------*/

static struct resource wdt_resources[] = {
	{
		.start	= DAVINCI_WDOG_BASE,
		.end	= DAVINCI_WDOG_BASE + SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

struct platform_device davinci_wdt_device = {
	.name		= "watchdog",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

static void davinci_init_wdt(void)
{
	platform_device_register(&davinci_wdt_device);
}

/*-------------------------------------------------------------------------*/

struct davinci_timer_instance davinci_timer_instance[2] = {
	{
		.base		= IO_ADDRESS(DAVINCI_TIMER0_BASE),
		.bottom_irq	= IRQ_TINT0_TINT12,
		.top_irq	= IRQ_TINT0_TINT34,
	},
	{
		.base		= IO_ADDRESS(DAVINCI_TIMER1_BASE),
		.bottom_irq	= IRQ_TINT1_TINT12,
		.top_irq	= IRQ_TINT1_TINT34,
	},
};

/*-------------------------------------------------------------------------*/

static int __init davinci_init_devices(void)
{
	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */
	davinci_init_wdt();

	return 0;
}
arch_initcall(davinci_init_devices);
Commit	Line	Data
d395e6ad KS	1	/*
	2	* mach-davinci/devices.c
	3	*
	4	* DaVinci platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/dma-mapping.h>
	17	#include <linux/io.h>
	18
	19	#include <asm/mach/map.h>
	20
	21	#include <mach/hardware.h>
	22	#include <mach/i2c.h>
80b02c17	23	#include <mach/irqs.h>
5526b3f7 KH	24	#include <mach/cputype.h>
5526b3f7 KH	25	#include <mach/mux.h>
2dbf56ae KH	26	#include <mach/edma.h>
2dbf56ae KH	27	#include <mach/mmc.h>
f64691b3	28	#include <mach/time.h>
d395e6ad	29
f5c122da	30	#define DAVINCI_I2C_BASE 0x01C21000
2dbf56ae KH	31	#define DAVINCI_MMCSD0_BASE 0x01E10000
	32	#define DM355_MMCSD0_BASE 0x01E11000
	33	#define DM355_MMCSD1_BASE 0x01E00000
19ff3bf2 SP	34	#define DM365_MMCSD0_BASE 0x01D11000
19ff3bf2 SP	35	#define DM365_MMCSD1_BASE 0x01D00000
f5c122da	36
d395e6ad KS	37	static struct resource i2c_resources[] = {
	38	{
	39	.start = DAVINCI_I2C_BASE,
	40	.end = DAVINCI_I2C_BASE + 0x40,
	41	.flags = IORESOURCE_MEM,
	42	},
	43	{
	44	.start = IRQ_I2C,
	45	.flags = IORESOURCE_IRQ,
	46	},
	47	};
	48
	49	static struct platform_device davinci_i2c_device = {
	50	.name = "i2c_davinci",
	51	.id = 1,
	52	.num_resources = ARRAY_SIZE(i2c_resources),
	53	.resource = i2c_resources,
	54	};
	55
	56	void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
	57	{
5526b3f7 KH	58	if (cpu_is_davinci_dm644x())
	59	davinci_cfg_reg(DM644X_I2C);
	60
d395e6ad KS	61	davinci_i2c_device.dev.platform_data = pdata;
	62	(void) platform_device_register(&davinci_i2c_device);
	63	}
	64
2dbf56ae KH	65	#if defined(CONFIG_MMC_DAVINCI) \|\| defined(CONFIG_MMC_DAVINCI_MODULE)
2dbf56ae KH	66
b0958aed	67	static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	68
	69	static struct resource mmcsd0_resources[] = {
	70	{
	71	/* different on dm355 */
	72	.start = DAVINCI_MMCSD0_BASE,
	73	.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
	74	.flags = IORESOURCE_MEM,
	75	},
	76	/* IRQs: MMC/SD, then SDIO */
	77	{
	78	.start = IRQ_MMCINT,
	79	.flags = IORESOURCE_IRQ,
	80	}, {
	81	/* different on dm355 */
	82	.start = IRQ_SDIOINT,
	83	.flags = IORESOURCE_IRQ,
	84	},
	85	/* DMA channels: RX, then TX */
	86	{
60902a2c	87	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
2dbf56ae KH	88	.flags = IORESOURCE_DMA,
2dbf56ae KH	89	}, {
60902a2c	90	.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
2dbf56ae KH	91	.flags = IORESOURCE_DMA,
	92	},
	93	};
	94
	95	static struct platform_device davinci_mmcsd0_device = {
	96	.name = "davinci_mmc",
	97	.id = 0,
	98	.dev = {
	99	.dma_mask = &mmcsd0_dma_mask,
b0958aed	100	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	101	},
	102	.num_resources = ARRAY_SIZE(mmcsd0_resources),
	103	.resource = mmcsd0_resources,
	104	};
	105
b0958aed	106	static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
2dbf56ae KH	107
	108	static struct resource mmcsd1_resources[] = {
	109	{
	110	.start = DM355_MMCSD1_BASE,
	111	.end = DM355_MMCSD1_BASE + SZ_4K - 1,
	112	.flags = IORESOURCE_MEM,
	113	},
	114	/* IRQs: MMC/SD, then SDIO */
	115	{
	116	.start = IRQ_DM355_MMCINT1,
	117	.flags = IORESOURCE_IRQ,
	118	}, {
	119	.start = IRQ_DM355_SDIOINT1,
	120	.flags = IORESOURCE_IRQ,
	121	},
	122	/* DMA channels: RX, then TX */
	123	{
60902a2c	124	.start = EDMA_CTLR_CHAN(0, 30), /* rx */
2dbf56ae KH	125	.flags = IORESOURCE_DMA,
2dbf56ae KH	126	}, {
60902a2c	127	.start = EDMA_CTLR_CHAN(0, 31), /* tx */
2dbf56ae KH	128	.flags = IORESOURCE_DMA,
	129	},
	130	};
	131
	132	static struct platform_device davinci_mmcsd1_device = {
	133	.name = "davinci_mmc",
	134	.id = 1,
	135	.dev = {
	136	.dma_mask = &mmcsd1_dma_mask,
b0958aed	137	.coherent_dma_mask = DMA_BIT_MASK(32),
2dbf56ae KH	138	},
	139	.num_resources = ARRAY_SIZE(mmcsd1_resources),
	140	.resource = mmcsd1_resources,
	141	};
	142
	143
	144	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	145	{
	146	struct platform_device *pdev = NULL;
	147
	148	if (WARN_ON(cpu_is_davinci_dm646x()))
	149	return;
	150
	151	/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
	152	* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
	153	*
	154	* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
	155	* not handled right here ...
	156	*/
	157	switch (module) {
	158	case 1:
19ff3bf2 SP	159	if (cpu_is_davinci_dm355()) {
	160	/* REVISIT we may not need all these pins if e.g. this
	161	* is a hard-wired SDIO device...
	162	*/
	163	davinci_cfg_reg(DM355_SD1_CMD);
	164	davinci_cfg_reg(DM355_SD1_CLK);
	165	davinci_cfg_reg(DM355_SD1_DATA0);
	166	davinci_cfg_reg(DM355_SD1_DATA1);
	167	davinci_cfg_reg(DM355_SD1_DATA2);
	168	davinci_cfg_reg(DM355_SD1_DATA3);
	169	} else if (cpu_is_davinci_dm365()) {
	170	void __iomem *pupdctl1 =
	171	IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
	172
	173	/* Configure pull down control */
	174	__raw_writel((__raw_readl(pupdctl1) & ~0x400),
	175	pupdctl1);
	176
	177	mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
	178	mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
	179	SZ_4K - 1;
	180	mmcsd0_resources[2].start = IRQ_DM365_SDIOINT1;
	181	} else
2dbf56ae KH	182	break;
2dbf56ae KH	183
2dbf56ae KH	184	pdev = &davinci_mmcsd1_device;
	185	break;
	186	case 0:
	187	if (cpu_is_davinci_dm355()) {
	188	mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
	189	mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
	190	mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
	191
	192	/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
	193	davinci_cfg_reg(DM355_MMCSD0);
	194
	195	/* enable RX EDMA */
	196	davinci_cfg_reg(DM355_EVT26_MMC0_RX);
19ff3bf2 SP	197	} else if (cpu_is_davinci_dm365()) {
	198	mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
	199	mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
	200	SZ_4K - 1;
	201	mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
	202	} else if (cpu_is_davinci_dm644x()) {
2dbf56ae KH	203	/* REVISIT: should this be in board-init code? */
	204	void __iomem *base =
	205	IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
	206
	207	/* Power-on 3.3V IO cells */
	208	__raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
	209	/Set up the pull regiter for MMC /
	210	davinci_cfg_reg(DM644X_MSTK);
	211	}
	212
	213	pdev = &davinci_mmcsd0_device;
	214	break;
	215	}
	216
	217	if (WARN_ON(!pdev))
	218	return;
	219
	220	pdev->dev.platform_data = config;
	221	platform_device_register(pdev);
	222	}
	223
	224	#else
	225
	226	void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
	227	{
	228	}
	229
	230	#endif
	231
fb631387 KH	232	/-------------------------------------------------------------------------/
	233
	234	static struct resource wdt_resources[] = {
	235	{
5fcd294d KH	236	.start = DAVINCI_WDOG_BASE,
5fcd294d KH	237	.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
fb631387 KH	238	.flags = IORESOURCE_MEM,
	239	},
	240	};
	241
	242	struct platform_device davinci_wdt_device = {
	243	.name = "watchdog",
	244	.id = -1,
	245	.num_resources = ARRAY_SIZE(wdt_resources),
	246	.resource = wdt_resources,
	247	};
	248
	249	static void davinci_init_wdt(void)
	250	{
	251	platform_device_register(&davinci_wdt_device);
	252	}
	253
	254	/-------------------------------------------------------------------------/
	255
f64691b3 MG	256	struct davinci_timer_instance davinci_timer_instance[2] = {
	257	{
	258	.base = IO_ADDRESS(DAVINCI_TIMER0_BASE),
	259	.bottom_irq = IRQ_TINT0_TINT12,
	260	.top_irq = IRQ_TINT0_TINT34,
	261	},
	262	{
	263	.base = IO_ADDRESS(DAVINCI_TIMER1_BASE),
	264	.bottom_irq = IRQ_TINT1_TINT12,
	265	.top_irq = IRQ_TINT1_TINT34,
	266	},
	267	};
	268
	269	/-------------------------------------------------------------------------/
	270
fb631387 KH	271	static int __init davinci_init_devices(void)
	272	{
	273	/* please keep these calls, and their implementations above,
	274	* in alphabetical order so they're easier to sort through.
	275	*/
	276	davinci_init_wdt();
	277
	278	return 0;
	279	}
	280	arch_initcall(davinci_init_devices);
	281