[linux-2.6-block.git] / arch / arm / mach-davinci / board-dm355-evm.c

/*
 * TI DaVinci EVM board support
 *
 * Author: Kevin Hilman, Deep Root Systems, LLC
 *
 * 2007 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/clk.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>

#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>

#include <mach/hardware.h>
#include <mach/dm355.h>
#include <mach/psc.h>
#include <mach/common.h>
#include <mach/i2c.h>
#include <mach/serial.h>
#include <mach/nand.h>
#include <mach/mmc.h>

#define DAVINCI_ASYNC_EMIF_CONTROL_BASE		0x01e10000
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE	0x02000000

/* NOTE:  this is geared for the standard config, with a socketed
 * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
 * swap chips, maybe with a different block size, partitioning may
 * need to be changed.
 */
#define NAND_BLOCK_SIZE		SZ_128K

static struct mtd_partition davinci_nand_partitions[] = {
	{
		/* UBL (a few copies) plus U-Boot */
		.name		= "bootloader",
		.offset		= 0,
		.size		= 15 * NAND_BLOCK_SIZE,
		.mask_flags	= MTD_WRITEABLE, /* force read-only */
	}, {
		/* U-Boot environment */
		.name		= "params",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 1 * NAND_BLOCK_SIZE,
		.mask_flags	= 0,
	}, {
		.name		= "kernel",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_4M,
		.mask_flags	= 0,
	}, {
		.name		= "filesystem1",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_512M,
		.mask_flags	= 0,
	}, {
		.name		= "filesystem2",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	}
	/* two blocks with bad block table (and mirror) at the end */
};

static struct davinci_nand_pdata davinci_nand_data = {
	.mask_chipsel		= BIT(14),
	.parts			= davinci_nand_partitions,
	.nr_parts		= ARRAY_SIZE(davinci_nand_partitions),
	.ecc_mode		= NAND_ECC_HW_SYNDROME,
	.options		= NAND_USE_FLASH_BBT,
};

static struct resource davinci_nand_resources[] = {
	{
		.start		= DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
		.end		= DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
		.flags		= IORESOURCE_MEM,
	}, {
		.start		= DAVINCI_ASYNC_EMIF_CONTROL_BASE,
		.end		= DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device davinci_nand_device = {
	.name			= "davinci_nand",
	.id			= 0,

	.num_resources		= ARRAY_SIZE(davinci_nand_resources),
	.resource		= davinci_nand_resources,

	.dev			= {
		.platform_data	= &davinci_nand_data,
	},
};

static struct davinci_i2c_platform_data i2c_pdata = {
	.bus_freq	= 400	/* kHz */,
	.bus_delay	= 0	/* usec */,
};

static int dm355evm_mmc_gpios = -EINVAL;

static void dm355evm_mmcsd_gpios(unsigned gpio)
{
	gpio_request(gpio + 0, "mmc0_ro");
	gpio_request(gpio + 1, "mmc0_cd");
	gpio_request(gpio + 2, "mmc1_ro");
	gpio_request(gpio + 3, "mmc1_cd");

	/* we "know" these are input-only so we don't
	 * need to call gpio_direction_input()
	 */

	dm355evm_mmc_gpios = gpio;
}

static struct i2c_board_info dm355evm_i2c_info[] = {
	{ I2C_BOARD_INFO("dm355evm_msp", 0x25),
		.platform_data = dm355evm_mmcsd_gpios,
		/* plus irq */ },
	/* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
	/* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
};

static void __init evm_init_i2c(void)
{
	davinci_init_i2c(&i2c_pdata);

	gpio_request(5, "dm355evm_msp");
	gpio_direction_input(5);
	dm355evm_i2c_info[0].irq = gpio_to_irq(5);

	i2c_register_board_info(1, dm355evm_i2c_info,
			ARRAY_SIZE(dm355evm_i2c_info));
}

static struct resource dm355evm_dm9000_rsrc[] = {
	{
		/* addr */
		.start	= 0x04014000,
		.end	= 0x04014001,
		.flags	= IORESOURCE_MEM,
	}, {
		/* data */
		.start	= 0x04014002,
		.end	= 0x04014003,
		.flags	= IORESOURCE_MEM,
	}, {
		.flags	= IORESOURCE_IRQ
			| IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
	},
};

static struct platform_device dm355evm_dm9000 = {
	.name		= "dm9000",
	.id		= -1,
	.resource	= dm355evm_dm9000_rsrc,
	.num_resources	= ARRAY_SIZE(dm355evm_dm9000_rsrc),
};

static struct platform_device *davinci_evm_devices[] __initdata = {
	&dm355evm_dm9000,
	&davinci_nand_device,
};

static struct davinci_uart_config uart_config __initdata = {
	.enabled_uarts = (1 << 0),
};

static void __init dm355_evm_map_io(void)
{
	davinci_map_common_io();
	dm355_init();
}

static int dm355evm_mmc_get_cd(int module)
{
	if (!gpio_is_valid(dm355evm_mmc_gpios))
		return -ENXIO;
	/* low == card present */
	return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1);
}

static int dm355evm_mmc_get_ro(int module)
{
	if (!gpio_is_valid(dm355evm_mmc_gpios))
		return -ENXIO;
	/* high == card's write protect switch active */
	return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0);
}

static struct davinci_mmc_config dm355evm_mmc_config = {
	.get_cd		= dm355evm_mmc_get_cd,
	.get_ro		= dm355evm_mmc_get_ro,
	.wires		= 4,
	.max_freq       = 50000000,
	.caps           = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
	.version	= MMC_CTLR_VERSION_1,
};

/* Don't connect anything to J10 unless you're only using USB host
 * mode *and* have to do so with some kind of gender-bender.  If
 * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
 * the ID pin won't need any help.
 */
#ifdef CONFIG_USB_MUSB_PERIPHERAL
#define USB_ID_VALUE	0	/* ID pulled high; *should* float */
#else
#define USB_ID_VALUE	1	/* ID pulled low */
#endif

static struct spi_eeprom at25640a = {
	.byte_len	= SZ_64K / 8,
	.name		= "at25640a",
	.page_size	= 32,
	.flags		= EE_ADDR2,
};

static struct spi_board_info dm355_evm_spi_info[] __initconst = {
	{
		.modalias	= "at25",
		.platform_data	= &at25640a,
		.max_speed_hz	= 10 * 1000 * 1000,	/* at 3v3 */
		.bus_num	= 0,
		.chip_select	= 0,
		.mode		= SPI_MODE_0,
	},
};

static __init void dm355_evm_init(void)
{
	struct clk *aemif;

	gpio_request(1, "dm9000");
	gpio_direction_input(1);
	dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);

	aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
	if (IS_ERR(aemif))
		WARN("%s: unable to get AEMIF clock\n", __func__);
	else
		clk_enable(aemif);

	platform_add_devices(davinci_evm_devices,
			     ARRAY_SIZE(davinci_evm_devices));
	evm_init_i2c();
	davinci_serial_init(&uart_config);

	/* NOTE:  NAND flash timings set by the UBL are slower than
	 * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
	 * but could be 0x0400008c for about 25% faster page reads.
	 */

	gpio_request(2, "usb_id_toggle");
	gpio_direction_output(2, USB_ID_VALUE);
	/* irlml6401 switches over 1A in under 8 msec */
	setup_usb(500, 8);

	davinci_setup_mmc(0, &dm355evm_mmc_config);
	davinci_setup_mmc(1, &dm355evm_mmc_config);

	dm355_init_spi0(BIT(0), dm355_evm_spi_info,
			ARRAY_SIZE(dm355_evm_spi_info));
}

static __init void dm355_evm_irq_init(void)
{
	davinci_irq_init();
}

MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
	.phys_io      = IO_PHYS,
	.io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params  = (0x80000100),
	.map_io	      = dm355_evm_map_io,
	.init_irq     = dm355_evm_irq_init,
	.timer	      = &davinci_timer,
	.init_machine = dm355_evm_init,
MACHINE_END
Commit	Line	Data
95a3477f KH	1	/*
	2	* TI DaVinci EVM board support
	3	*
	4	* Author: Kevin Hilman, Deep Root Systems, LLC
	5	*
	6	* 2007 (c) MontaVista Software, Inc. This file is licensed under
	7	* the terms of the GNU General Public License version 2. This program
	8	* is licensed "as is" without any warranty of any kind, whether express
	9	* or implied.
	10	*/
	11	#include <linux/kernel.h>
	12	#include <linux/module.h>
	13	#include <linux/init.h>
	14	#include <linux/dma-mapping.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/mtd/mtd.h>
	17	#include <linux/mtd/partitions.h>
	18	#include <linux/mtd/nand.h>
	19	#include <linux/i2c.h>
	20	#include <linux/io.h>
	21	#include <linux/gpio.h>
	22	#include <linux/clk.h>
	23	#include <linux/spi/spi.h>
	24	#include <linux/spi/eeprom.h>
	25
	26	#include <asm/setup.h>
	27	#include <asm/mach-types.h>
	28	#include <asm/mach/arch.h>
	29	#include <asm/mach/map.h>
	30	#include <asm/mach/flash.h>
	31
	32	#include <mach/hardware.h>
	33	#include <mach/dm355.h>
	34	#include <mach/psc.h>
	35	#include <mach/common.h>
	36	#include <mach/i2c.h>
	37	#include <mach/serial.h>
	38	#include <mach/nand.h>
2dbf56ae	39	#include <mach/mmc.h>
95a3477f KH	40
	41	#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e10000
	42	#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
	43
	44	/* NOTE: this is geared for the standard config, with a socketed
	45	* 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
	46	* swap chips, maybe with a different block size, partitioning may
	47	* need to be changed.
	48	*/
	49	#define NAND_BLOCK_SIZE SZ_128K
	50
	51	static struct mtd_partition davinci_nand_partitions[] = {
	52	{
	53	/* UBL (a few copies) plus U-Boot */
	54	.name = "bootloader",
	55	.offset = 0,
	56	.size = 15 * NAND_BLOCK_SIZE,
	57	.mask_flags = MTD_WRITEABLE, /* force read-only */
	58	}, {
	59	/* U-Boot environment */
	60	.name = "params",
	61	.offset = MTDPART_OFS_APPEND,
	62	.size = 1 * NAND_BLOCK_SIZE,
	63	.mask_flags = 0,
	64	}, {
	65	.name = "kernel",
	66	.offset = MTDPART_OFS_APPEND,
	67	.size = SZ_4M,
	68	.mask_flags = 0,
	69	}, {
	70	.name = "filesystem1",
	71	.offset = MTDPART_OFS_APPEND,
	72	.size = SZ_512M,
	73	.mask_flags = 0,
	74	}, {
	75	.name = "filesystem2",
	76	.offset = MTDPART_OFS_APPEND,
	77	.size = MTDPART_SIZ_FULL,
	78	.mask_flags = 0,
	79	}
	80	/* two blocks with bad block table (and mirror) at the end */
	81	};
	82
	83	static struct davinci_nand_pdata davinci_nand_data = {
	84	.mask_chipsel = BIT(14),
	85	.parts = davinci_nand_partitions,
	86	.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
	87	.ecc_mode = NAND_ECC_HW_SYNDROME,
	88	.options = NAND_USE_FLASH_BBT,
	89	};
	90
	91	static struct resource davinci_nand_resources[] = {
	92	{
	93	.start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
	94	.end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
	95	.flags = IORESOURCE_MEM,
	96	}, {
	97	.start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
	98	.end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
	99	.flags = IORESOURCE_MEM,
	100	},
	101	};
	102
	103	static struct platform_device davinci_nand_device = {
104	.name = "davinci_nand",
105	.id = 0,
106
107	.num_resources = ARRAY_SIZE(davinci_nand_resources),
108	.resource = davinci_nand_resources,
109
110	.dev = {
111	.platform_data = &davinci_nand_data,
112	},
113	};
114
115	static struct davinci_i2c_platform_data i2c_pdata = {
116	.bus_freq = 400 /* kHz */,
117	.bus_delay = 0 /* usec */,
118	};
119
120	static int dm355evm_mmc_gpios = -EINVAL;
121
122	static void dm355evm_mmcsd_gpios(unsigned gpio)
123	{
124	gpio_request(gpio + 0, "mmc0_ro");
125	gpio_request(gpio + 1, "mmc0_cd");
126	gpio_request(gpio + 2, "mmc1_ro");
127	gpio_request(gpio + 3, "mmc1_cd");
128
129	/* we "know" these are input-only so we don't
130	* need to call gpio_direction_input()
131	*/
132
133	dm355evm_mmc_gpios = gpio;
134	}
135
136	static struct i2c_board_info dm355evm_i2c_info[] = {
137	{ I2C_BOARD_INFO("dm355evm_msp", 0x25),
138	.platform_data = dm355evm_mmcsd_gpios,
139	/* plus irq */ },
140	/* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
141	/* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
142	};
143
144	static void __init evm_init_i2c(void)
145	{
146	davinci_init_i2c(&i2c_pdata);
147
148	gpio_request(5, "dm355evm_msp");
149	gpio_direction_input(5);
150	dm355evm_i2c_info[0].irq = gpio_to_irq(5);
151
152	i2c_register_board_info(1, dm355evm_i2c_info,
153	ARRAY_SIZE(dm355evm_i2c_info));
154	}
155
156	static struct resource dm355evm_dm9000_rsrc[] = {
157	{
158	/* addr */
159	.start = 0x04014000,
160	.end = 0x04014001,
161	.flags = IORESOURCE_MEM,
162	}, {
163	/* data */
164	.start = 0x04014002,
165	.end = 0x04014003,
166	.flags = IORESOURCE_MEM,
167	}, {
168	.flags = IORESOURCE_IRQ
169	\| IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
170	},
171	};
172
173	static struct platform_device dm355evm_dm9000 = {
174	.name = "dm9000",
175	.id = -1,
176	.resource = dm355evm_dm9000_rsrc,
177	.num_resources = ARRAY_SIZE(dm355evm_dm9000_rsrc),
178	};
179
180	static struct platform_device *davinci_evm_devices[] __initdata = {
181	&dm355evm_dm9000,
182	&davinci_nand_device,
183	};
184
185	static struct davinci_uart_config uart_config __initdata = {
186	.enabled_uarts = (1 << 0),
187	};
188
189	static void __init dm355_evm_map_io(void)
190	{
191	davinci_map_common_io();
192	dm355_init();
193	}
194
2dbf56ae KH	195	static int dm355evm_mmc_get_cd(int module)
	196	{
	197	if (!gpio_is_valid(dm355evm_mmc_gpios))
	198	return -ENXIO;
	199	/* low == card present */
	200	return !gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 1);
	201	}
	202
	203	static int dm355evm_mmc_get_ro(int module)
	204	{
	205	if (!gpio_is_valid(dm355evm_mmc_gpios))
	206	return -ENXIO;
	207	/* high == card's write protect switch active */
	208	return gpio_get_value_cansleep(dm355evm_mmc_gpios + 2 * module + 0);
	209	}
	210
	211	static struct davinci_mmc_config dm355evm_mmc_config = {
	212	.get_cd = dm355evm_mmc_get_cd,
	213	.get_ro = dm355evm_mmc_get_ro,
	214	.wires = 4,
	215	.max_freq = 50000000,
	216	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
	217	.version = MMC_CTLR_VERSION_1,
	218	};
	219
95a3477f KH	220	/* Don't connect anything to J10 unless you're only using USB host
	221	* mode and have to do so with some kind of gender-bender. If
	222	* you have proper Mini-B or Mini-A cables (or Mini-A adapters)
	223	* the ID pin won't need any help.
	224	*/
	225	#ifdef CONFIG_USB_MUSB_PERIPHERAL
	226	#define USB_ID_VALUE 0 /* ID pulled high; should float */
	227	#else
	228	#define USB_ID_VALUE 1 /* ID pulled low */
	229	#endif
	230
	231	static struct spi_eeprom at25640a = {
	232	.byte_len = SZ_64K / 8,
	233	.name = "at25640a",
	234	.page_size = 32,
	235	.flags = EE_ADDR2,
	236	};
	237
	238	static struct spi_board_info dm355_evm_spi_info[] __initconst = {
	239	{
	240	.modalias = "at25",
	241	.platform_data = &at25640a,
	242	.max_speed_hz = 10 * 1000 * 1000, /* at 3v3 */
	243	.bus_num = 0,
	244	.chip_select = 0,
	245	.mode = SPI_MODE_0,
	246	},
	247	};
	248
	249	static __init void dm355_evm_init(void)
	250	{
	251	struct clk *aemif;
	252
	253	gpio_request(1, "dm9000");
	254	gpio_direction_input(1);
	255	dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);
	256
	257	aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
	258	if (IS_ERR(aemif))
	259	WARN("%s: unable to get AEMIF clock\n", __func__);
	260	else
	261	clk_enable(aemif);
	262
	263	platform_add_devices(davinci_evm_devices,
	264	ARRAY_SIZE(davinci_evm_devices));
	265	evm_init_i2c();
	266	davinci_serial_init(&uart_config);
	267
	268	/* NOTE: NAND flash timings set by the UBL are slower than
	269	* needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
	270	* but could be 0x0400008c for about 25% faster page reads.
	271	*/
	272
	273	gpio_request(2, "usb_id_toggle");
	274	gpio_direction_output(2, USB_ID_VALUE);
	275	/* irlml6401 switches over 1A in under 8 msec */
	276	setup_usb(500, 8);
	277
2dbf56ae KH	278	davinci_setup_mmc(0, &dm355evm_mmc_config);
	279	davinci_setup_mmc(1, &dm355evm_mmc_config);
	280
95a3477f KH	281	dm355_init_spi0(BIT(0), dm355_evm_spi_info,
	282	ARRAY_SIZE(dm355_evm_spi_info));
	283	}
	284
	285	static __init void dm355_evm_irq_init(void)
	286	{
	287	davinci_irq_init();
	288	}
	289
	290	MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
	291	.phys_io = IO_PHYS,
	292	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	293	.boot_params = (0x80000100),
	294	.map_io = dm355_evm_map_io,
	295	.init_irq = dm355_evm_irq_init,
	296	.timer = &davinci_timer,
	297	.init_machine = dm355_evm_init,
	298	MACHINE_END