Commit | Line | Data |
---|---|---|
907d6deb | 1 | /* |
9d041268 | 2 | * arch/arm/mach-at91/pm.c |
907d6deb AV |
3 | * AT91 Power Management |
4 | * | |
5 | * Copyright (C) 2005 David Brownell | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | ||
2f8163ba | 13 | #include <linux/gpio.h> |
95d9ffbe | 14 | #include <linux/suspend.h> |
907d6deb AV |
15 | #include <linux/sched.h> |
16 | #include <linux/proc_fs.h> | |
907d6deb AV |
17 | #include <linux/interrupt.h> |
18 | #include <linux/sysfs.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/platform_device.h> | |
fced80c7 | 21 | #include <linux/io.h> |
907d6deb | 22 | |
907d6deb | 23 | #include <asm/irq.h> |
60063497 | 24 | #include <linux/atomic.h> |
907d6deb AV |
25 | #include <asm/mach/time.h> |
26 | #include <asm/mach/irq.h> | |
907d6deb | 27 | |
a09e64fb | 28 | #include <mach/at91_pmc.h> |
a09e64fb | 29 | #include <mach/cpu.h> |
907d6deb | 30 | |
a510b9ba | 31 | #include "at91_aic.h" |
907d6deb | 32 | #include "generic.h" |
1ea60cf7 | 33 | #include "pm.h" |
907d6deb | 34 | |
565ac445 AV |
35 | /* |
36 | * Show the reason for the previous system reset. | |
37 | */ | |
565ac445 | 38 | |
f0995d08 | 39 | #include "at91_rstc.h" |
176bdd2c | 40 | #include "at91_shdwc.h" |
565ac445 AV |
41 | |
42 | static void __init show_reset_status(void) | |
43 | { | |
44 | static char reset[] __initdata = "reset"; | |
45 | ||
46 | static char general[] __initdata = "general"; | |
47 | static char wakeup[] __initdata = "wakeup"; | |
48 | static char watchdog[] __initdata = "watchdog"; | |
49 | static char software[] __initdata = "software"; | |
50 | static char user[] __initdata = "user"; | |
51 | static char unknown[] __initdata = "unknown"; | |
52 | ||
53 | static char signal[] __initdata = "signal"; | |
54 | static char rtc[] __initdata = "rtc"; | |
55 | static char rtt[] __initdata = "rtt"; | |
56 | static char restore[] __initdata = "power-restored"; | |
57 | ||
58 | char *reason, *r2 = reset; | |
59 | u32 reset_type, wake_type; | |
60 | ||
e9f68b5c | 61 | if (!at91_shdwc_base || !at91_rstc_base) |
f22deee5 JCPV |
62 | return; |
63 | ||
e9f68b5c | 64 | reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; |
f22deee5 | 65 | wake_type = at91_shdwc_read(AT91_SHDW_SR); |
565ac445 AV |
66 | |
67 | switch (reset_type) { | |
68 | case AT91_RSTC_RSTTYP_GENERAL: | |
69 | reason = general; | |
70 | break; | |
71 | case AT91_RSTC_RSTTYP_WAKEUP: | |
72 | /* board-specific code enabled the wakeup sources */ | |
73 | reason = wakeup; | |
74 | ||
75 | /* "wakeup signal" */ | |
76 | if (wake_type & AT91_SHDW_WAKEUP0) | |
77 | r2 = signal; | |
78 | else { | |
79 | r2 = reason; | |
80 | if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */ | |
81 | reason = rtt; | |
82 | else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */ | |
83 | reason = rtc; | |
84 | else if (wake_type == 0) /* power-restored wakeup */ | |
85 | reason = restore; | |
86 | else /* unknown wakeup */ | |
87 | reason = unknown; | |
88 | } | |
89 | break; | |
90 | case AT91_RSTC_RSTTYP_WATCHDOG: | |
91 | reason = watchdog; | |
92 | break; | |
93 | case AT91_RSTC_RSTTYP_SOFTWARE: | |
94 | reason = software; | |
95 | break; | |
96 | case AT91_RSTC_RSTTYP_USER: | |
97 | reason = user; | |
98 | break; | |
99 | default: | |
100 | reason = unknown; | |
101 | break; | |
102 | } | |
103 | pr_info("AT91: Starting after %s %s\n", reason, r2); | |
104 | } | |
565ac445 | 105 | |
907d6deb AV |
106 | static int at91_pm_valid_state(suspend_state_t state) |
107 | { | |
108 | switch (state) { | |
109 | case PM_SUSPEND_ON: | |
110 | case PM_SUSPEND_STANDBY: | |
111 | case PM_SUSPEND_MEM: | |
112 | return 1; | |
113 | ||
114 | default: | |
115 | return 0; | |
116 | } | |
117 | } | |
118 | ||
119 | ||
120 | static suspend_state_t target_state; | |
121 | ||
122 | /* | |
123 | * Called after processes are frozen, but before we shutdown devices. | |
124 | */ | |
c697eece | 125 | static int at91_pm_begin(suspend_state_t state) |
907d6deb AV |
126 | { |
127 | target_state = state; | |
128 | return 0; | |
129 | } | |
130 | ||
131 | /* | |
132 | * Verify that all the clocks are correct before entering | |
133 | * slow-clock mode. | |
134 | */ | |
135 | static int at91_pm_verify_clocks(void) | |
136 | { | |
137 | unsigned long scsr; | |
138 | int i; | |
139 | ||
b5514952 | 140 | scsr = at91_pmc_read(AT91_PMC_SCSR); |
907d6deb AV |
141 | |
142 | /* USB must not be using PLLB */ | |
d481f864 AV |
143 | if (cpu_is_at91rm9200()) { |
144 | if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { | |
7f96b1ca | 145 | pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); |
d481f864 AV |
146 | return 0; |
147 | } | |
b319ff80 NF |
148 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() |
149 | || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) { | |
b6b27ae5 | 150 | if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { |
7f96b1ca | 151 | pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); |
b6b27ae5 AV |
152 | return 0; |
153 | } | |
907d6deb AV |
154 | } |
155 | ||
9e0e4e11 AB |
156 | if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS)) |
157 | return 1; | |
158 | ||
907d6deb AV |
159 | /* PCK0..PCK3 must be disabled, or configured to use clk32k */ |
160 | for (i = 0; i < 4; i++) { | |
161 | u32 css; | |
162 | ||
163 | if ((scsr & (AT91_PMC_PCK0 << i)) == 0) | |
164 | continue; | |
165 | ||
b5514952 | 166 | css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; |
907d6deb | 167 | if (css != AT91_PMC_CSS_SLOW) { |
7f96b1ca | 168 | pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); |
907d6deb AV |
169 | return 0; |
170 | } | |
171 | } | |
907d6deb AV |
172 | |
173 | return 1; | |
174 | } | |
175 | ||
176 | /* | |
177 | * Call this from platform driver suspend() to see how deeply to suspend. | |
178 | * For example, some controllers (like OHCI) need one of the PLL clocks | |
179 | * in order to act as a wakeup source, and those are not available when | |
180 | * going into slow clock mode. | |
181 | * | |
182 | * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have | |
183 | * the very same problem (but not using at91 main_clk), and it'd be better | |
184 | * to add one generic API rather than lots of platform-specific ones. | |
185 | */ | |
186 | int at91_suspend_entering_slow_clock(void) | |
187 | { | |
188 | return (target_state == PM_SUSPEND_MEM); | |
189 | } | |
190 | EXPORT_SYMBOL(at91_suspend_entering_slow_clock); | |
191 | ||
192 | ||
fb7e197b JCPV |
193 | static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, |
194 | void __iomem *ramc1, int memctrl); | |
907d6deb | 195 | |
f5d0f457 | 196 | #ifdef CONFIG_AT91_SLOW_CLOCK |
fb7e197b JCPV |
197 | extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, |
198 | void __iomem *ramc1, int memctrl); | |
f5d0f457 AV |
199 | extern u32 at91_slow_clock_sz; |
200 | #endif | |
201 | ||
907d6deb AV |
202 | static int at91_pm_enter(suspend_state_t state) |
203 | { | |
647f8d94 LD |
204 | if (of_have_populated_dt()) |
205 | at91_pinctrl_gpio_suspend(); | |
206 | else | |
207 | at91_gpio_suspend(); | |
907d6deb AV |
208 | at91_irq_suspend(); |
209 | ||
210 | pr_debug("AT91: PM - wake mask %08x, pm state %d\n", | |
211 | /* remember all the always-wake irqs */ | |
b5514952 | 212 | (at91_pmc_read(AT91_PMC_PCSR) |
907d6deb AV |
213 | | (1 << AT91_ID_FIQ) |
214 | | (1 << AT91_ID_SYS) | |
1f4fd0a0 | 215 | | (at91_extern_irq)) |
be6d4321 | 216 | & at91_aic_read(AT91_AIC_IMR), |
907d6deb AV |
217 | state); |
218 | ||
219 | switch (state) { | |
220 | /* | |
221 | * Suspend-to-RAM is like STANDBY plus slow clock mode, so | |
222 | * drivers must suspend more deeply: only the master clock | |
223 | * controller may be using the main oscillator. | |
224 | */ | |
225 | case PM_SUSPEND_MEM: | |
226 | /* | |
227 | * Ensure that clocks are in a valid state. | |
228 | */ | |
229 | if (!at91_pm_verify_clocks()) | |
230 | goto error; | |
231 | ||
232 | /* | |
233 | * Enter slow clock mode by switching over to clk32k and | |
234 | * turning off the main oscillator; reverse on wakeup. | |
235 | */ | |
236 | if (slow_clock) { | |
fb7e197b JCPV |
237 | int memctrl = AT91_MEMCTRL_SDRAMC; |
238 | ||
239 | if (cpu_is_at91rm9200()) | |
240 | memctrl = AT91_MEMCTRL_MC; | |
241 | else if (cpu_is_at91sam9g45()) | |
242 | memctrl = AT91_MEMCTRL_DDRSDR; | |
f5d0f457 AV |
243 | #ifdef CONFIG_AT91_SLOW_CLOCK |
244 | /* copy slow_clock handler to SRAM, and call it */ | |
245 | memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); | |
246 | #endif | |
fb7e197b JCPV |
247 | slow_clock(at91_pmc_base, at91_ramc_base[0], |
248 | at91_ramc_base[1], memctrl); | |
907d6deb AV |
249 | break; |
250 | } else { | |
f5d0f457 | 251 | pr_info("AT91: PM - no slow clock mode enabled ...\n"); |
907d6deb AV |
252 | /* FALLTHROUGH leaving master clock alone */ |
253 | } | |
254 | ||
255 | /* | |
256 | * STANDBY mode has *all* drivers suspended; ignores irqs not | |
257 | * marked as 'wakeup' event sources; and reduces DRAM power. | |
258 | * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and | |
259 | * nothing fancy done with main or cpu clocks. | |
260 | */ | |
261 | case PM_SUSPEND_STANDBY: | |
262 | /* | |
263 | * NOTE: the Wait-for-Interrupt instruction needs to be | |
f5d0f457 AV |
264 | * in icache so no SDRAM accesses are needed until the |
265 | * wakeup IRQ occurs and self-refresh is terminated. | |
8aeeda82 NF |
266 | * For ARM 926 based chips, this requirement is weaker |
267 | * as at91sam9 can access a RAM in self-refresh mode. | |
907d6deb | 268 | */ |
efd09165 JCPV |
269 | if (cpu_is_at91rm9200()) |
270 | at91rm9200_standby(); | |
271 | else if (cpu_is_at91sam9g45()) | |
272 | at91sam9g45_standby(); | |
273 | else | |
274 | at91sam9_standby(); | |
f5d0f457 | 275 | break; |
907d6deb AV |
276 | |
277 | case PM_SUSPEND_ON: | |
8aeeda82 | 278 | cpu_do_idle(); |
907d6deb AV |
279 | break; |
280 | ||
281 | default: | |
282 | pr_debug("AT91: PM - bogus suspend state %d\n", state); | |
283 | goto error; | |
284 | } | |
285 | ||
286 | pr_debug("AT91: PM - wakeup %08x\n", | |
be6d4321 | 287 | at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR)); |
907d6deb AV |
288 | |
289 | error: | |
290 | target_state = PM_SUSPEND_ON; | |
291 | at91_irq_resume(); | |
647f8d94 LD |
292 | if (of_have_populated_dt()) |
293 | at91_pinctrl_gpio_resume(); | |
294 | else | |
295 | at91_gpio_resume(); | |
907d6deb AV |
296 | return 0; |
297 | } | |
298 | ||
c697eece RW |
299 | /* |
300 | * Called right prior to thawing processes. | |
301 | */ | |
302 | static void at91_pm_end(void) | |
303 | { | |
304 | target_state = PM_SUSPEND_ON; | |
305 | } | |
306 | ||
907d6deb | 307 | |
2f55ac07 | 308 | static const struct platform_suspend_ops at91_pm_ops = { |
c697eece RW |
309 | .valid = at91_pm_valid_state, |
310 | .begin = at91_pm_begin, | |
311 | .enter = at91_pm_enter, | |
312 | .end = at91_pm_end, | |
907d6deb AV |
313 | }; |
314 | ||
315 | static int __init at91_pm_init(void) | |
316 | { | |
f5d0f457 AV |
317 | #ifdef CONFIG_AT91_SLOW_CLOCK |
318 | slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz); | |
907d6deb AV |
319 | #endif |
320 | ||
f5d0f457 AV |
321 | pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); |
322 | ||
f5d0f457 | 323 | /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ |
efd09165 JCPV |
324 | if (cpu_is_at91rm9200()) |
325 | at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); | |
907d6deb | 326 | |
26398a70 | 327 | suspend_set_ops(&at91_pm_ops); |
907d6deb | 328 | |
565ac445 | 329 | show_reset_status(); |
907d6deb AV |
330 | return 0; |
331 | } | |
332 | arch_initcall(at91_pm_init); |