[linux-2.6-block.git] / arch / arm / kvm / psci.c

/*
 * Copyright (C) 2012 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/preempt.h>
#include <linux/kvm_host.h>
#include <linux/wait.h>

#include <asm/cputype.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_psci.h>

/*
 * This is an implementation of the Power State Coordination Interface
 * as described in ARM document number ARM DEN 0022A.
 */

#define AFFINITY_MASK(level)	~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)

static unsigned long psci_affinity_mask(unsigned long affinity_level)
{
	if (affinity_level <= 3)
		return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);

	return 0;
}

static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
{
	/*
	 * NOTE: For simplicity, we make VCPU suspend emulation to be
	 * same-as WFI (Wait-for-interrupt) emulation.
	 *
	 * This means for KVM the wakeup events are interrupts and
	 * this is consistent with intended use of StateID as described
	 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
	 *
	 * Further, we also treat power-down request to be same as
	 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
	 * specification (ARM DEN 0022A). This means all suspend states
	 * for KVM will preserve the register state.
	 */
	kvm_vcpu_block(vcpu);

	return PSCI_RET_SUCCESS;
}

static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
{
	vcpu->arch.pause = true;
}

static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
{
	struct kvm *kvm = source_vcpu->kvm;
	struct kvm_vcpu *vcpu = NULL, *tmp;
	wait_queue_head_t *wq;
	unsigned long cpu_id;
	unsigned long context_id;
	unsigned long mpidr;
	phys_addr_t target_pc;
	int i;

	cpu_id = *vcpu_reg(source_vcpu, 1);
	if (vcpu_mode_is_32bit(source_vcpu))
		cpu_id &= ~((u32) 0);

	kvm_for_each_vcpu(i, tmp, kvm) {
		mpidr = kvm_vcpu_get_mpidr(tmp);
		if ((mpidr & MPIDR_HWID_BITMASK) == (cpu_id & MPIDR_HWID_BITMASK)) {
			vcpu = tmp;
			break;
		}
	}

	/*
	 * Make sure the caller requested a valid CPU and that the CPU is
	 * turned off.
	 */
	if (!vcpu)
		return PSCI_RET_INVALID_PARAMS;
	if (!vcpu->arch.pause) {
		if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
			return PSCI_RET_ALREADY_ON;
		else
			return PSCI_RET_INVALID_PARAMS;
	}

	target_pc = *vcpu_reg(source_vcpu, 2);
	context_id = *vcpu_reg(source_vcpu, 3);

	kvm_reset_vcpu(vcpu);

	/* Gracefully handle Thumb2 entry point */
	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
		target_pc &= ~((phys_addr_t) 1);
		vcpu_set_thumb(vcpu);
	}

	/* Propagate caller endianness */
	if (kvm_vcpu_is_be(source_vcpu))
		kvm_vcpu_set_be(vcpu);

	*vcpu_pc(vcpu) = target_pc;
	/*
	 * NOTE: We always update r0 (or x0) because for PSCI v0.1
	 * the general puspose registers are undefined upon CPU_ON.
	 */
	*vcpu_reg(vcpu, 0) = context_id;
	vcpu->arch.pause = false;
	smp_mb();		/* Make sure the above is visible */

	wq = kvm_arch_vcpu_wq(vcpu);
	wake_up_interruptible(wq);

	return PSCI_RET_SUCCESS;
}

static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
{
	int i;
	unsigned long mpidr;
	unsigned long target_affinity;
	unsigned long target_affinity_mask;
	unsigned long lowest_affinity_level;
	struct kvm *kvm = vcpu->kvm;
	struct kvm_vcpu *tmp;

	target_affinity = *vcpu_reg(vcpu, 1);
	lowest_affinity_level = *vcpu_reg(vcpu, 2);

	/* Determine target affinity mask */
	target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
	if (!target_affinity_mask)
		return PSCI_RET_INVALID_PARAMS;

	/* Ignore other bits of target affinity */
	target_affinity &= target_affinity_mask;

	/*
	 * If one or more VCPU matching target affinity are running
	 * then ON else OFF
	 */
	kvm_for_each_vcpu(i, tmp, kvm) {
		mpidr = kvm_vcpu_get_mpidr(tmp);
		if (((mpidr & target_affinity_mask) == target_affinity) &&
		    !tmp->arch.pause) {
			return PSCI_0_2_AFFINITY_LEVEL_ON;
		}
	}

	return PSCI_0_2_AFFINITY_LEVEL_OFF;
}

static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
{
	int i;
	struct kvm_vcpu *tmp;

	/*
	 * The KVM ABI specifies that a system event exit may call KVM_RUN
	 * again and may perform shutdown/reboot at a later time that when the
	 * actual request is made.  Since we are implementing PSCI and a
	 * caller of PSCI reboot and shutdown expects that the system shuts
	 * down or reboots immediately, let's make sure that VCPUs are not run
	 * after this call is handled and before the VCPUs have been
	 * re-initialized.
	 */
	kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
		tmp->arch.pause = true;
		kvm_vcpu_kick(tmp);
	}

	memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
	vcpu->run->system_event.type = type;
	vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
}

static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
{
	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
}

static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
{
	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
}

int kvm_psci_version(struct kvm_vcpu *vcpu)
{
	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
		return KVM_ARM_PSCI_0_2;

	return KVM_ARM_PSCI_0_1;
}

static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
{
	int ret = 1;
	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	unsigned long val;

	switch (psci_fn) {
	case PSCI_0_2_FN_PSCI_VERSION:
		/*
		 * Bits[31:16] = Major Version = 0
		 * Bits[15:0] = Minor Version = 2
		 */
		val = 2;
		break;
	case PSCI_0_2_FN_CPU_SUSPEND:
	case PSCI_0_2_FN64_CPU_SUSPEND:
		val = kvm_psci_vcpu_suspend(vcpu);
		break;
	case PSCI_0_2_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case PSCI_0_2_FN_CPU_ON:
	case PSCI_0_2_FN64_CPU_ON:
		val = kvm_psci_vcpu_on(vcpu);
		break;
	case PSCI_0_2_FN_AFFINITY_INFO:
	case PSCI_0_2_FN64_AFFINITY_INFO:
		val = kvm_psci_vcpu_affinity_info(vcpu);
		break;
	case PSCI_0_2_FN_MIGRATE:
	case PSCI_0_2_FN64_MIGRATE:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
		/*
		 * Trusted OS is MP hence does not require migration
	         * or
		 * Trusted OS is not present
		 */
		val = PSCI_0_2_TOS_MP;
		break;
	case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
	case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	case PSCI_0_2_FN_SYSTEM_OFF:
		kvm_psci_system_off(vcpu);
		/*
		 * We should'nt be going back to guest VCPU after
		 * receiving SYSTEM_OFF request.
		 *
		 * If user space accidently/deliberately resumes
		 * guest VCPU after SYSTEM_OFF request then guest
		 * VCPU should see internal failure from PSCI return
		 * value. To achieve this, we preload r0 (or x0) with
		 * PSCI return value INTERNAL_FAILURE.
		 */
		val = PSCI_RET_INTERNAL_FAILURE;
		ret = 0;
		break;
	case PSCI_0_2_FN_SYSTEM_RESET:
		kvm_psci_system_reset(vcpu);
		/*
		 * Same reason as SYSTEM_OFF for preloading r0 (or x0)
		 * with PSCI return value INTERNAL_FAILURE.
		 */
		val = PSCI_RET_INTERNAL_FAILURE;
		ret = 0;
		break;
	default:
		return -EINVAL;
	}

	*vcpu_reg(vcpu, 0) = val;
	return ret;
}

static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
{
	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	unsigned long val;

	switch (psci_fn) {
	case KVM_PSCI_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case KVM_PSCI_FN_CPU_ON:
		val = kvm_psci_vcpu_on(vcpu);
		break;
	case KVM_PSCI_FN_CPU_SUSPEND:
	case KVM_PSCI_FN_MIGRATE:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	default:
		return -EINVAL;
	}

	*vcpu_reg(vcpu, 0) = val;
	return 1;
}

/**
 * kvm_psci_call - handle PSCI call if r0 value is in range
 * @vcpu: Pointer to the VCPU struct
 *
 * Handle PSCI calls from guests through traps from HVC instructions.
 * The calling convention is similar to SMC calls to the secure world
 * where the function number is placed in r0.
 *
 * This function returns: > 0 (success), 0 (success but exit to user
 * space), and < 0 (errors)
 *
 * Errors:
 * -EINVAL: Unrecognized PSCI function
 */
int kvm_psci_call(struct kvm_vcpu *vcpu)
{
	switch (kvm_psci_version(vcpu)) {
	case KVM_ARM_PSCI_0_2:
		return kvm_psci_0_2_call(vcpu);
	case KVM_ARM_PSCI_0_1:
		return kvm_psci_0_1_call(vcpu);
	default:
		return -EINVAL;
	};
}
Commit	Line	Data
aa024c2f MZ	1	/*
	2	* Copyright (C) 2012 - ARM Ltd
	3	* Author: Marc Zyngier <marc.zyngier@arm.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	16	*/
	17
cf5d3188	18	#include <linux/preempt.h>
aa024c2f MZ	19	#include <linux/kvm_host.h>
	20	#include <linux/wait.h>
	21
79c64880	22	#include <asm/cputype.h>
aa024c2f MZ	23	#include <asm/kvm_emulate.h>
	24	#include <asm/kvm_psci.h>
	25
	26	/*
	27	* This is an implementation of the Power State Coordination Interface
	28	* as described in ARM document number ARM DEN 0022A.
	29	*/
	30
e6bc13c8 AP	31	#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
	32
	33	static unsigned long psci_affinity_mask(unsigned long affinity_level)
	34	{
	35	if (affinity_level <= 3)
	36	return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
	37
	38	return 0;
	39	}
	40
b376d02b AP	41	static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
	42	{
	43	/*
	44	* NOTE: For simplicity, we make VCPU suspend emulation to be
	45	* same-as WFI (Wait-for-interrupt) emulation.
	46	*
	47	* This means for KVM the wakeup events are interrupts and
	48	* this is consistent with intended use of StateID as described
	49	* in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
	50	*
	51	* Further, we also treat power-down request to be same as
	52	* stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
	53	* specification (ARM DEN 0022A). This means all suspend states
	54	* for KVM will preserve the register state.
	55	*/
	56	kvm_vcpu_block(vcpu);
	57
	58	return PSCI_RET_SUCCESS;
	59	}
	60
aa024c2f MZ	61	static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
	62	{
	63	vcpu->arch.pause = true;
	64	}
	65
	66	static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
	67	{
	68	struct kvm *kvm = source_vcpu->kvm;
79c64880	69	struct kvm_vcpu vcpu = NULL, tmp;
aa024c2f MZ	70	wait_queue_head_t *wq;
aa024c2f MZ	71	unsigned long cpu_id;
aa8aeefe	72	unsigned long context_id;
79c64880	73	unsigned long mpidr;
aa024c2f	74	phys_addr_t target_pc;
79c64880	75	int i;
aa024c2f MZ	76
	77	cpu_id = *vcpu_reg(source_vcpu, 1);
	78	if (vcpu_mode_is_32bit(source_vcpu))
	79	cpu_id &= ~((u32) 0);
	80
79c64880 MZ	81	kvm_for_each_vcpu(i, tmp, kvm) {
	82	mpidr = kvm_vcpu_get_mpidr(tmp);
	83	if ((mpidr & MPIDR_HWID_BITMASK) == (cpu_id & MPIDR_HWID_BITMASK)) {
	84	vcpu = tmp;
	85	break;
	86	}
	87	}
	88
478a8237 CD	89	/*
	90	* Make sure the caller requested a valid CPU and that the CPU is
	91	* turned off.
	92	*/
aa8aeefe	93	if (!vcpu)
7d0f84aa	94	return PSCI_RET_INVALID_PARAMS;
aa8aeefe AP	95	if (!vcpu->arch.pause) {
	96	if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
	97	return PSCI_RET_ALREADY_ON;
	98	else
	99	return PSCI_RET_INVALID_PARAMS;
	100	}
aa024c2f MZ	101
aa024c2f MZ	102	target_pc = *vcpu_reg(source_vcpu, 2);
aa8aeefe	103	context_id = *vcpu_reg(source_vcpu, 3);
aa024c2f	104
aa024c2f MZ	105	kvm_reset_vcpu(vcpu);
	106
	107	/* Gracefully handle Thumb2 entry point */
	108	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
	109	target_pc &= ~((phys_addr_t) 1);
	110	vcpu_set_thumb(vcpu);
	111	}
	112
ce94fe93 MZ	113	/* Propagate caller endianness */
	114	if (kvm_vcpu_is_be(source_vcpu))
	115	kvm_vcpu_set_be(vcpu);
	116
aa024c2f	117	*vcpu_pc(vcpu) = target_pc;
aa8aeefe AP	118	/*
	119	* NOTE: We always update r0 (or x0) because for PSCI v0.1
	120	* the general puspose registers are undefined upon CPU_ON.
	121	*/
	122	*vcpu_reg(vcpu, 0) = context_id;
aa024c2f MZ	123	vcpu->arch.pause = false;
	124	smp_mb(); /* Make sure the above is visible */
	125
478a8237	126	wq = kvm_arch_vcpu_wq(vcpu);
aa024c2f MZ	127	wake_up_interruptible(wq);
aa024c2f MZ	128
7d0f84aa	129	return PSCI_RET_SUCCESS;
aa024c2f MZ	130	}
aa024c2f MZ	131
e6bc13c8 AP	132	static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
	133	{
	134	int i;
	135	unsigned long mpidr;
	136	unsigned long target_affinity;
	137	unsigned long target_affinity_mask;
	138	unsigned long lowest_affinity_level;
	139	struct kvm *kvm = vcpu->kvm;
	140	struct kvm_vcpu *tmp;
	141
	142	target_affinity = *vcpu_reg(vcpu, 1);
	143	lowest_affinity_level = *vcpu_reg(vcpu, 2);
	144
	145	/* Determine target affinity mask */
	146	target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
	147	if (!target_affinity_mask)
	148	return PSCI_RET_INVALID_PARAMS;
	149
	150	/* Ignore other bits of target affinity */
	151	target_affinity &= target_affinity_mask;
	152
	153	/*
	154	* If one or more VCPU matching target affinity are running
	155	* then ON else OFF
	156	*/
	157	kvm_for_each_vcpu(i, tmp, kvm) {
	158	mpidr = kvm_vcpu_get_mpidr(tmp);
	159	if (((mpidr & target_affinity_mask) == target_affinity) &&
	160	!tmp->arch.pause) {
	161	return PSCI_0_2_AFFINITY_LEVEL_ON;
	162	}
	163	}
	164
	165	return PSCI_0_2_AFFINITY_LEVEL_OFF;
	166	}
	167
4b123826 AP	168	static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
4b123826 AP	169	{
cf5d3188 CD	170	int i;
	171	struct kvm_vcpu *tmp;
	172
	173	/*
	174	* The KVM ABI specifies that a system event exit may call KVM_RUN
	175	* again and may perform shutdown/reboot at a later time that when the
	176	* actual request is made. Since we are implementing PSCI and a
	177	* caller of PSCI reboot and shutdown expects that the system shuts
	178	* down or reboots immediately, let's make sure that VCPUs are not run
	179	* after this call is handled and before the VCPUs have been
	180	* re-initialized.
	181	*/
	182	kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
	183	tmp->arch.pause = true;
	184	kvm_vcpu_kick(tmp);
	185	}
	186
4b123826 AP	187	memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
	188	vcpu->run->system_event.type = type;
	189	vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
	190	}
	191
	192	static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
	193	{
	194	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
	195	}
	196
	197	static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
	198	{
	199	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
	200	}
	201
7d0f84aa AP	202	int kvm_psci_version(struct kvm_vcpu *vcpu)
	203	{
	204	if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
	205	return KVM_ARM_PSCI_0_2;
	206
	207	return KVM_ARM_PSCI_0_1;
	208	}
	209
e8e7fcc5	210	static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
7d0f84aa	211	{
4b123826	212	int ret = 1;
7d0f84aa AP	213	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	214	unsigned long val;
	215
	216	switch (psci_fn) {
	217	case PSCI_0_2_FN_PSCI_VERSION:
	218	/*
	219	* Bits[31:16] = Major Version = 0
	220	* Bits[15:0] = Minor Version = 2
	221	*/
	222	val = 2;
	223	break;
b376d02b AP	224	case PSCI_0_2_FN_CPU_SUSPEND:
	225	case PSCI_0_2_FN64_CPU_SUSPEND:
	226	val = kvm_psci_vcpu_suspend(vcpu);
	227	break;
7d0f84aa AP	228	case PSCI_0_2_FN_CPU_OFF:
	229	kvm_psci_vcpu_off(vcpu);
	230	val = PSCI_RET_SUCCESS;
	231	break;
	232	case PSCI_0_2_FN_CPU_ON:
	233	case PSCI_0_2_FN64_CPU_ON:
	234	val = kvm_psci_vcpu_on(vcpu);
	235	break;
e6bc13c8 AP	236	case PSCI_0_2_FN_AFFINITY_INFO:
	237	case PSCI_0_2_FN64_AFFINITY_INFO:
	238	val = kvm_psci_vcpu_affinity_info(vcpu);
	239	break;
bab0b430 AP	240	case PSCI_0_2_FN_MIGRATE:
	241	case PSCI_0_2_FN64_MIGRATE:
	242	val = PSCI_RET_NOT_SUPPORTED;
	243	break;
	244	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
	245	/*
	246	* Trusted OS is MP hence does not require migration
	247	* or
	248	* Trusted OS is not present
	249	*/
	250	val = PSCI_0_2_TOS_MP;
	251	break;
	252	case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
	253	case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
	254	val = PSCI_RET_NOT_SUPPORTED;
	255	break;
4b123826 AP	256	case PSCI_0_2_FN_SYSTEM_OFF:
	257	kvm_psci_system_off(vcpu);
	258	/*
	259	* We should'nt be going back to guest VCPU after
	260	* receiving SYSTEM_OFF request.
	261	*
	262	* If user space accidently/deliberately resumes
	263	* guest VCPU after SYSTEM_OFF request then guest
	264	* VCPU should see internal failure from PSCI return
	265	* value. To achieve this, we preload r0 (or x0) with
	266	* PSCI return value INTERNAL_FAILURE.
	267	*/
	268	val = PSCI_RET_INTERNAL_FAILURE;
	269	ret = 0;
	270	break;
	271	case PSCI_0_2_FN_SYSTEM_RESET:
	272	kvm_psci_system_reset(vcpu);
	273	/*
	274	* Same reason as SYSTEM_OFF for preloading r0 (or x0)
	275	* with PSCI return value INTERNAL_FAILURE.
	276	*/
	277	val = PSCI_RET_INTERNAL_FAILURE;
	278	ret = 0;
	279	break;
7d0f84aa	280	default:
e8e7fcc5	281	return -EINVAL;
7d0f84aa AP	282	}
	283
	284	*vcpu_reg(vcpu, 0) = val;
4b123826	285	return ret;
7d0f84aa AP	286	}
7d0f84aa AP	287
e8e7fcc5	288	static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
aa024c2f MZ	289	{
	290	unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
	291	unsigned long val;
	292
	293	switch (psci_fn) {
	294	case KVM_PSCI_FN_CPU_OFF:
	295	kvm_psci_vcpu_off(vcpu);
7d0f84aa	296	val = PSCI_RET_SUCCESS;
aa024c2f MZ	297	break;
	298	case KVM_PSCI_FN_CPU_ON:
	299	val = kvm_psci_vcpu_on(vcpu);
	300	break;
	301	case KVM_PSCI_FN_CPU_SUSPEND:
	302	case KVM_PSCI_FN_MIGRATE:
7d0f84aa	303	val = PSCI_RET_NOT_SUPPORTED;
aa024c2f	304	break;
aa024c2f	305	default:
e8e7fcc5	306	return -EINVAL;
aa024c2f MZ	307	}
	308
	309	*vcpu_reg(vcpu, 0) = val;
e8e7fcc5	310	return 1;
aa024c2f	311	}
7d0f84aa AP	312
	313	/**
	314	* kvm_psci_call - handle PSCI call if r0 value is in range
	315	* @vcpu: Pointer to the VCPU struct
	316	*
	317	* Handle PSCI calls from guests through traps from HVC instructions.
e8e7fcc5 AP	318	* The calling convention is similar to SMC calls to the secure world
	319	* where the function number is placed in r0.
	320	*
	321	* This function returns: > 0 (success), 0 (success but exit to user
	322	* space), and < 0 (errors)
	323	*
	324	* Errors:
	325	* -EINVAL: Unrecognized PSCI function
7d0f84aa	326	*/
e8e7fcc5	327	int kvm_psci_call(struct kvm_vcpu *vcpu)
7d0f84aa AP	328	{
	329	switch (kvm_psci_version(vcpu)) {
	330	case KVM_ARM_PSCI_0_2:
	331	return kvm_psci_0_2_call(vcpu);
	332	case KVM_ARM_PSCI_0_1:
	333	return kvm_psci_0_1_call(vcpu);
	334	default:
e8e7fcc5	335	return -EINVAL;
7d0f84aa AP	336	};
7d0f84aa AP	337	}