Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/traps.c | |
3 | * | |
ab72b007 | 4 | * Copyright (C) 1995-2009 Russell King |
1da177e4 LT |
5 | * Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * 'traps.c' handles hardware exceptions after we have saved some state in | |
12 | * 'linux/arch/arm/lib/traps.S'. Mostly a debugging aid, but will probably | |
13 | * kill the offending process. | |
14 | */ | |
1da177e4 | 15 | #include <linux/signal.h> |
1da177e4 | 16 | #include <linux/personality.h> |
1da177e4 | 17 | #include <linux/kallsyms.h> |
a9221de6 RK |
18 | #include <linux/spinlock.h> |
19 | #include <linux/uaccess.h> | |
67306da6 | 20 | #include <linux/hardirq.h> |
a9221de6 RK |
21 | #include <linux/kdebug.h> |
22 | #include <linux/module.h> | |
23 | #include <linux/kexec.h> | |
87e040b6 | 24 | #include <linux/bug.h> |
a9221de6 | 25 | #include <linux/delay.h> |
1da177e4 | 26 | #include <linux/init.h> |
425fc47a | 27 | #include <linux/sched.h> |
1da177e4 | 28 | |
60063497 | 29 | #include <linux/atomic.h> |
1da177e4 | 30 | #include <asm/cacheflush.h> |
5a567d78 | 31 | #include <asm/exception.h> |
1da177e4 LT |
32 | #include <asm/unistd.h> |
33 | #include <asm/traps.h> | |
49432d4a | 34 | #include <asm/ptrace.h> |
bff595c1 | 35 | #include <asm/unwind.h> |
f159f4ed | 36 | #include <asm/tls.h> |
9f97da78 | 37 | #include <asm/system_misc.h> |
a79a0cb1 | 38 | #include <asm/opcodes.h> |
1da177e4 | 39 | |
49432d4a | 40 | |
29c350bf RK |
41 | static const char *handler[]= { |
42 | "prefetch abort", | |
43 | "data abort", | |
44 | "address exception", | |
45 | "interrupt", | |
46 | "undefined instruction", | |
47 | }; | |
1da177e4 | 48 | |
247055aa CM |
49 | void *vectors_page; |
50 | ||
1da177e4 LT |
51 | #ifdef CONFIG_DEBUG_USER |
52 | unsigned int user_debug; | |
53 | ||
54 | static int __init user_debug_setup(char *str) | |
55 | { | |
56 | get_option(&str, &user_debug); | |
57 | return 1; | |
58 | } | |
59 | __setup("user_debug=", user_debug_setup); | |
60 | #endif | |
61 | ||
e40c2ec6 | 62 | static void dump_mem(const char *, const char *, unsigned long, unsigned long); |
7ab3f8d5 | 63 | |
7ab3f8d5 | 64 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) |
1da177e4 LT |
65 | { |
66 | #ifdef CONFIG_KALLSYMS | |
ef41b5c9 | 67 | printk("[<%08lx>] (%ps) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from); |
1da177e4 LT |
68 | #else |
69 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); | |
70 | #endif | |
7ab3f8d5 RK |
71 | |
72 | if (in_exception_text(where)) | |
e40c2ec6 | 73 | dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); |
1da177e4 LT |
74 | } |
75 | ||
bff595c1 | 76 | #ifndef CONFIG_ARM_UNWIND |
1da177e4 LT |
77 | /* |
78 | * Stack pointers should always be within the kernels view of | |
79 | * physical memory. If it is not there, then we can't dump | |
80 | * out any information relating to the stack. | |
81 | */ | |
82 | static int verify_stack(unsigned long sp) | |
83 | { | |
09d9bae0 RK |
84 | if (sp < PAGE_OFFSET || |
85 | (sp > (unsigned long)high_memory && high_memory != NULL)) | |
1da177e4 LT |
86 | return -EFAULT; |
87 | ||
88 | return 0; | |
89 | } | |
bff595c1 | 90 | #endif |
1da177e4 LT |
91 | |
92 | /* | |
93 | * Dump out the contents of some memory nicely... | |
94 | */ | |
e40c2ec6 RK |
95 | static void dump_mem(const char *lvl, const char *str, unsigned long bottom, |
96 | unsigned long top) | |
1da177e4 | 97 | { |
d191fe09 | 98 | unsigned long first; |
1da177e4 LT |
99 | mm_segment_t fs; |
100 | int i; | |
101 | ||
102 | /* | |
103 | * We need to switch to kernel mode so that we can use __get_user | |
104 | * to safely read from kernel space. Note that we now dump the | |
105 | * code first, just in case the backtrace kills us. | |
106 | */ | |
107 | fs = get_fs(); | |
108 | set_fs(KERNEL_DS); | |
109 | ||
e40c2ec6 | 110 | printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top); |
1da177e4 | 111 | |
d191fe09 RK |
112 | for (first = bottom & ~31; first < top; first += 32) { |
113 | unsigned long p; | |
114 | char str[sizeof(" 12345678") * 8 + 1]; | |
1da177e4 | 115 | |
d191fe09 RK |
116 | memset(str, ' ', sizeof(str)); |
117 | str[sizeof(str) - 1] = '\0'; | |
1da177e4 | 118 | |
d191fe09 RK |
119 | for (p = first, i = 0; i < 8 && p < top; i++, p += 4) { |
120 | if (p >= bottom && p < top) { | |
121 | unsigned long val; | |
122 | if (__get_user(val, (unsigned long *)p) == 0) | |
123 | sprintf(str + i * 9, " %08lx", val); | |
124 | else | |
125 | sprintf(str + i * 9, " ????????"); | |
1da177e4 LT |
126 | } |
127 | } | |
e40c2ec6 | 128 | printk("%s%04lx:%s\n", lvl, first & 0xffff, str); |
1da177e4 LT |
129 | } |
130 | ||
131 | set_fs(fs); | |
132 | } | |
133 | ||
e40c2ec6 | 134 | static void dump_instr(const char *lvl, struct pt_regs *regs) |
1da177e4 LT |
135 | { |
136 | unsigned long addr = instruction_pointer(regs); | |
137 | const int thumb = thumb_mode(regs); | |
138 | const int width = thumb ? 4 : 8; | |
139 | mm_segment_t fs; | |
d191fe09 | 140 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; |
1da177e4 LT |
141 | int i; |
142 | ||
143 | /* | |
144 | * We need to switch to kernel mode so that we can use __get_user | |
145 | * to safely read from kernel space. Note that we now dump the | |
146 | * code first, just in case the backtrace kills us. | |
147 | */ | |
148 | fs = get_fs(); | |
149 | set_fs(KERNEL_DS); | |
150 | ||
a9011580 | 151 | for (i = -4; i < 1 + !!thumb; i++) { |
1da177e4 LT |
152 | unsigned int val, bad; |
153 | ||
154 | if (thumb) | |
155 | bad = __get_user(val, &((u16 *)addr)[i]); | |
156 | else | |
157 | bad = __get_user(val, &((u32 *)addr)[i]); | |
158 | ||
159 | if (!bad) | |
d191fe09 RK |
160 | p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ", |
161 | width, val); | |
1da177e4 | 162 | else { |
d191fe09 | 163 | p += sprintf(p, "bad PC value"); |
1da177e4 LT |
164 | break; |
165 | } | |
166 | } | |
e40c2ec6 | 167 | printk("%sCode: %s\n", lvl, str); |
1da177e4 LT |
168 | |
169 | set_fs(fs); | |
170 | } | |
171 | ||
bff595c1 CM |
172 | #ifdef CONFIG_ARM_UNWIND |
173 | static inline void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) | |
174 | { | |
175 | unwind_backtrace(regs, tsk); | |
176 | } | |
177 | #else | |
1da177e4 LT |
178 | static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) |
179 | { | |
67a94c23 | 180 | unsigned int fp, mode; |
1da177e4 LT |
181 | int ok = 1; |
182 | ||
183 | printk("Backtrace: "); | |
67a94c23 CM |
184 | |
185 | if (!tsk) | |
186 | tsk = current; | |
187 | ||
188 | if (regs) { | |
49432d4a | 189 | fp = frame_pointer(regs); |
67a94c23 CM |
190 | mode = processor_mode(regs); |
191 | } else if (tsk != current) { | |
192 | fp = thread_saved_fp(tsk); | |
193 | mode = 0x10; | |
194 | } else { | |
195 | asm("mov %0, fp" : "=r" (fp) : : "cc"); | |
196 | mode = 0x10; | |
197 | } | |
198 | ||
1da177e4 LT |
199 | if (!fp) { |
200 | printk("no frame pointer"); | |
201 | ok = 0; | |
202 | } else if (verify_stack(fp)) { | |
203 | printk("invalid frame pointer 0x%08x", fp); | |
204 | ok = 0; | |
55205823 | 205 | } else if (fp < (unsigned long)end_of_stack(tsk)) |
1da177e4 LT |
206 | printk("frame pointer underflow"); |
207 | printk("\n"); | |
208 | ||
209 | if (ok) | |
67a94c23 | 210 | c_backtrace(fp, mode); |
1da177e4 | 211 | } |
bff595c1 | 212 | #endif |
1da177e4 | 213 | |
1da177e4 LT |
214 | void show_stack(struct task_struct *tsk, unsigned long *sp) |
215 | { | |
67a94c23 | 216 | dump_backtrace(NULL, tsk); |
1da177e4 LT |
217 | barrier(); |
218 | } | |
219 | ||
d9202429 RK |
220 | #ifdef CONFIG_PREEMPT |
221 | #define S_PREEMPT " PREEMPT" | |
222 | #else | |
223 | #define S_PREEMPT "" | |
224 | #endif | |
225 | #ifdef CONFIG_SMP | |
226 | #define S_SMP " SMP" | |
227 | #else | |
228 | #define S_SMP "" | |
229 | #endif | |
8211ca65 RK |
230 | #ifdef CONFIG_THUMB2_KERNEL |
231 | #define S_ISA " THUMB2" | |
232 | #else | |
233 | #define S_ISA " ARM" | |
234 | #endif | |
d9202429 | 235 | |
02df19b4 | 236 | static int __die(const char *str, int err, struct pt_regs *regs) |
1da177e4 | 237 | { |
02df19b4 | 238 | struct task_struct *tsk = current; |
1da177e4 | 239 | static int die_counter; |
a9221de6 | 240 | int ret; |
1da177e4 | 241 | |
8211ca65 RK |
242 | printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP |
243 | S_ISA "\n", str, err, ++die_counter); | |
a9221de6 RK |
244 | |
245 | /* trap and error numbers are mostly meaningless on ARM */ | |
246 | ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV); | |
247 | if (ret == NOTIFY_STOP) | |
02df19b4 | 248 | return 1; |
a9221de6 | 249 | |
1da177e4 | 250 | print_modules(); |
652a12ef | 251 | __show_regs(regs); |
e40c2ec6 | 252 | printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", |
02df19b4 | 253 | TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), end_of_stack(tsk)); |
1da177e4 LT |
254 | |
255 | if (!user_mode(regs) || in_interrupt()) { | |
e40c2ec6 | 256 | dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp, |
32d39a93 | 257 | THREAD_SIZE + (unsigned long)task_stack_page(tsk)); |
1da177e4 | 258 | dump_backtrace(regs, tsk); |
e40c2ec6 | 259 | dump_instr(KERN_EMERG, regs); |
1da177e4 | 260 | } |
a9221de6 | 261 | |
02df19b4 | 262 | return 0; |
d362979a | 263 | } |
1da177e4 | 264 | |
02df19b4 RV |
265 | static arch_spinlock_t die_lock = __ARCH_SPIN_LOCK_UNLOCKED; |
266 | static int die_owner = -1; | |
267 | static unsigned int die_nest_count; | |
d362979a | 268 | |
02df19b4 | 269 | static unsigned long oops_begin(void) |
d362979a | 270 | { |
02df19b4 RV |
271 | int cpu; |
272 | unsigned long flags; | |
d362979a | 273 | |
d9202429 RK |
274 | oops_enter(); |
275 | ||
02df19b4 RV |
276 | /* racy, but better than risking deadlock. */ |
277 | raw_local_irq_save(flags); | |
278 | cpu = smp_processor_id(); | |
279 | if (!arch_spin_trylock(&die_lock)) { | |
280 | if (cpu == die_owner) | |
281 | /* nested oops. should stop eventually */; | |
282 | else | |
283 | arch_spin_lock(&die_lock); | |
284 | } | |
285 | die_nest_count++; | |
286 | die_owner = cpu; | |
03a6e5bd | 287 | console_verbose(); |
d362979a | 288 | bust_spinlocks(1); |
02df19b4 RV |
289 | return flags; |
290 | } | |
a9221de6 | 291 | |
02df19b4 RV |
292 | static void oops_end(unsigned long flags, struct pt_regs *regs, int signr) |
293 | { | |
294 | if (regs && kexec_should_crash(current)) | |
a9221de6 RK |
295 | crash_kexec(regs); |
296 | ||
1da177e4 | 297 | bust_spinlocks(0); |
02df19b4 | 298 | die_owner = -1; |
373d4d09 | 299 | add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); |
02df19b4 RV |
300 | die_nest_count--; |
301 | if (!die_nest_count) | |
302 | /* Nest count reaches zero, release the lock. */ | |
303 | arch_spin_unlock(&die_lock); | |
304 | raw_local_irq_restore(flags); | |
03a6e5bd | 305 | oops_exit(); |
31867499 | 306 | |
d9202429 RK |
307 | if (in_interrupt()) |
308 | panic("Fatal exception in interrupt"); | |
cea6a4ba | 309 | if (panic_on_oops) |
012c437d | 310 | panic("Fatal exception"); |
02df19b4 RV |
311 | if (signr) |
312 | do_exit(signr); | |
313 | } | |
314 | ||
315 | /* | |
316 | * This function is protected against re-entrancy. | |
317 | */ | |
318 | void die(const char *str, struct pt_regs *regs, int err) | |
319 | { | |
320 | enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE; | |
321 | unsigned long flags = oops_begin(); | |
322 | int sig = SIGSEGV; | |
323 | ||
324 | if (!user_mode(regs)) | |
325 | bug_type = report_bug(regs->ARM_pc, regs); | |
326 | if (bug_type != BUG_TRAP_TYPE_NONE) | |
327 | str = "Oops - BUG"; | |
328 | ||
329 | if (__die(str, err, regs)) | |
330 | sig = 0; | |
331 | ||
332 | oops_end(flags, regs, sig); | |
1da177e4 LT |
333 | } |
334 | ||
1eeb66a1 CH |
335 | void arm_notify_die(const char *str, struct pt_regs *regs, |
336 | struct siginfo *info, unsigned long err, unsigned long trap) | |
1da177e4 LT |
337 | { |
338 | if (user_mode(regs)) { | |
339 | current->thread.error_code = err; | |
340 | current->thread.trap_no = trap; | |
341 | ||
342 | force_sig_info(info->si_signo, info, current); | |
343 | } else { | |
344 | die(str, regs, err); | |
345 | } | |
346 | } | |
347 | ||
87e040b6 SG |
348 | #ifdef CONFIG_GENERIC_BUG |
349 | ||
350 | int is_valid_bugaddr(unsigned long pc) | |
351 | { | |
352 | #ifdef CONFIG_THUMB2_KERNEL | |
63328070 BD |
353 | u16 bkpt; |
354 | u16 insn = __opcode_to_mem_thumb16(BUG_INSTR_VALUE); | |
87e040b6 | 355 | #else |
63328070 BD |
356 | u32 bkpt; |
357 | u32 insn = __opcode_to_mem_arm(BUG_INSTR_VALUE); | |
87e040b6 SG |
358 | #endif |
359 | ||
360 | if (probe_kernel_address((unsigned *)pc, bkpt)) | |
361 | return 0; | |
362 | ||
63328070 | 363 | return bkpt == insn; |
87e040b6 SG |
364 | } |
365 | ||
366 | #endif | |
367 | ||
1da177e4 | 368 | static LIST_HEAD(undef_hook); |
bd31b859 | 369 | static DEFINE_RAW_SPINLOCK(undef_lock); |
1da177e4 LT |
370 | |
371 | void register_undef_hook(struct undef_hook *hook) | |
372 | { | |
109d89ca RK |
373 | unsigned long flags; |
374 | ||
bd31b859 | 375 | raw_spin_lock_irqsave(&undef_lock, flags); |
1da177e4 | 376 | list_add(&hook->node, &undef_hook); |
bd31b859 | 377 | raw_spin_unlock_irqrestore(&undef_lock, flags); |
1da177e4 LT |
378 | } |
379 | ||
380 | void unregister_undef_hook(struct undef_hook *hook) | |
381 | { | |
109d89ca RK |
382 | unsigned long flags; |
383 | ||
bd31b859 | 384 | raw_spin_lock_irqsave(&undef_lock, flags); |
1da177e4 | 385 | list_del(&hook->node); |
bd31b859 | 386 | raw_spin_unlock_irqrestore(&undef_lock, flags); |
1da177e4 LT |
387 | } |
388 | ||
b03a5b75 RK |
389 | static int call_undef_hook(struct pt_regs *regs, unsigned int instr) |
390 | { | |
391 | struct undef_hook *hook; | |
392 | unsigned long flags; | |
393 | int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL; | |
394 | ||
bd31b859 | 395 | raw_spin_lock_irqsave(&undef_lock, flags); |
b03a5b75 RK |
396 | list_for_each_entry(hook, &undef_hook, node) |
397 | if ((instr & hook->instr_mask) == hook->instr_val && | |
398 | (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) | |
399 | fn = hook->fn; | |
bd31b859 | 400 | raw_spin_unlock_irqrestore(&undef_lock, flags); |
b03a5b75 RK |
401 | |
402 | return fn ? fn(regs, instr) : 1; | |
403 | } | |
404 | ||
7ab3f8d5 | 405 | asmlinkage void __exception do_undefinstr(struct pt_regs *regs) |
1da177e4 | 406 | { |
1da177e4 | 407 | unsigned int instr; |
1da177e4 LT |
408 | siginfo_t info; |
409 | void __user *pc; | |
410 | ||
1da177e4 | 411 | pc = (void __user *)instruction_pointer(regs); |
dfc544c7 DW |
412 | |
413 | if (processor_mode(regs) == SVC_MODE) { | |
592201a9 JM |
414 | #ifdef CONFIG_THUMB2_KERNEL |
415 | if (thumb_mode(regs)) { | |
a79a0cb1 | 416 | instr = __mem_to_opcode_thumb16(((u16 *)pc)[0]); |
592201a9 | 417 | if (is_wide_instruction(instr)) { |
a79a0cb1 BD |
418 | u16 inst2; |
419 | inst2 = __mem_to_opcode_thumb16(((u16 *)pc)[1]); | |
420 | instr = __opcode_thumb32_compose(instr, inst2); | |
592201a9 JM |
421 | } |
422 | } else | |
423 | #endif | |
a79a0cb1 | 424 | instr = __mem_to_opcode_arm(*(u32 *) pc); |
dfc544c7 | 425 | } else if (thumb_mode(regs)) { |
2b2040af WD |
426 | if (get_user(instr, (u16 __user *)pc)) |
427 | goto die_sig; | |
a79a0cb1 | 428 | instr = __mem_to_opcode_thumb16(instr); |
592201a9 JM |
429 | if (is_wide_instruction(instr)) { |
430 | unsigned int instr2; | |
2b2040af WD |
431 | if (get_user(instr2, (u16 __user *)pc+1)) |
432 | goto die_sig; | |
a79a0cb1 BD |
433 | instr2 = __mem_to_opcode_thumb16(instr2); |
434 | instr = __opcode_thumb32_compose(instr, instr2); | |
592201a9 | 435 | } |
d6cd9894 TK |
436 | } else { |
437 | if (get_user(instr, (u32 __user *)pc)) | |
438 | goto die_sig; | |
a79a0cb1 | 439 | instr = __mem_to_opcode_arm(instr); |
1da177e4 LT |
440 | } |
441 | ||
b03a5b75 RK |
442 | if (call_undef_hook(regs, instr) == 0) |
443 | return; | |
1da177e4 | 444 | |
2b2040af | 445 | die_sig: |
1da177e4 LT |
446 | #ifdef CONFIG_DEBUG_USER |
447 | if (user_debug & UDBG_UNDEFINED) { | |
448 | printk(KERN_INFO "%s (%d): undefined instruction: pc=%p\n", | |
19c5870c | 449 | current->comm, task_pid_nr(current), pc); |
b5b6b5f5 | 450 | __show_regs(regs); |
e40c2ec6 | 451 | dump_instr(KERN_INFO, regs); |
1da177e4 LT |
452 | } |
453 | #endif | |
454 | ||
455 | info.si_signo = SIGILL; | |
456 | info.si_errno = 0; | |
457 | info.si_code = ILL_ILLOPC; | |
458 | info.si_addr = pc; | |
459 | ||
1eeb66a1 | 460 | arm_notify_die("Oops - undefined instruction", regs, &info, 0, 6); |
1da177e4 LT |
461 | } |
462 | ||
463 | asmlinkage void do_unexp_fiq (struct pt_regs *regs) | |
464 | { | |
1da177e4 LT |
465 | printk("Hmm. Unexpected FIQ received, but trying to continue\n"); |
466 | printk("You may have a hardware problem...\n"); | |
1da177e4 LT |
467 | } |
468 | ||
469 | /* | |
470 | * bad_mode handles the impossible case in the vectors. If you see one of | |
471 | * these, then it's extremely serious, and could mean you have buggy hardware. | |
472 | * It never returns, and never tries to sync. We hope that we can at least | |
473 | * dump out some state information... | |
474 | */ | |
ae0a846e | 475 | asmlinkage void bad_mode(struct pt_regs *regs, int reason) |
1da177e4 LT |
476 | { |
477 | console_verbose(); | |
478 | ||
ae0a846e | 479 | printk(KERN_CRIT "Bad mode in %s handler detected\n", handler[reason]); |
1da177e4 LT |
480 | |
481 | die("Oops - bad mode", regs, 0); | |
482 | local_irq_disable(); | |
483 | panic("bad mode"); | |
484 | } | |
485 | ||
486 | static int bad_syscall(int n, struct pt_regs *regs) | |
487 | { | |
488 | struct thread_info *thread = current_thread_info(); | |
489 | siginfo_t info; | |
490 | ||
88b9ef45 | 491 | if ((current->personality & PER_MASK) != PER_LINUX && |
a999cb04 | 492 | thread->exec_domain->handler) { |
1da177e4 LT |
493 | thread->exec_domain->handler(n, regs); |
494 | return regs->ARM_r0; | |
495 | } | |
496 | ||
497 | #ifdef CONFIG_DEBUG_USER | |
498 | if (user_debug & UDBG_SYSCALL) { | |
499 | printk(KERN_ERR "[%d] %s: obsolete system call %08x.\n", | |
19c5870c | 500 | task_pid_nr(current), current->comm, n); |
e40c2ec6 | 501 | dump_instr(KERN_ERR, regs); |
1da177e4 LT |
502 | } |
503 | #endif | |
504 | ||
505 | info.si_signo = SIGILL; | |
506 | info.si_errno = 0; | |
507 | info.si_code = ILL_ILLTRP; | |
508 | info.si_addr = (void __user *)instruction_pointer(regs) - | |
509 | (thumb_mode(regs) ? 2 : 4); | |
510 | ||
1eeb66a1 | 511 | arm_notify_die("Oops - bad syscall", regs, &info, n, 0); |
1da177e4 LT |
512 | |
513 | return regs->ARM_r0; | |
514 | } | |
515 | ||
28256d61 WD |
516 | static long do_cache_op_restart(struct restart_block *); |
517 | ||
c5102f59 | 518 | static inline int |
28256d61 WD |
519 | __do_cache_op(unsigned long start, unsigned long end) |
520 | { | |
521 | int ret; | |
28256d61 WD |
522 | |
523 | do { | |
b31459ad JM |
524 | unsigned long chunk = min(PAGE_SIZE, end - start); |
525 | ||
28256d61 WD |
526 | if (signal_pending(current)) { |
527 | struct thread_info *ti = current_thread_info(); | |
528 | ||
529 | ti->restart_block = (struct restart_block) { | |
530 | .fn = do_cache_op_restart, | |
531 | }; | |
532 | ||
533 | ti->arm_restart_block = (struct arm_restart_block) { | |
534 | { | |
535 | .cache = { | |
536 | .start = start, | |
537 | .end = end, | |
538 | }, | |
539 | }, | |
540 | }; | |
541 | ||
542 | return -ERESTART_RESTARTBLOCK; | |
543 | } | |
544 | ||
545 | ret = flush_cache_user_range(start, start + chunk); | |
546 | if (ret) | |
547 | return ret; | |
548 | ||
549 | cond_resched(); | |
550 | start += chunk; | |
551 | } while (start < end); | |
552 | ||
553 | return 0; | |
554 | } | |
555 | ||
556 | static long do_cache_op_restart(struct restart_block *unused) | |
1da177e4 | 557 | { |
28256d61 | 558 | struct arm_restart_block *restart_block; |
1da177e4 | 559 | |
28256d61 WD |
560 | restart_block = ¤t_thread_info()->arm_restart_block; |
561 | return __do_cache_op(restart_block->cache.start, | |
562 | restart_block->cache.end); | |
563 | } | |
564 | ||
c5102f59 | 565 | static inline int |
1da177e4 LT |
566 | do_cache_op(unsigned long start, unsigned long end, int flags) |
567 | { | |
1da177e4 | 568 | if (end < start || flags) |
c5102f59 | 569 | return -EINVAL; |
1da177e4 | 570 | |
97c72d89 WD |
571 | if (!access_ok(VERIFY_READ, start, end - start)) |
572 | return -EFAULT; | |
1da177e4 | 573 | |
28256d61 | 574 | return __do_cache_op(start, end); |
1da177e4 LT |
575 | } |
576 | ||
577 | /* | |
578 | * Handle all unrecognised system calls. | |
579 | * 0x9f0000 - 0x9fffff are some more esoteric system calls | |
580 | */ | |
581 | #define NR(x) ((__ARM_NR_##x) - __ARM_NR_BASE) | |
582 | asmlinkage int arm_syscall(int no, struct pt_regs *regs) | |
583 | { | |
1da177e4 LT |
584 | siginfo_t info; |
585 | ||
3f2829a3 | 586 | if ((no >> 16) != (__ARM_NR_BASE>> 16)) |
1da177e4 LT |
587 | return bad_syscall(no, regs); |
588 | ||
589 | switch (no & 0xffff) { | |
590 | case 0: /* branch through 0 */ | |
591 | info.si_signo = SIGSEGV; | |
592 | info.si_errno = 0; | |
593 | info.si_code = SEGV_MAPERR; | |
594 | info.si_addr = NULL; | |
595 | ||
1eeb66a1 | 596 | arm_notify_die("branch through zero", regs, &info, 0, 0); |
1da177e4 LT |
597 | return 0; |
598 | ||
599 | case NR(breakpoint): /* SWI BREAK_POINT */ | |
600 | regs->ARM_pc -= thumb_mode(regs) ? 2 : 4; | |
601 | ptrace_break(current, regs); | |
602 | return regs->ARM_r0; | |
603 | ||
604 | /* | |
605 | * Flush a region from virtual address 'r0' to virtual address 'r1' | |
606 | * _exclusive_. There is no alignment requirement on either address; | |
607 | * user space does not need to know the hardware cache layout. | |
608 | * | |
609 | * r2 contains flags. It should ALWAYS be passed as ZERO until it | |
610 | * is defined to be something else. For now we ignore it, but may | |
611 | * the fires of hell burn in your belly if you break this rule. ;) | |
612 | * | |
613 | * (at a later date, we may want to allow this call to not flush | |
614 | * various aspects of the cache. Passing '0' will guarantee that | |
615 | * everything necessary gets flushed to maintain consistency in | |
616 | * the specified region). | |
617 | */ | |
618 | case NR(cacheflush): | |
c5102f59 | 619 | return do_cache_op(regs->ARM_r0, regs->ARM_r1, regs->ARM_r2); |
1da177e4 LT |
620 | |
621 | case NR(usr26): | |
622 | if (!(elf_hwcap & HWCAP_26BIT)) | |
623 | break; | |
624 | regs->ARM_cpsr &= ~MODE32_BIT; | |
625 | return regs->ARM_r0; | |
626 | ||
627 | case NR(usr32): | |
628 | if (!(elf_hwcap & HWCAP_26BIT)) | |
629 | break; | |
630 | regs->ARM_cpsr |= MODE32_BIT; | |
631 | return regs->ARM_r0; | |
632 | ||
633 | case NR(set_tls): | |
fbfb872f | 634 | set_tls(regs->ARM_r0); |
1da177e4 LT |
635 | return 0; |
636 | ||
dcef1f63 NP |
637 | #ifdef CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG |
638 | /* | |
639 | * Atomically store r1 in *r2 if *r2 is equal to r0 for user space. | |
640 | * Return zero in r0 if *MEM was changed or non-zero if no exchange | |
641 | * happened. Also set the user C flag accordingly. | |
642 | * If access permissions have to be fixed up then non-zero is | |
643 | * returned and the operation has to be re-attempted. | |
644 | * | |
645 | * *NOTE*: This is a ghost syscall private to the kernel. Only the | |
646 | * __kuser_cmpxchg code in entry-armv.S should be aware of its | |
647 | * existence. Don't ever use this from user code. | |
648 | */ | |
cc20d429 | 649 | case NR(cmpxchg): |
b49c0f24 | 650 | for (;;) { |
dcef1f63 NP |
651 | extern void do_DataAbort(unsigned long addr, unsigned int fsr, |
652 | struct pt_regs *regs); | |
653 | unsigned long val; | |
654 | unsigned long addr = regs->ARM_r2; | |
655 | struct mm_struct *mm = current->mm; | |
656 | pgd_t *pgd; pmd_t *pmd; pte_t *pte; | |
69b04754 | 657 | spinlock_t *ptl; |
dcef1f63 NP |
658 | |
659 | regs->ARM_cpsr &= ~PSR_C_BIT; | |
69b04754 | 660 | down_read(&mm->mmap_sem); |
dcef1f63 NP |
661 | pgd = pgd_offset(mm, addr); |
662 | if (!pgd_present(*pgd)) | |
663 | goto bad_access; | |
664 | pmd = pmd_offset(pgd, addr); | |
665 | if (!pmd_present(*pmd)) | |
666 | goto bad_access; | |
69b04754 | 667 | pte = pte_offset_map_lock(mm, pmd, addr, &ptl); |
373ce302 | 668 | if (!pte_present(*pte) || !pte_write(*pte) || !pte_dirty(*pte)) { |
69b04754 | 669 | pte_unmap_unlock(pte, ptl); |
dcef1f63 | 670 | goto bad_access; |
69b04754 | 671 | } |
dcef1f63 NP |
672 | val = *(unsigned long *)addr; |
673 | val -= regs->ARM_r0; | |
674 | if (val == 0) { | |
675 | *(unsigned long *)addr = regs->ARM_r1; | |
676 | regs->ARM_cpsr |= PSR_C_BIT; | |
677 | } | |
69b04754 HD |
678 | pte_unmap_unlock(pte, ptl); |
679 | up_read(&mm->mmap_sem); | |
dcef1f63 NP |
680 | return val; |
681 | ||
682 | bad_access: | |
69b04754 | 683 | up_read(&mm->mmap_sem); |
74f88494 | 684 | /* simulate a write access fault */ |
dcef1f63 | 685 | do_DataAbort(addr, 15 + (1 << 11), regs); |
dcef1f63 NP |
686 | } |
687 | #endif | |
688 | ||
1da177e4 LT |
689 | default: |
690 | /* Calls 9f00xx..9f07ff are defined to return -ENOSYS | |
691 | if not implemented, rather than raising SIGILL. This | |
692 | way the calling program can gracefully determine whether | |
693 | a feature is supported. */ | |
bfd2e29f | 694 | if ((no & 0xffff) <= 0x7ff) |
1da177e4 LT |
695 | return -ENOSYS; |
696 | break; | |
697 | } | |
698 | #ifdef CONFIG_DEBUG_USER | |
699 | /* | |
700 | * experience shows that these seem to indicate that | |
701 | * something catastrophic has happened | |
702 | */ | |
703 | if (user_debug & UDBG_SYSCALL) { | |
704 | printk("[%d] %s: arm syscall %d\n", | |
19c5870c | 705 | task_pid_nr(current), current->comm, no); |
e40c2ec6 | 706 | dump_instr("", regs); |
1da177e4 | 707 | if (user_mode(regs)) { |
652a12ef | 708 | __show_regs(regs); |
49432d4a | 709 | c_backtrace(frame_pointer(regs), processor_mode(regs)); |
1da177e4 LT |
710 | } |
711 | } | |
712 | #endif | |
713 | info.si_signo = SIGILL; | |
714 | info.si_errno = 0; | |
715 | info.si_code = ILL_ILLTRP; | |
716 | info.si_addr = (void __user *)instruction_pointer(regs) - | |
717 | (thumb_mode(regs) ? 2 : 4); | |
718 | ||
1eeb66a1 | 719 | arm_notify_die("Oops - bad syscall(2)", regs, &info, no, 0); |
1da177e4 LT |
720 | return 0; |
721 | } | |
722 | ||
4b0e07a5 | 723 | #ifdef CONFIG_TLS_REG_EMUL |
2d2669b6 NP |
724 | |
725 | /* | |
726 | * We might be running on an ARMv6+ processor which should have the TLS | |
4b0e07a5 NP |
727 | * register but for some reason we can't use it, or maybe an SMP system |
728 | * using a pre-ARMv6 processor (there are apparently a few prototypes like | |
729 | * that in existence) and therefore access to that register must be | |
730 | * emulated. | |
2d2669b6 NP |
731 | */ |
732 | ||
733 | static int get_tp_trap(struct pt_regs *regs, unsigned int instr) | |
734 | { | |
735 | int reg = (instr >> 12) & 15; | |
736 | if (reg == 15) | |
737 | return 1; | |
a4780ade | 738 | regs->uregs[reg] = current_thread_info()->tp_value[0]; |
2d2669b6 NP |
739 | regs->ARM_pc += 4; |
740 | return 0; | |
741 | } | |
742 | ||
743 | static struct undef_hook arm_mrc_hook = { | |
744 | .instr_mask = 0x0fff0fff, | |
745 | .instr_val = 0x0e1d0f70, | |
746 | .cpsr_mask = PSR_T_BIT, | |
747 | .cpsr_val = 0, | |
748 | .fn = get_tp_trap, | |
749 | }; | |
750 | ||
751 | static int __init arm_mrc_hook_init(void) | |
752 | { | |
753 | register_undef_hook(&arm_mrc_hook); | |
754 | return 0; | |
755 | } | |
756 | ||
757 | late_initcall(arm_mrc_hook_init); | |
758 | ||
759 | #endif | |
760 | ||
1da177e4 LT |
761 | void __bad_xchg(volatile void *ptr, int size) |
762 | { | |
763 | printk("xchg: bad data size: pc 0x%p, ptr 0x%p, size %d\n", | |
764 | __builtin_return_address(0), ptr, size); | |
765 | BUG(); | |
766 | } | |
767 | EXPORT_SYMBOL(__bad_xchg); | |
768 | ||
769 | /* | |
770 | * A data abort trap was taken, but we did not handle the instruction. | |
771 | * Try to abort the user program, or panic if it was the kernel. | |
772 | */ | |
773 | asmlinkage void | |
774 | baddataabort(int code, unsigned long instr, struct pt_regs *regs) | |
775 | { | |
776 | unsigned long addr = instruction_pointer(regs); | |
777 | siginfo_t info; | |
778 | ||
779 | #ifdef CONFIG_DEBUG_USER | |
780 | if (user_debug & UDBG_BADABORT) { | |
781 | printk(KERN_ERR "[%d] %s: bad data abort: code %d instr 0x%08lx\n", | |
19c5870c | 782 | task_pid_nr(current), current->comm, code, instr); |
e40c2ec6 | 783 | dump_instr(KERN_ERR, regs); |
1da177e4 LT |
784 | show_pte(current->mm, addr); |
785 | } | |
786 | #endif | |
787 | ||
788 | info.si_signo = SIGILL; | |
789 | info.si_errno = 0; | |
790 | info.si_code = ILL_ILLOPC; | |
791 | info.si_addr = (void __user *)addr; | |
792 | ||
1eeb66a1 | 793 | arm_notify_die("unknown data abort code", regs, &info, instr, 0); |
1da177e4 LT |
794 | } |
795 | ||
1da177e4 LT |
796 | void __readwrite_bug(const char *fn) |
797 | { | |
798 | printk("%s called, but not implemented\n", fn); | |
799 | BUG(); | |
800 | } | |
801 | EXPORT_SYMBOL(__readwrite_bug); | |
802 | ||
69529c0e | 803 | void __pte_error(const char *file, int line, pte_t pte) |
1da177e4 | 804 | { |
29a38193 | 805 | printk("%s:%d: bad pte %08llx.\n", file, line, (long long)pte_val(pte)); |
1da177e4 LT |
806 | } |
807 | ||
69529c0e | 808 | void __pmd_error(const char *file, int line, pmd_t pmd) |
1da177e4 | 809 | { |
29a38193 | 810 | printk("%s:%d: bad pmd %08llx.\n", file, line, (long long)pmd_val(pmd)); |
1da177e4 LT |
811 | } |
812 | ||
69529c0e | 813 | void __pgd_error(const char *file, int line, pgd_t pgd) |
1da177e4 | 814 | { |
29a38193 | 815 | printk("%s:%d: bad pgd %08llx.\n", file, line, (long long)pgd_val(pgd)); |
1da177e4 LT |
816 | } |
817 | ||
818 | asmlinkage void __div0(void) | |
819 | { | |
820 | printk("Division by zero in kernel.\n"); | |
821 | dump_stack(); | |
822 | } | |
823 | EXPORT_SYMBOL(__div0); | |
824 | ||
825 | void abort(void) | |
826 | { | |
827 | BUG(); | |
828 | ||
829 | /* if that doesn't kill us, halt */ | |
830 | panic("Oops failed to kill thread"); | |
831 | } | |
832 | EXPORT_SYMBOL(abort); | |
833 | ||
834 | void __init trap_init(void) | |
5cbad0eb JW |
835 | { |
836 | return; | |
837 | } | |
838 | ||
f6f91b0d RK |
839 | #ifdef CONFIG_KUSER_HELPERS |
840 | static void __init kuser_init(void *vectors) | |
f159f4ed | 841 | { |
f6f91b0d RK |
842 | extern char __kuser_helper_start[], __kuser_helper_end[]; |
843 | int kuser_sz = __kuser_helper_end - __kuser_helper_start; | |
844 | ||
845 | memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz); | |
846 | ||
f159f4ed TL |
847 | /* |
848 | * vectors + 0xfe0 = __kuser_get_tls | |
849 | * vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8 | |
850 | */ | |
851 | if (tls_emu || has_tls_reg) | |
f6f91b0d RK |
852 | memcpy(vectors + 0xfe0, vectors + 0xfe8, 4); |
853 | } | |
854 | #else | |
5761704a | 855 | static inline void __init kuser_init(void *vectors) |
f6f91b0d | 856 | { |
f159f4ed | 857 | } |
f6f91b0d | 858 | #endif |
f159f4ed | 859 | |
94e5a85b | 860 | void __init early_trap_init(void *vectors_base) |
1da177e4 | 861 | { |
55bdd694 | 862 | #ifndef CONFIG_CPU_V7M |
94e5a85b | 863 | unsigned long vectors = (unsigned long)vectors_base; |
7933523d RK |
864 | extern char __stubs_start[], __stubs_end[]; |
865 | extern char __vectors_start[], __vectors_end[]; | |
f928d4f2 | 866 | unsigned i; |
1da177e4 | 867 | |
94e5a85b RK |
868 | vectors_page = vectors_base; |
869 | ||
f928d4f2 RK |
870 | /* |
871 | * Poison the vectors page with an undefined instruction. This | |
872 | * instruction is chosen to be undefined for both ARM and Thumb | |
873 | * ISAs. The Thumb version is an undefined instruction with a | |
874 | * branch back to the undefined instruction. | |
875 | */ | |
876 | for (i = 0; i < PAGE_SIZE / sizeof(u32); i++) | |
877 | ((u32 *)vectors_base)[i] = 0xe7fddef1; | |
878 | ||
7933523d | 879 | /* |
2d2669b6 NP |
880 | * Copy the vectors, stubs and kuser helpers (in entry-armv.S) |
881 | * into the vector page, mapped at 0xffff0000, and ensure these | |
882 | * are visible to the instruction stream. | |
7933523d | 883 | */ |
c760fc19 | 884 | memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start); |
19accfd3 | 885 | memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start); |
e00d349e | 886 | |
f6f91b0d | 887 | kuser_init(vectors_base); |
f159f4ed | 888 | |
19accfd3 | 889 | flush_icache_range(vectors, vectors + PAGE_SIZE * 2); |
1da177e4 | 890 | modify_domain(DOMAIN_USER, DOMAIN_CLIENT); |
55bdd694 CM |
891 | #else /* ifndef CONFIG_CPU_V7M */ |
892 | /* | |
893 | * on V7-M there is no need to copy the vector table to a dedicated | |
894 | * memory area. The address is configurable and so a table in the kernel | |
895 | * image can be used. | |
896 | */ | |
897 | #endif | |
1da177e4 | 898 | } |