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64d2dc38 LL |
1 | /* |
2 | * linux/arch/arm/kernel/swp_emulate.c | |
3 | * | |
4 | * Copyright (C) 2009 ARM Limited | |
5 | * __user_* functions adapted from include/asm/uaccess.h | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * Implements emulation of the SWP/SWPB instructions using load-exclusive and | |
12 | * store-exclusive for processors that have them disabled (or future ones that | |
13 | * might not implement them). | |
14 | * | |
15 | * Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>] | |
16 | * Where: Rt = destination | |
17 | * Rt2 = source | |
18 | * Rn = address | |
19 | */ | |
20 | ||
21 | #include <linux/init.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/proc_fs.h> | |
24 | #include <linux/sched.h> | |
25 | #include <linux/syscalls.h> | |
26 | #include <linux/perf_event.h> | |
27 | ||
c245dcd3 | 28 | #include <asm/opcodes.h> |
64d2dc38 LL |
29 | #include <asm/traps.h> |
30 | #include <asm/uaccess.h> | |
31 | ||
32 | /* | |
33 | * Error-checking SWP macros implemented using ldrex{b}/strex{b} | |
34 | */ | |
35 | #define __user_swpX_asm(data, addr, res, temp, B) \ | |
36 | __asm__ __volatile__( \ | |
37 | " mov %2, %1\n" \ | |
38 | "0: ldrex"B" %1, [%3]\n" \ | |
39 | "1: strex"B" %0, %2, [%3]\n" \ | |
40 | " cmp %0, #0\n" \ | |
41 | " movne %0, %4\n" \ | |
42 | "2:\n" \ | |
43 | " .section .fixup,\"ax\"\n" \ | |
44 | " .align 2\n" \ | |
45 | "3: mov %0, %5\n" \ | |
46 | " b 2b\n" \ | |
47 | " .previous\n" \ | |
48 | " .section __ex_table,\"a\"\n" \ | |
49 | " .align 3\n" \ | |
50 | " .long 0b, 3b\n" \ | |
51 | " .long 1b, 3b\n" \ | |
52 | " .previous" \ | |
53 | : "=&r" (res), "+r" (data), "=&r" (temp) \ | |
54 | : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \ | |
55 | : "cc", "memory") | |
56 | ||
57 | #define __user_swp_asm(data, addr, res, temp) \ | |
58 | __user_swpX_asm(data, addr, res, temp, "") | |
59 | #define __user_swpb_asm(data, addr, res, temp) \ | |
60 | __user_swpX_asm(data, addr, res, temp, "b") | |
61 | ||
62 | /* | |
63 | * Macros/defines for extracting register numbers from instruction. | |
64 | */ | |
65 | #define EXTRACT_REG_NUM(instruction, offset) \ | |
66 | (((instruction) & (0xf << (offset))) >> (offset)) | |
67 | #define RN_OFFSET 16 | |
68 | #define RT_OFFSET 12 | |
69 | #define RT2_OFFSET 0 | |
70 | /* | |
71 | * Bit 22 of the instruction encoding distinguishes between | |
72 | * the SWP and SWPB variants (bit set means SWPB). | |
73 | */ | |
74 | #define TYPE_SWPB (1 << 22) | |
75 | ||
76 | static unsigned long swpcounter; | |
77 | static unsigned long swpbcounter; | |
78 | static unsigned long abtcounter; | |
79 | static pid_t previous_pid; | |
80 | ||
81 | #ifdef CONFIG_PROC_FS | |
82 | static int proc_read_status(char *page, char **start, off_t off, int count, | |
83 | int *eof, void *data) | |
84 | { | |
85 | char *p = page; | |
86 | int len; | |
87 | ||
88 | p += sprintf(p, "Emulated SWP:\t\t%lu\n", swpcounter); | |
89 | p += sprintf(p, "Emulated SWPB:\t\t%lu\n", swpbcounter); | |
90 | p += sprintf(p, "Aborted SWP{B}:\t\t%lu\n", abtcounter); | |
91 | if (previous_pid != 0) | |
92 | p += sprintf(p, "Last process:\t\t%d\n", previous_pid); | |
93 | ||
94 | len = (p - page) - off; | |
95 | if (len < 0) | |
96 | len = 0; | |
97 | ||
98 | *eof = (len <= count) ? 1 : 0; | |
99 | *start = page + off; | |
100 | ||
101 | return len; | |
102 | } | |
103 | #endif | |
104 | ||
105 | /* | |
106 | * Set up process info to signal segmentation fault - called on access error. | |
107 | */ | |
108 | static void set_segfault(struct pt_regs *regs, unsigned long addr) | |
109 | { | |
110 | siginfo_t info; | |
111 | ||
7bf9b7be | 112 | down_read(¤t->mm->mmap_sem); |
64d2dc38 LL |
113 | if (find_vma(current->mm, addr) == NULL) |
114 | info.si_code = SEGV_MAPERR; | |
115 | else | |
116 | info.si_code = SEGV_ACCERR; | |
7bf9b7be | 117 | up_read(¤t->mm->mmap_sem); |
64d2dc38 LL |
118 | |
119 | info.si_signo = SIGSEGV; | |
120 | info.si_errno = 0; | |
121 | info.si_addr = (void *) instruction_pointer(regs); | |
122 | ||
123 | pr_debug("SWP{B} emulation: access caused memory abort!\n"); | |
124 | arm_notify_die("Illegal memory access", regs, &info, 0, 0); | |
125 | ||
126 | abtcounter++; | |
127 | } | |
128 | ||
129 | static int emulate_swpX(unsigned int address, unsigned int *data, | |
130 | unsigned int type) | |
131 | { | |
132 | unsigned int res = 0; | |
133 | ||
134 | if ((type != TYPE_SWPB) && (address & 0x3)) { | |
135 | /* SWP to unaligned address not permitted */ | |
136 | pr_debug("SWP instruction on unaligned pointer!\n"); | |
137 | return -EFAULT; | |
138 | } | |
139 | ||
140 | while (1) { | |
141 | unsigned long temp; | |
142 | ||
143 | /* | |
144 | * Barrier required between accessing protected resource and | |
145 | * releasing a lock for it. Legacy code might not have done | |
146 | * this, and we cannot determine that this is not the case | |
147 | * being emulated, so insert always. | |
148 | */ | |
149 | smp_mb(); | |
150 | ||
151 | if (type == TYPE_SWPB) | |
152 | __user_swpb_asm(*data, address, res, temp); | |
153 | else | |
154 | __user_swp_asm(*data, address, res, temp); | |
155 | ||
156 | if (likely(res != -EAGAIN) || signal_pending(current)) | |
157 | break; | |
158 | ||
159 | cond_resched(); | |
160 | } | |
161 | ||
162 | if (res == 0) { | |
163 | /* | |
25985edc | 164 | * Barrier also required between acquiring a lock for a |
64d2dc38 LL |
165 | * protected resource and accessing the resource. Inserted for |
166 | * same reason as above. | |
167 | */ | |
168 | smp_mb(); | |
169 | ||
170 | if (type == TYPE_SWPB) | |
171 | swpbcounter++; | |
172 | else | |
173 | swpcounter++; | |
174 | } | |
175 | ||
176 | return res; | |
177 | } | |
178 | ||
179 | /* | |
180 | * swp_handler logs the id of calling process, dissects the instruction, sanity | |
181 | * checks the memory location, calls emulate_swpX for the actual operation and | |
182 | * deals with fixup/error handling before returning | |
183 | */ | |
184 | static int swp_handler(struct pt_regs *regs, unsigned int instr) | |
185 | { | |
186 | unsigned int address, destreg, data, type; | |
187 | unsigned int res = 0; | |
188 | ||
a8b0ca17 | 189 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); |
64d2dc38 | 190 | |
c245dcd3 LL |
191 | res = arm_check_condition(instr, regs->ARM_cpsr); |
192 | switch (res) { | |
193 | case ARM_OPCODE_CONDTEST_PASS: | |
194 | break; | |
195 | case ARM_OPCODE_CONDTEST_FAIL: | |
196 | /* Condition failed - return to next instruction */ | |
197 | regs->ARM_pc += 4; | |
198 | return 0; | |
199 | case ARM_OPCODE_CONDTEST_UNCOND: | |
200 | /* If unconditional encoding - not a SWP, undef */ | |
201 | return -EFAULT; | |
202 | default: | |
203 | return -EINVAL; | |
204 | } | |
205 | ||
64d2dc38 LL |
206 | if (current->pid != previous_pid) { |
207 | pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", | |
208 | current->comm, (unsigned long)current->pid); | |
209 | previous_pid = current->pid; | |
210 | } | |
211 | ||
212 | address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)]; | |
213 | data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)]; | |
214 | destreg = EXTRACT_REG_NUM(instr, RT_OFFSET); | |
215 | ||
216 | type = instr & TYPE_SWPB; | |
217 | ||
218 | pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n", | |
219 | EXTRACT_REG_NUM(instr, RN_OFFSET), address, | |
220 | destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data); | |
221 | ||
222 | /* Check access in reasonable access range for both SWP and SWPB */ | |
223 | if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) { | |
224 | pr_debug("SWP{B} emulation: access to %p not allowed!\n", | |
225 | (void *)address); | |
226 | res = -EFAULT; | |
227 | } else { | |
228 | res = emulate_swpX(address, &data, type); | |
229 | } | |
230 | ||
231 | if (res == 0) { | |
232 | /* | |
233 | * On successful emulation, revert the adjustment to the PC | |
234 | * made in kernel/traps.c in order to resume execution at the | |
235 | * instruction following the SWP{B}. | |
236 | */ | |
237 | regs->ARM_pc += 4; | |
238 | regs->uregs[destreg] = data; | |
239 | } else if (res == -EFAULT) { | |
240 | /* | |
241 | * Memory errors do not mean emulation failed. | |
242 | * Set up signal info to return SEGV, then return OK | |
243 | */ | |
244 | set_segfault(regs, address); | |
245 | } | |
246 | ||
247 | return 0; | |
248 | } | |
249 | ||
250 | /* | |
251 | * Only emulate SWP/SWPB executed in ARM state/User mode. | |
252 | * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE. | |
253 | */ | |
254 | static struct undef_hook swp_hook = { | |
255 | .instr_mask = 0x0fb00ff0, | |
256 | .instr_val = 0x01000090, | |
257 | .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT, | |
258 | .cpsr_val = USR_MODE, | |
259 | .fn = swp_handler | |
260 | }; | |
261 | ||
262 | /* | |
263 | * Register handler and create status file in /proc/cpu | |
264 | * Invoked as late_initcall, since not needed before init spawned. | |
265 | */ | |
266 | static int __init swp_emulation_init(void) | |
267 | { | |
268 | #ifdef CONFIG_PROC_FS | |
269 | struct proc_dir_entry *res; | |
270 | ||
271 | res = create_proc_entry("cpu/swp_emulation", S_IRUGO, NULL); | |
272 | ||
273 | if (!res) | |
274 | return -ENOMEM; | |
275 | ||
276 | res->read_proc = proc_read_status; | |
277 | #endif /* CONFIG_PROC_FS */ | |
278 | ||
279 | printk(KERN_NOTICE "Registering SWP/SWPB emulation handler\n"); | |
280 | register_undef_hook(&swp_hook); | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
285 | late_initcall(swp_emulation_init); |