sched/headers: Prepare to remove the <linux/mm_types.h> dependency from <linux/sched.h>
[linux-2.6-block.git] / arch / arm / kernel / suspend.c
CommitLineData
e8ce0eb5 1#include <linux/init.h>
7604537b 2#include <linux/slab.h>
589ee628 3#include <linux/mm_types.h>
e8ce0eb5 4
7604537b 5#include <asm/cacheflush.h>
e6eadc67 6#include <asm/idmap.h>
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RK
7#include <asm/pgalloc.h>
8#include <asm/pgtable.h>
9#include <asm/memory.h>
7604537b 10#include <asm/smp_plat.h>
e8ce0eb5
RK
11#include <asm/suspend.h>
12#include <asm/tlbflush.h>
13
71a8986d 14extern int __cpu_suspend(unsigned long, int (*)(unsigned long), u32 cpuid);
62b2d07c 15extern void cpu_resume_mmu(void);
e8ce0eb5 16
aa1aadc3 17#ifdef CONFIG_MMU
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18int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
19{
20 struct mm_struct *mm = current->active_mm;
71a8986d 21 u32 __mpidr = cpu_logical_map(smp_processor_id());
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WD
22 int ret;
23
24 if (!idmap_pgd)
25 return -EINVAL;
26
27 /*
28 * Provide a temporary page table with an identity mapping for
29 * the MMU-enable code, required for resuming. On successful
30 * resume (indicated by a zero return code), we need to switch
31 * back to the correct page tables.
32 */
71a8986d 33 ret = __cpu_suspend(arg, fn, __mpidr);
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WD
34 if (ret == 0) {
35 cpu_switch_mm(mm->pgd, mm);
36 local_flush_bp_all();
37 local_flush_tlb_all();
38 }
39
40 return ret;
41}
42#else
43int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
44{
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45 u32 __mpidr = cpu_logical_map(smp_processor_id());
46 return __cpu_suspend(arg, fn, __mpidr);
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47}
48#define idmap_pgd NULL
49#endif
50
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51/*
52 * This is called by __cpu_suspend() to save the state, and do whatever
53 * flushing is required to ensure that when the CPU goes to sleep we have
54 * the necessary data available when the caches are not searched.
55 */
56void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
57{
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LP
58 u32 *ctx = ptr;
59
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60 *save_ptr = virt_to_phys(ptr);
61
62 /* This must correspond to the LDM in cpu_resume() assembly */
e6eadc67 63 *ptr++ = virt_to_phys(idmap_pgd);
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64 *ptr++ = sp;
65 *ptr++ = virt_to_phys(cpu_do_resume);
66
67 cpu_do_suspend(ptr);
68
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69 flush_cache_louis();
70
71 /*
72 * flush_cache_louis does not guarantee that
73 * save_ptr and ptr are cleaned to main memory,
74 * just up to the Level of Unification Inner Shareable.
75 * Since the context pointer and context itself
76 * are to be retrieved with the MMU off that
77 * data must be cleaned from all cache levels
78 * to main memory using "area" cache primitives.
79 */
80 __cpuc_flush_dcache_area(ctx, ptrsz);
81 __cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
82
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RK
83 outer_clean_range(*save_ptr, *save_ptr + ptrsz);
84 outer_clean_range(virt_to_phys(save_ptr),
85 virt_to_phys(save_ptr) + sizeof(*save_ptr));
abda1bd5 86}
7604537b
LP
87
88extern struct sleep_save_sp sleep_save_sp;
89
90static int cpu_suspend_alloc_sp(void)
91{
92 void *ctx_ptr;
93 /* ctx_ptr is an array of physical addresses */
94 ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(u32), GFP_KERNEL);
95
96 if (WARN_ON(!ctx_ptr))
97 return -ENOMEM;
98 sleep_save_sp.save_ptr_stash = ctx_ptr;
99 sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
100 sync_cache_w(&sleep_save_sp);
101 return 0;
102}
103early_initcall(cpu_suspend_alloc_sp);