[linux-2.6-block.git] / arch / arm / kernel / smp_tlb.c

/*
 *  linux/arch/arm/kernel/smp_tlb.c
 *
 *  Copyright (C) 2002 ARM Limited, All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/preempt.h>
#include <linux/smp.h>

#include <asm/smp_plat.h>
#include <asm/tlbflush.h>
#include <asm/mmu_context.h>

/**********************************************************************/

/*
 * TLB operations
 */
struct tlb_args {
	struct vm_area_struct *ta_vma;
	unsigned long ta_start;
	unsigned long ta_end;
};

static inline void ipi_flush_tlb_all(void *ignored)
{
	local_flush_tlb_all();
}

static inline void ipi_flush_tlb_mm(void *arg)
{
	struct mm_struct *mm = (struct mm_struct *)arg;

	local_flush_tlb_mm(mm);
}

static inline void ipi_flush_tlb_page(void *arg)
{
	struct tlb_args *ta = (struct tlb_args *)arg;

	local_flush_tlb_page(ta->ta_vma, ta->ta_start);
}

static inline void ipi_flush_tlb_kernel_page(void *arg)
{
	struct tlb_args *ta = (struct tlb_args *)arg;

	local_flush_tlb_kernel_page(ta->ta_start);
}

static inline void ipi_flush_tlb_range(void *arg)
{
	struct tlb_args *ta = (struct tlb_args *)arg;

	local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
}

static inline void ipi_flush_tlb_kernel_range(void *arg)
{
	struct tlb_args *ta = (struct tlb_args *)arg;

	local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
}

static inline void ipi_flush_bp_all(void *ignored)
{
	local_flush_bp_all();
}

#ifdef CONFIG_ARM_ERRATA_798181
bool (*erratum_a15_798181_handler)(void);

static bool erratum_a15_798181_partial(void)
{
	asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
	dsb(ish);
	return false;
}

static bool erratum_a15_798181_broadcast(void)
{
	asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
	dsb(ish);
	return true;
}

void erratum_a15_798181_init(void)
{
	unsigned int midr = read_cpuid_id();
	unsigned int revidr = read_cpuid(CPUID_REVIDR);

	/* Brahma-B15 r0p0..r0p2 affected
	 * Cortex-A15 r0p0..r3p3 w/o ECO fix affected
	 * Fixes applied to A15 with respect to the revision and revidr are:
	 *
	 * r0p0-r2p1: No fixes applied
	 * r2p2,r2p3:
	 *	REVIDR[4]: 798181 Moving a virtual page that is being accessed
	 *		   by an active process can lead to unexpected behavior
	 *	REVIDR[9]: Not defined
	 * r2p4,r3p0,r3p1,r3p2:
	 *	REVIDR[4]: 798181 Moving a virtual page that is being accessed
	 *		   by an active process can lead to unexpected behavior
	 *	REVIDR[9]: 798181 Moving a virtual page that is being accessed
	 *		   by an active process can lead to unexpected behavior
	 *		   - This is an update to a previously released ECO.
	 * r3p3:
	 *	REVIDR[4]: Reserved
	 *	REVIDR[9]: 798181 Moving a virtual page that is being accessed
	 *		   by an active process can lead to unexpected behavior
	 *		   - This is an update to a previously released ECO.
	 *
	 * Handling:
	 *	REVIDR[9] set -> No WA
	 *	REVIDR[4] set, REVIDR[9] cleared -> Partial WA
	 *	Both cleared -> Full WA
	 */
	if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) {
		erratum_a15_798181_handler = erratum_a15_798181_broadcast;
	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) {
		erratum_a15_798181_handler = erratum_a15_798181_broadcast;
	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) {
		if (revidr & 0x10)
			erratum_a15_798181_handler =
				erratum_a15_798181_partial;
		else
			erratum_a15_798181_handler =
				erratum_a15_798181_broadcast;
	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) {
		if ((revidr & 0x210) == 0)
			erratum_a15_798181_handler =
				erratum_a15_798181_broadcast;
		else if (revidr & 0x10)
			erratum_a15_798181_handler =
				erratum_a15_798181_partial;
	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) {
		if ((revidr & 0x200) == 0)
			erratum_a15_798181_handler =
				erratum_a15_798181_partial;
	}
}
#endif

static void ipi_flush_tlb_a15_erratum(void *arg)
{
	dmb();
}

static void broadcast_tlb_a15_erratum(void)
{
	if (!erratum_a15_798181())
		return;

	smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
}

static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
{
	int this_cpu;
	cpumask_t mask = { CPU_BITS_NONE };

	if (!erratum_a15_798181())
		return;

	this_cpu = get_cpu();
	a15_erratum_get_cpumask(this_cpu, mm, &mask);
	smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
	put_cpu();
}

void flush_tlb_all(void)
{
	if (tlb_ops_need_broadcast())
		on_each_cpu(ipi_flush_tlb_all, NULL, 1);
	else
		__flush_tlb_all();
	broadcast_tlb_a15_erratum();
}

void flush_tlb_mm(struct mm_struct *mm)
{
	if (tlb_ops_need_broadcast())
		on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
	else
		__flush_tlb_mm(mm);
	broadcast_tlb_mm_a15_erratum(mm);
}

void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
{
	if (tlb_ops_need_broadcast()) {
		struct tlb_args ta;
		ta.ta_vma = vma;
		ta.ta_start = uaddr;
		on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
					&ta, 1);
	} else
		__flush_tlb_page(vma, uaddr);
	broadcast_tlb_mm_a15_erratum(vma->vm_mm);
}

void flush_tlb_kernel_page(unsigned long kaddr)
{
	if (tlb_ops_need_broadcast()) {
		struct tlb_args ta;
		ta.ta_start = kaddr;
		on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
	} else
		__flush_tlb_kernel_page(kaddr);
	broadcast_tlb_a15_erratum();
}

void flush_tlb_range(struct vm_area_struct *vma,
                     unsigned long start, unsigned long end)
{
	if (tlb_ops_need_broadcast()) {
		struct tlb_args ta;
		ta.ta_vma = vma;
		ta.ta_start = start;
		ta.ta_end = end;
		on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
					&ta, 1);
	} else
		local_flush_tlb_range(vma, start, end);
	broadcast_tlb_mm_a15_erratum(vma->vm_mm);
}

void flush_tlb_kernel_range(unsigned long start, unsigned long end)
{
	if (tlb_ops_need_broadcast()) {
		struct tlb_args ta;
		ta.ta_start = start;
		ta.ta_end = end;
		on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
	} else
		local_flush_tlb_kernel_range(start, end);
	broadcast_tlb_a15_erratum();
}

void flush_bp_all(void)
{
	if (tlb_ops_need_broadcast())
		on_each_cpu(ipi_flush_bp_all, NULL, 1);
	else
		__flush_bp_all();
}
Commit	Line	Data
03b505ea RK	1	/*
	2	* linux/arch/arm/kernel/smp_tlb.c
	3	*
	4	* Copyright (C) 2002 ARM Limited, All Rights Reserved.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10	#include <linux/preempt.h>
	11	#include <linux/smp.h>
	12
	13	#include <asm/smp_plat.h>
	14	#include <asm/tlbflush.h>
93dc6887	15	#include <asm/mmu_context.h>
03b505ea	16
03b505ea RK	17	/**********************************************************************/
	18
	19	/*
	20	* TLB operations
	21	*/
	22	struct tlb_args {
	23	struct vm_area_struct *ta_vma;
	24	unsigned long ta_start;
	25	unsigned long ta_end;
	26	};
	27
	28	static inline void ipi_flush_tlb_all(void *ignored)
	29	{
	30	local_flush_tlb_all();
	31	}
	32
	33	static inline void ipi_flush_tlb_mm(void *arg)
	34	{
	35	struct mm_struct mm = (struct mm_struct )arg;
	36
	37	local_flush_tlb_mm(mm);
	38	}
	39
	40	static inline void ipi_flush_tlb_page(void *arg)
	41	{
	42	struct tlb_args ta = (struct tlb_args )arg;
	43
	44	local_flush_tlb_page(ta->ta_vma, ta->ta_start);
	45	}
	46
	47	static inline void ipi_flush_tlb_kernel_page(void *arg)
	48	{
	49	struct tlb_args ta = (struct tlb_args )arg;
	50
	51	local_flush_tlb_kernel_page(ta->ta_start);
	52	}
	53
	54	static inline void ipi_flush_tlb_range(void *arg)
	55	{
	56	struct tlb_args ta = (struct tlb_args )arg;
	57
	58	local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
	59	}
	60
	61	static inline void ipi_flush_tlb_kernel_range(void *arg)
	62	{
	63	struct tlb_args ta = (struct tlb_args )arg;
	64
	65	local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
	66	}
	67
862c588f WD	68	static inline void ipi_flush_bp_all(void *ignored)
	69	{
	70	local_flush_bp_all();
	71	}
	72
92871b94 RH	73	#ifdef CONFIG_ARM_ERRATA_798181
	74	bool (*erratum_a15_798181_handler)(void);
	75
	76	static bool erratum_a15_798181_partial(void)
	77	{
	78	asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
	79	dsb(ish);
	80	return false;
	81	}
	82
	83	static bool erratum_a15_798181_broadcast(void)
	84	{
	85	asm("mcr p15, 0, %0, c8, c3, 1" : : "r" (0));
	86	dsb(ish);
	87	return true;
	88	}
	89
	90	void erratum_a15_798181_init(void)
	91	{
	92	unsigned int midr = read_cpuid_id();
	93	unsigned int revidr = read_cpuid(CPUID_REVIDR);
	94
04fcab32	95	/* Brahma-B15 r0p0..r0p2 affected
f6492164 MGP	96	* Cortex-A15 r0p0..r3p3 w/o ECO fix affected
	97	* Fixes applied to A15 with respect to the revision and revidr are:
	98	*
	99	* r0p0-r2p1: No fixes applied
	100	* r2p2,r2p3:
	101	* REVIDR[4]: 798181 Moving a virtual page that is being accessed
	102	* by an active process can lead to unexpected behavior
	103	* REVIDR[9]: Not defined
	104	* r2p4,r3p0,r3p1,r3p2:
	105	* REVIDR[4]: 798181 Moving a virtual page that is being accessed
	106	* by an active process can lead to unexpected behavior
	107	* REVIDR[9]: 798181 Moving a virtual page that is being accessed
	108	* by an active process can lead to unexpected behavior
	109	* - This is an update to a previously released ECO.
	110	* r3p3:
	111	* REVIDR[4]: Reserved
	112	* REVIDR[9]: 798181 Moving a virtual page that is being accessed
	113	* by an active process can lead to unexpected behavior
	114	* - This is an update to a previously released ECO.
	115	*
	116	* Handling:
	117	* REVIDR[9] set -> No WA
	118	* REVIDR[4] set, REVIDR[9] cleared -> Partial WA
	119	* Both cleared -> Full WA
	120	*/
	121	if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) {
92871b94	122	erratum_a15_798181_handler = erratum_a15_798181_broadcast;
f6492164 MGP	123	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) {
	124	erratum_a15_798181_handler = erratum_a15_798181_broadcast;
	125	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) {
04fcab32 GF	126	if (revidr & 0x10)
	127	erratum_a15_798181_handler =
	128	erratum_a15_798181_partial;
	129	else
	130	erratum_a15_798181_handler =
	131	erratum_a15_798181_broadcast;
f6492164 MGP	132	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) {
	133	if ((revidr & 0x210) == 0)
	134	erratum_a15_798181_handler =
	135	erratum_a15_798181_broadcast;
	136	else if (revidr & 0x10)
	137	erratum_a15_798181_handler =
	138	erratum_a15_798181_partial;
	139	} else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) {
	140	if ((revidr & 0x200) == 0)
	141	erratum_a15_798181_handler =
	142	erratum_a15_798181_partial;
04fcab32	143	}
92871b94 RH	144	}
	145	#endif
	146
93dc6887 CM	147	static void ipi_flush_tlb_a15_erratum(void *arg)
	148	{
	149	dmb();
	150	}
	151
	152	static void broadcast_tlb_a15_erratum(void)
	153	{
	154	if (!erratum_a15_798181())
	155	return;
	156
3eb0be30	157	smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
93dc6887 CM	158	}
	159
	160	static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
	161	{
0d0752bc	162	int this_cpu;
93dc6887 CM	163	cpumask_t mask = { CPU_BITS_NONE };
	164
	165	if (!erratum_a15_798181())
	166	return;
	167
3eb0be30	168	this_cpu = get_cpu();
0d0752bc	169	a15_erratum_get_cpumask(this_cpu, mm, &mask);
93dc6887	170	smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
3eb0be30	171	put_cpu();
93dc6887 CM	172	}
93dc6887 CM	173
03b505ea RK	174	void flush_tlb_all(void)
	175	{
	176	if (tlb_ops_need_broadcast())
	177	on_each_cpu(ipi_flush_tlb_all, NULL, 1);
	178	else
f0915781	179	__flush_tlb_all();
93dc6887	180	broadcast_tlb_a15_erratum();
03b505ea RK	181	}
	182
	183	void flush_tlb_mm(struct mm_struct *mm)
	184	{
	185	if (tlb_ops_need_broadcast())
3fc498f1	186	on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
03b505ea	187	else
f0915781	188	__flush_tlb_mm(mm);
93dc6887	189	broadcast_tlb_mm_a15_erratum(mm);
03b505ea RK	190	}
	191
	192	void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
	193	{
	194	if (tlb_ops_need_broadcast()) {
	195	struct tlb_args ta;
	196	ta.ta_vma = vma;
	197	ta.ta_start = uaddr;
3fc498f1 GBY	198	on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
3fc498f1 GBY	199	&ta, 1);
03b505ea	200	} else
f0915781	201	__flush_tlb_page(vma, uaddr);
93dc6887	202	broadcast_tlb_mm_a15_erratum(vma->vm_mm);
03b505ea RK	203	}
	204
	205	void flush_tlb_kernel_page(unsigned long kaddr)
	206	{
	207	if (tlb_ops_need_broadcast()) {
	208	struct tlb_args ta;
	209	ta.ta_start = kaddr;
	210	on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
	211	} else
f0915781	212	__flush_tlb_kernel_page(kaddr);
93dc6887	213	broadcast_tlb_a15_erratum();
03b505ea RK	214	}
	215
	216	void flush_tlb_range(struct vm_area_struct *vma,
	217	unsigned long start, unsigned long end)
	218	{
	219	if (tlb_ops_need_broadcast()) {
	220	struct tlb_args ta;
	221	ta.ta_vma = vma;
	222	ta.ta_start = start;
	223	ta.ta_end = end;
3fc498f1 GBY	224	on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
3fc498f1 GBY	225	&ta, 1);
03b505ea RK	226	} else
03b505ea RK	227	local_flush_tlb_range(vma, start, end);
93dc6887	228	broadcast_tlb_mm_a15_erratum(vma->vm_mm);
03b505ea RK	229	}
	230
	231	void flush_tlb_kernel_range(unsigned long start, unsigned long end)
	232	{
	233	if (tlb_ops_need_broadcast()) {
	234	struct tlb_args ta;
	235	ta.ta_start = start;
	236	ta.ta_end = end;
	237	on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
	238	} else
	239	local_flush_tlb_kernel_range(start, end);
93dc6887	240	broadcast_tlb_a15_erratum();
03b505ea RK	241	}
03b505ea RK	242
862c588f WD	243	void flush_bp_all(void)
	244	{
	245	if (tlb_ops_need_broadcast())
	246	on_each_cpu(ipi_flush_bp_all, NULL, 1);
	247	else
2c813980	248	__flush_bp_all();
862c588f	249	}