[linux-block.git] / arch / arm / kernel / module.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 *  linux/arch/arm/kernel/module.c
 *
 *  Copyright (C) 2002 Russell King.
 *  Modified for nommu by Hyok S. Choi
 *
 * Module allocation method suggested by Andi Kleen.
 */
#include <linux/module.h>
#include <linux/moduleloader.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/elf.h>
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <linux/string.h>
#include <linux/gfp.h>

#include <asm/pgtable.h>
#include <asm/sections.h>
#include <asm/smp_plat.h>
#include <asm/unwind.h>
#include <asm/opcodes.h>

#ifdef CONFIG_XIP_KERNEL
/*
 * The XIP kernel text is mapped in the module area for modules and
 * some other stuff to work without any indirect relocations.
 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
 */
#undef MODULES_VADDR
#define MODULES_VADDR	(((unsigned long)_exiprom + ~PMD_MASK) & PMD_MASK)
#endif

#ifdef CONFIG_MMU
void *module_alloc(unsigned long size)
{
	gfp_t gfp_mask = GFP_KERNEL;
	void *p;

	/* Silence the initial allocation */
	if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS))
		gfp_mask |= __GFP_NOWARN;

	p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
				gfp_mask, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
				__builtin_return_address(0));
	if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) || p)
		return p;
	return __vmalloc_node_range(size, 1,  VMALLOC_START, VMALLOC_END,
				GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
				__builtin_return_address(0));
}
#endif

bool module_exit_section(const char *name)
{
	return strstarts(name, ".exit") ||
		strstarts(name, ".ARM.extab.exit") ||
		strstarts(name, ".ARM.exidx.exit");
}

int
apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
	       unsigned int relindex, struct module *module)
{
	Elf32_Shdr *symsec = sechdrs + symindex;
	Elf32_Shdr *relsec = sechdrs + relindex;
	Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
	Elf32_Rel *rel = (void *)relsec->sh_addr;
	unsigned int i;

	for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
		unsigned long loc;
		Elf32_Sym *sym;
		const char *symname;
		s32 offset;
		u32 tmp;
#ifdef CONFIG_THUMB2_KERNEL
		u32 upper, lower, sign, j1, j2;
#endif

		offset = ELF32_R_SYM(rel->r_info);
		if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
			pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
				module->name, relindex, i);
			return -ENOEXEC;
		}

		sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
		symname = strtab + sym->st_name;

		if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) {
			pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
			       module->name, relindex, i, symname,
			       rel->r_offset, dstsec->sh_size);
			return -ENOEXEC;
		}

		loc = dstsec->sh_addr + rel->r_offset;

		switch (ELF32_R_TYPE(rel->r_info)) {
		case R_ARM_NONE:
			/* ignore */
			break;

		case R_ARM_ABS32:
		case R_ARM_TARGET1:
			*(u32 *)loc += sym->st_value;
			break;

		case R_ARM_PC24:
		case R_ARM_CALL:
		case R_ARM_JUMP24:
			if (sym->st_value & 3) {
				pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n",
				       module->name, relindex, i, symname);
				return -ENOEXEC;
			}

			offset = __mem_to_opcode_arm(*(u32 *)loc);
			offset = (offset & 0x00ffffff) << 2;
			if (offset & 0x02000000)
				offset -= 0x04000000;

			offset += sym->st_value - loc;

			/*
			 * Route through a PLT entry if 'offset' exceeds the
			 * supported range. Note that 'offset + loc + 8'
			 * contains the absolute jump target, i.e.,
			 * @sym + addend, corrected for the +8 PC bias.
			 */
			if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
			    (offset <= (s32)0xfe000000 ||
			     offset >= (s32)0x02000000))
				offset = get_module_plt(module, loc,
							offset + loc + 8)
					 - loc - 8;

			if (offset <= (s32)0xfe000000 ||
			    offset >= (s32)0x02000000) {
				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
				       module->name, relindex, i, symname,
				       ELF32_R_TYPE(rel->r_info), loc,
				       sym->st_value);
				return -ENOEXEC;
			}

			offset >>= 2;
			offset &= 0x00ffffff;

			*(u32 *)loc &= __opcode_to_mem_arm(0xff000000);
			*(u32 *)loc |= __opcode_to_mem_arm(offset);
			break;

	       case R_ARM_V4BX:
		       /* Preserve Rm and the condition code. Alter
			* other bits to re-code instruction as
			* MOV PC,Rm.
			*/
		       *(u32 *)loc &= __opcode_to_mem_arm(0xf000000f);
		       *(u32 *)loc |= __opcode_to_mem_arm(0x01a0f000);
		       break;

		case R_ARM_PREL31:
			offset = (*(s32 *)loc << 1) >> 1; /* sign extend */
			offset += sym->st_value - loc;
			if (offset >= 0x40000000 || offset < -0x40000000) {
				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
				       module->name, relindex, i, symname,
				       ELF32_R_TYPE(rel->r_info), loc,
				       sym->st_value);
				return -ENOEXEC;
			}
			*(u32 *)loc &= 0x80000000;
			*(u32 *)loc |= offset & 0x7fffffff;
			break;

		case R_ARM_MOVW_ABS_NC:
		case R_ARM_MOVT_ABS:
			offset = tmp = __mem_to_opcode_arm(*(u32 *)loc);
			offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
			offset = (offset ^ 0x8000) - 0x8000;

			offset += sym->st_value;
			if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS)
				offset >>= 16;

			tmp &= 0xfff0f000;
			tmp |= ((offset & 0xf000) << 4) |
				(offset & 0x0fff);

			*(u32 *)loc = __opcode_to_mem_arm(tmp);
			break;

#ifdef CONFIG_THUMB2_KERNEL
		case R_ARM_THM_CALL:
		case R_ARM_THM_JUMP24:
			/*
			 * For function symbols, only Thumb addresses are
			 * allowed (no interworking).
			 *
			 * For non-function symbols, the destination
			 * has no specific ARM/Thumb disposition, so
			 * the branch is resolved under the assumption
			 * that interworking is not required.
			 */
			if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC &&
			    !(sym->st_value & 1)) {
				pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n",
				       module->name, relindex, i, symname);
				return -ENOEXEC;
			}

			upper = __mem_to_opcode_thumb16(*(u16 *)loc);
			lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));

			/*
			 * 25 bit signed address range (Thumb-2 BL and B.W
			 * instructions):
			 *   S:I1:I2:imm10:imm11:0
			 * where:
			 *   S     = upper[10]   = offset[24]
			 *   I1    = ~(J1 ^ S)   = offset[23]
			 *   I2    = ~(J2 ^ S)   = offset[22]
			 *   imm10 = upper[9:0]  = offset[21:12]
			 *   imm11 = lower[10:0] = offset[11:1]
			 *   J1    = lower[13]
			 *   J2    = lower[11]
			 */
			sign = (upper >> 10) & 1;
			j1 = (lower >> 13) & 1;
			j2 = (lower >> 11) & 1;
			offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) |
				((~(j2 ^ sign) & 1) << 22) |
				((upper & 0x03ff) << 12) |
				((lower & 0x07ff) << 1);
			if (offset & 0x01000000)
				offset -= 0x02000000;
			offset += sym->st_value - loc;

			/*
			 * Route through a PLT entry if 'offset' exceeds the
			 * supported range.
			 */
			if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
			    (offset <= (s32)0xff000000 ||
			     offset >= (s32)0x01000000))
				offset = get_module_plt(module, loc,
							offset + loc + 4)
					 - loc - 4;

			if (offset <= (s32)0xff000000 ||
			    offset >= (s32)0x01000000) {
				pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
				       module->name, relindex, i, symname,
				       ELF32_R_TYPE(rel->r_info), loc,
				       sym->st_value);
				return -ENOEXEC;
			}

			sign = (offset >> 24) & 1;
			j1 = sign ^ (~(offset >> 23) & 1);
			j2 = sign ^ (~(offset >> 22) & 1);
			upper = (u16)((upper & 0xf800) | (sign << 10) |
					    ((offset >> 12) & 0x03ff));
			lower = (u16)((lower & 0xd000) |
				      (j1 << 13) | (j2 << 11) |
				      ((offset >> 1) & 0x07ff));

			*(u16 *)loc = __opcode_to_mem_thumb16(upper);
			*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
			break;

		case R_ARM_THM_MOVW_ABS_NC:
		case R_ARM_THM_MOVT_ABS:
			upper = __mem_to_opcode_thumb16(*(u16 *)loc);
			lower = __mem_to_opcode_thumb16(*(u16 *)(loc + 2));

			/*
			 * MOVT/MOVW instructions encoding in Thumb-2:
			 *
			 * i	= upper[10]
			 * imm4	= upper[3:0]
			 * imm3	= lower[14:12]
			 * imm8	= lower[7:0]
			 *
			 * imm16 = imm4:i:imm3:imm8
			 */
			offset = ((upper & 0x000f) << 12) |
				((upper & 0x0400) << 1) |
				((lower & 0x7000) >> 4) | (lower & 0x00ff);
			offset = (offset ^ 0x8000) - 0x8000;
			offset += sym->st_value;

			if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
				offset >>= 16;

			upper = (u16)((upper & 0xfbf0) |
				      ((offset & 0xf000) >> 12) |
				      ((offset & 0x0800) >> 1));
			lower = (u16)((lower & 0x8f00) |
				      ((offset & 0x0700) << 4) |
				      (offset & 0x00ff));
			*(u16 *)loc = __opcode_to_mem_thumb16(upper);
			*(u16 *)(loc + 2) = __opcode_to_mem_thumb16(lower);
			break;
#endif

		default:
			pr_err("%s: unknown relocation: %u\n",
			       module->name, ELF32_R_TYPE(rel->r_info));
			return -ENOEXEC;
		}
	}
	return 0;
}

struct mod_unwind_map {
	const Elf_Shdr *unw_sec;
	const Elf_Shdr *txt_sec;
};

static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
	const Elf_Shdr *sechdrs, const char *name)
{
	const Elf_Shdr *s, *se;
	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;

	for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
		if (strcmp(name, secstrs + s->sh_name) == 0)
			return s;

	return NULL;
}

extern void fixup_pv_table(const void *, unsigned long);
extern void fixup_smp(const void *, unsigned long);

int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
		    struct module *mod)
{
	const Elf_Shdr *s = NULL;
#ifdef CONFIG_ARM_UNWIND
	const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
	const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
	struct mod_unwind_map maps[ARM_SEC_MAX];
	int i;

	memset(maps, 0, sizeof(maps));

	for (s = sechdrs; s < sechdrs_end; s++) {
		const char *secname = secstrs + s->sh_name;

		if (!(s->sh_flags & SHF_ALLOC))
			continue;

		if (strcmp(".ARM.exidx.init.text", secname) == 0)
			maps[ARM_SEC_INIT].unw_sec = s;
		else if (strcmp(".ARM.exidx", secname) == 0)
			maps[ARM_SEC_CORE].unw_sec = s;
		else if (strcmp(".ARM.exidx.exit.text", secname) == 0)
			maps[ARM_SEC_EXIT].unw_sec = s;
		else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0)
			maps[ARM_SEC_UNLIKELY].unw_sec = s;
		else if (strcmp(".ARM.exidx.text.hot", secname) == 0)
			maps[ARM_SEC_HOT].unw_sec = s;
		else if (strcmp(".init.text", secname) == 0)
			maps[ARM_SEC_INIT].txt_sec = s;
		else if (strcmp(".text", secname) == 0)
			maps[ARM_SEC_CORE].txt_sec = s;
		else if (strcmp(".exit.text", secname) == 0)
			maps[ARM_SEC_EXIT].txt_sec = s;
		else if (strcmp(".text.unlikely", secname) == 0)
			maps[ARM_SEC_UNLIKELY].txt_sec = s;
		else if (strcmp(".text.hot", secname) == 0)
			maps[ARM_SEC_HOT].txt_sec = s;
	}

	for (i = 0; i < ARM_SEC_MAX; i++)
		if (maps[i].unw_sec && maps[i].txt_sec)
			mod->arch.unwind[i] =
				unwind_table_add(maps[i].unw_sec->sh_addr,
					         maps[i].unw_sec->sh_size,
					         maps[i].txt_sec->sh_addr,
					         maps[i].txt_sec->sh_size);
#endif
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
	s = find_mod_section(hdr, sechdrs, ".pv_table");
	if (s)
		fixup_pv_table((void *)s->sh_addr, s->sh_size);
#endif
	s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
	if (s && !is_smp())
#ifdef CONFIG_SMP_ON_UP
		fixup_smp((void *)s->sh_addr, s->sh_size);
#else
		return -EINVAL;
#endif
	return 0;
}

void
module_arch_cleanup(struct module *mod)
{
#ifdef CONFIG_ARM_UNWIND
	int i;

	for (i = 0; i < ARM_SEC_MAX; i++)
		if (mod->arch.unwind[i])
			unwind_table_del(mod->arch.unwind[i]);
#endif
}
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
1da177e4 LT	2	/*
	3	* linux/arch/arm/kernel/module.c
	4	*
	5	* Copyright (C) 2002 Russell King.
6a570b28	6	* Modified for nommu by Hyok S. Choi
1da177e4	7	*
1da177e4 LT	8	* Module allocation method suggested by Andi Kleen.
1da177e4 LT	9	*/
1da177e4	10	#include <linux/module.h>
f339ab3d	11	#include <linux/moduleloader.h>
1da177e4	12	#include <linux/kernel.h>
27ac792c	13	#include <linux/mm.h>
1da177e4 LT	14	#include <linux/elf.h>
1da177e4 LT	15	#include <linux/vmalloc.h>
1da177e4 LT	16	#include <linux/fs.h>
1da177e4 LT	17	#include <linux/string.h>
5a0e3ad6	18	#include <linux/gfp.h>
1da177e4 LT	19
1da177e4 LT	20	#include <asm/pgtable.h>
37efe642	21	#include <asm/sections.h>
4a9cb360	22	#include <asm/smp_plat.h>
2e1926e7	23	#include <asm/unwind.h>
f592d323	24	#include <asm/opcodes.h>
1da177e4 LT	25
	26	#ifdef CONFIG_XIP_KERNEL
	27	/*
	28	* The XIP kernel text is mapped in the module area for modules and
	29	* some other stuff to work without any indirect relocations.
ab4f2ee1	30	* MODULES_VADDR is redefined here and not in asm/memory.h to avoid
1da177e4 LT	31	* recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
1da177e4 LT	32	*/
ab4f2ee1	33	#undef MODULES_VADDR
02afa9a8	34	#define MODULES_VADDR (((unsigned long)_exiprom + ~PMD_MASK) & PMD_MASK)
1da177e4 LT	35	#endif
1da177e4 LT	36
6a570b28	37	#ifdef CONFIG_MMU
1da177e4 LT	38	void *module_alloc(unsigned long size)
1da177e4 LT	39	{
75d24d96 FF	40	gfp_t gfp_mask = GFP_KERNEL;
	41	void *p;
	42
	43	/* Silence the initial allocation */
	44	if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS))
	45	gfp_mask \|= __GFP_NOWARN;
	46
	47	p = __vmalloc_node_range(size, 1, MODULES_VADDR, MODULES_END,
	48	gfp_mask, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
7d485f64 AB	49	__builtin_return_address(0));
	50	if (!IS_ENABLED(CONFIG_ARM_MODULE_PLTS) \|\| p)
	51	return p;
	52	return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END,
cb9e3c29	53	GFP_KERNEL, PAGE_KERNEL_EXEC, 0, NUMA_NO_NODE,
d0a21265	54	__builtin_return_address(0));
1da177e4	55	}
66574cc0	56	#endif
1da177e4	57
70bac08d MS	58	bool module_exit_section(const char *name)
	59	{
	60	return strstarts(name, ".exit") \|\|
	61	strstarts(name, ".ARM.extab.exit") \|\|
	62	strstarts(name, ".ARM.exidx.exit");
	63	}
	64
1da177e4 LT	65	int
	66	apply_relocate(Elf32_Shdr sechdrs, const char strtab, unsigned int symindex,
	67	unsigned int relindex, struct module *module)
	68	{
	69	Elf32_Shdr *symsec = sechdrs + symindex;
	70	Elf32_Shdr *relsec = sechdrs + relindex;
	71	Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
	72	Elf32_Rel rel = (void )relsec->sh_addr;
	73	unsigned int i;
	74
	75	for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
	76	unsigned long loc;
	77	Elf32_Sym *sym;
68e6fad4	78	const char *symname;
1da177e4	79	s32 offset;
f592d323	80	u32 tmp;
b7493156	81	#ifdef CONFIG_THUMB2_KERNEL
adca6dc2	82	u32 upper, lower, sign, j1, j2;
b7493156	83	#endif
1da177e4 LT	84
	85	offset = ELF32_R_SYM(rel->r_info);
	86	if (offset < 0 \|\| offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
68e6fad4	87	pr_err("%s: section %u reloc %u: bad relocation sym offset\n",
1da177e4 LT	88	module->name, relindex, i);
	89	return -ENOEXEC;
	90	}
	91
	92	sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
68e6fad4	93	symname = strtab + sym->st_name;
1da177e4 LT	94
1da177e4 LT	95	if (rel->r_offset < 0 \|\| rel->r_offset > dstsec->sh_size - sizeof(u32)) {
68e6fad4 RK	96	pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n",
	97	module->name, relindex, i, symname,
	98	rel->r_offset, dstsec->sh_size);
1da177e4 LT	99	return -ENOEXEC;
	100	}
	101
	102	loc = dstsec->sh_addr + rel->r_offset;
	103
	104	switch (ELF32_R_TYPE(rel->r_info)) {
2e1926e7 CM	105	case R_ARM_NONE:
	106	/* ignore */
	107	break;
	108
1da177e4	109	case R_ARM_ABS32:
55f0fb6a	110	case R_ARM_TARGET1:
1da177e4 LT	111	(u32 )loc += sym->st_value;
	112	break;
	113
	114	case R_ARM_PC24:
c2e26114 DJ	115	case R_ARM_CALL:
c2e26114 DJ	116	case R_ARM_JUMP24:
2b8514d0 AB	117	if (sym->st_value & 3) {
	118	pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n",
	119	module->name, relindex, i, symname);
	120	return -ENOEXEC;
	121	}
	122
f592d323 BD	123	offset = __mem_to_opcode_arm((u32 )loc);
f592d323 BD	124	offset = (offset & 0x00ffffff) << 2;
1da177e4 LT	125	if (offset & 0x02000000)
	126	offset -= 0x04000000;
	127
	128	offset += sym->st_value - loc;
7d485f64 AB	129
	130	/*
	131	* Route through a PLT entry if 'offset' exceeds the
	132	* supported range. Note that 'offset + loc + 8'
	133	* contains the absolute jump target, i.e.,
	134	* @sym + addend, corrected for the +8 PC bias.
	135	*/
	136	if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
	137	(offset <= (s32)0xfe000000 \|\|
	138	offset >= (s32)0x02000000))
	139	offset = get_module_plt(module, loc,
	140	offset + loc + 8)
	141	- loc - 8;
	142
2b8514d0	143	if (offset <= (s32)0xfe000000 \|\|
c5f12503	144	offset >= (s32)0x02000000) {
68e6fad4 RK	145	pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
	146	module->name, relindex, i, symname,
	147	ELF32_R_TYPE(rel->r_info), loc,
	148	sym->st_value);
1da177e4 LT	149	return -ENOEXEC;
	150	}
	151
	152	offset >>= 2;
f592d323	153	offset &= 0x00ffffff;
1da177e4	154
f592d323 BD	155	(u32 )loc &= __opcode_to_mem_arm(0xff000000);
f592d323 BD	156	(u32 )loc \|= __opcode_to_mem_arm(offset);
1da177e4 LT	157	break;
1da177e4 LT	158
4731f8b6 DS	159	case R_ARM_V4BX:
	160	/* Preserve Rm and the condition code. Alter
	161	* other bits to re-code instruction as
	162	* MOV PC,Rm.
	163	*/
f592d323 BD	164	(u32 )loc &= __opcode_to_mem_arm(0xf000000f);
f592d323 BD	165	(u32 )loc \|= __opcode_to_mem_arm(0x01a0f000);
4731f8b6 DS	166	break;
4731f8b6 DS	167
2e1926e7	168	case R_ARM_PREL31:
050d18d1 AB	169	offset = ((s32 )loc << 1) >> 1; /* sign extend */
	170	offset += sym->st_value - loc;
	171	if (offset >= 0x40000000 \|\| offset < -0x40000000) {
	172	pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
	173	module->name, relindex, i, symname,
	174	ELF32_R_TYPE(rel->r_info), loc,
	175	sym->st_value);
	176	return -ENOEXEC;
	177	}
	178	(u32 )loc &= 0x80000000;
	179	(u32 )loc \|= offset & 0x7fffffff;
2e1926e7 CM	180	break;
2e1926e7 CM	181
ae51e609 PG	182	case R_ARM_MOVW_ABS_NC:
ae51e609 PG	183	case R_ARM_MOVT_ABS:
f592d323	184	offset = tmp = __mem_to_opcode_arm((u32 )loc);
ae51e609 PG	185	offset = ((offset & 0xf0000) >> 4) \| (offset & 0xfff);
	186	offset = (offset ^ 0x8000) - 0x8000;
	187
	188	offset += sym->st_value;
	189	if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS)
	190	offset >>= 16;
	191
f592d323 BD	192	tmp &= 0xfff0f000;
	193	tmp \|= ((offset & 0xf000) << 4) \|
	194	(offset & 0x0fff);
	195
	196	(u32 )loc = __opcode_to_mem_arm(tmp);
ae51e609 PG	197	break;
ae51e609 PG	198
b7493156	199	#ifdef CONFIG_THUMB2_KERNEL
adca6dc2 CM	200	case R_ARM_THM_CALL:
adca6dc2 CM	201	case R_ARM_THM_JUMP24:
2b8514d0 AB	202	/*
	203	* For function symbols, only Thumb addresses are
	204	* allowed (no interworking).
	205	*
	206	* For non-function symbols, the destination
	207	* has no specific ARM/Thumb disposition, so
	208	* the branch is resolved under the assumption
	209	* that interworking is not required.
	210	*/
	211	if (ELF32_ST_TYPE(sym->st_info) == STT_FUNC &&
	212	!(sym->st_value & 1)) {
	213	pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n",
	214	module->name, relindex, i, symname);
	215	return -ENOEXEC;
	216	}
	217
f592d323 BD	218	upper = __mem_to_opcode_thumb16((u16 )loc);
f592d323 BD	219	lower = __mem_to_opcode_thumb16((u16 )(loc + 2));
adca6dc2 CM	220
	221	/*
	222	* 25 bit signed address range (Thumb-2 BL and B.W
	223	* instructions):
	224	* S:I1:I2:imm10:imm11:0
	225	* where:
	226	* S = upper[10] = offset[24]
	227	* I1 = ~(J1 ^ S) = offset[23]
	228	* I2 = ~(J2 ^ S) = offset[22]
	229	* imm10 = upper[9:0] = offset[21:12]
	230	* imm11 = lower[10:0] = offset[11:1]
	231	* J1 = lower[13]
	232	* J2 = lower[11]
	233	*/
	234	sign = (upper >> 10) & 1;
	235	j1 = (lower >> 13) & 1;
	236	j2 = (lower >> 11) & 1;
	237	offset = (sign << 24) \| ((~(j1 ^ sign) & 1) << 23) \|
	238	((~(j2 ^ sign) & 1) << 22) \|
	239	((upper & 0x03ff) << 12) \|
	240	((lower & 0x07ff) << 1);
	241	if (offset & 0x01000000)
	242	offset -= 0x02000000;
	243	offset += sym->st_value - loc;
	244
7d485f64 AB	245	/*
	246	* Route through a PLT entry if 'offset' exceeds the
	247	* supported range.
	248	*/
	249	if (IS_ENABLED(CONFIG_ARM_MODULE_PLTS) &&
	250	(offset <= (s32)0xff000000 \|\|
	251	offset >= (s32)0x01000000))
	252	offset = get_module_plt(module, loc,
	253	offset + loc + 4)
	254	- loc - 4;
	255
2b8514d0	256	if (offset <= (s32)0xff000000 \|\|
adca6dc2	257	offset >= (s32)0x01000000) {
68e6fad4 RK	258	pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n",
	259	module->name, relindex, i, symname,
	260	ELF32_R_TYPE(rel->r_info), loc,
	261	sym->st_value);
adca6dc2 CM	262	return -ENOEXEC;
	263	}
	264
	265	sign = (offset >> 24) & 1;
	266	j1 = sign ^ (~(offset >> 23) & 1);
	267	j2 = sign ^ (~(offset >> 22) & 1);
f592d323	268	upper = (u16)((upper & 0xf800) \| (sign << 10) \|
adca6dc2	269	((offset >> 12) & 0x03ff));
f592d323 BD	270	lower = (u16)((lower & 0xd000) \|
	271	(j1 << 13) \| (j2 << 11) \|
	272	((offset >> 1) & 0x07ff));
	273
	274	(u16 )loc = __opcode_to_mem_thumb16(upper);
	275	(u16 )(loc + 2) = __opcode_to_mem_thumb16(lower);
adca6dc2 CM	276	break;
adca6dc2 CM	277
8dd47741 CM	278	case R_ARM_THM_MOVW_ABS_NC:
8dd47741 CM	279	case R_ARM_THM_MOVT_ABS:
f592d323 BD	280	upper = __mem_to_opcode_thumb16((u16 )loc);
f592d323 BD	281	lower = __mem_to_opcode_thumb16((u16 )(loc + 2));
8dd47741 CM	282
	283	/*
	284	* MOVT/MOVW instructions encoding in Thumb-2:
	285	*
	286	* i = upper[10]
	287	* imm4 = upper[3:0]
	288	* imm3 = lower[14:12]
	289	* imm8 = lower[7:0]
	290	*
	291	* imm16 = imm4:i:imm3:imm8
	292	*/
	293	offset = ((upper & 0x000f) << 12) \|
	294	((upper & 0x0400) << 1) \|
	295	((lower & 0x7000) >> 4) \| (lower & 0x00ff);
	296	offset = (offset ^ 0x8000) - 0x8000;
	297	offset += sym->st_value;
	298
	299	if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
	300	offset >>= 16;
	301
f592d323 BD	302	upper = (u16)((upper & 0xfbf0) \|
	303	((offset & 0xf000) >> 12) \|
	304	((offset & 0x0800) >> 1));
	305	lower = (u16)((lower & 0x8f00) \|
	306	((offset & 0x0700) << 4) \|
	307	(offset & 0x00ff));
	308	(u16 )loc = __opcode_to_mem_thumb16(upper);
	309	(u16 )(loc + 2) = __opcode_to_mem_thumb16(lower);
8dd47741	310	break;
b7493156	311	#endif
8dd47741	312
1da177e4	313	default:
4ed89f22	314	pr_err("%s: unknown relocation: %u\n",
1da177e4 LT	315	module->name, ELF32_R_TYPE(rel->r_info));
	316	return -ENOEXEC;
	317	}
	318	}
	319	return 0;
	320	}
	321
8931360e RK	322	struct mod_unwind_map {
	323	const Elf_Shdr *unw_sec;
	324	const Elf_Shdr *txt_sec;
	325	};
	326
4a9cb360 RK	327	static const Elf_Shdr find_mod_section(const Elf32_Ehdr hdr,
	328	const Elf_Shdr sechdrs, const char name)
	329	{
	330	const Elf_Shdr s, se;
	331	const char secstrs = (void )hdr + sechdrs[hdr->e_shstrndx].sh_offset;
	332
	333	for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
	334	if (strcmp(name, secstrs + s->sh_name) == 0)
	335	return s;
	336
	337	return NULL;
	338	}
	339
dc21af99	340	extern void fixup_pv_table(const void *, unsigned long);
4a9cb360 RK	341	extern void fixup_smp(const void *, unsigned long);
4a9cb360 RK	342
8931360e RK	343	int module_finalize(const Elf32_Ehdr hdr, const Elf_Shdr sechdrs,
8931360e RK	344	struct module *mod)
2e1926e7	345	{
dc21af99	346	const Elf_Shdr *s = NULL;
8931360e RK	347	#ifdef CONFIG_ARM_UNWIND
8931360e RK	348	const char secstrs = (void )hdr + sechdrs[hdr->e_shstrndx].sh_offset;
4a9cb360	349	const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
8931360e	350	struct mod_unwind_map maps[ARM_SEC_MAX];
e5f7772e	351	int i;
8931360e RK	352
	353	memset(maps, 0, sizeof(maps));
	354
	355	for (s = sechdrs; s < sechdrs_end; s++) {
	356	const char *secname = secstrs + s->sh_name;
	357
50005a8d RK	358	if (!(s->sh_flags & SHF_ALLOC))
	359	continue;
	360
8931360e RK	361	if (strcmp(".ARM.exidx.init.text", secname) == 0)
8931360e RK	362	maps[ARM_SEC_INIT].unw_sec = s;
8931360e RK	363	else if (strcmp(".ARM.exidx", secname) == 0)
	364	maps[ARM_SEC_CORE].unw_sec = s;
	365	else if (strcmp(".ARM.exidx.exit.text", secname) == 0)
	366	maps[ARM_SEC_EXIT].unw_sec = s;
849b882b DA	367	else if (strcmp(".ARM.exidx.text.unlikely", secname) == 0)
	368	maps[ARM_SEC_UNLIKELY].unw_sec = s;
	369	else if (strcmp(".ARM.exidx.text.hot", secname) == 0)
	370	maps[ARM_SEC_HOT].unw_sec = s;
8931360e RK	371	else if (strcmp(".init.text", secname) == 0)
8931360e RK	372	maps[ARM_SEC_INIT].txt_sec = s;
8931360e RK	373	else if (strcmp(".text", secname) == 0)
	374	maps[ARM_SEC_CORE].txt_sec = s;
	375	else if (strcmp(".exit.text", secname) == 0)
	376	maps[ARM_SEC_EXIT].txt_sec = s;
849b882b DA	377	else if (strcmp(".text.unlikely", secname) == 0)
	378	maps[ARM_SEC_UNLIKELY].txt_sec = s;
	379	else if (strcmp(".text.hot", secname) == 0)
	380	maps[ARM_SEC_HOT].txt_sec = s;
e5f7772e	381	}
2e1926e7	382
8931360e RK	383	for (i = 0; i < ARM_SEC_MAX; i++)
	384	if (maps[i].unw_sec && maps[i].txt_sec)
	385	mod->arch.unwind[i] =
	386	unwind_table_add(maps[i].unw_sec->sh_addr,
	387	maps[i].unw_sec->sh_size,
	388	maps[i].txt_sec->sh_addr,
	389	maps[i].txt_sec->sh_size);
dc21af99 RK	390	#endif
	391	#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
	392	s = find_mod_section(hdr, sechdrs, ".pv_table");
	393	if (s)
	394	fixup_pv_table((void *)s->sh_addr, s->sh_size);
2e1926e7	395	#endif
4a9cb360 RK	396	s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
4a9cb360 RK	397	if (s && !is_smp())
20feaab0	398	#ifdef CONFIG_SMP_ON_UP
4a9cb360	399	fixup_smp((void *)s->sh_addr, s->sh_size);
20feaab0 RK	400	#else
	401	return -EINVAL;
	402	#endif
1da177e4 LT	403	return 0;
	404	}
	405
	406	void
	407	module_arch_cleanup(struct module *mod)
	408	{
8931360e RK	409	#ifdef CONFIG_ARM_UNWIND
	410	int i;
	411
	412	for (i = 0; i < ARM_SEC_MAX; i++)
	413	if (mod->arch.unwind[i])
	414	unwind_table_del(mod->arch.unwind[i]);
	415	#endif
1da177e4	416	}