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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/irq.c | |
3 | * | |
4 | * Copyright (C) 1992 Linus Torvalds | |
5 | * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. | |
6 | * | |
8749af68 RK |
7 | * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation. |
8 | * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and | |
9 | * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>. | |
10 | * | |
1da177e4 LT |
11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * This file contains the code used by various IRQ handling routines: | |
16 | * asking for different IRQ's should be done through these routines | |
17 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
18 | * shouldn't result in any weird surprises, and installing new handlers | |
19 | * should be easier. | |
20 | * | |
21 | * IRQ's are in fact implemented a bit like signal handlers for the kernel. | |
22 | * Naturally it's not a 1:1 relation, but there are similarities. | |
23 | */ | |
1da177e4 LT |
24 | #include <linux/kernel_stat.h> |
25 | #include <linux/module.h> | |
26 | #include <linux/signal.h> | |
27 | #include <linux/ioport.h> | |
28 | #include <linux/interrupt.h> | |
4a2581a0 | 29 | #include <linux/irq.h> |
1da177e4 LT |
30 | #include <linux/slab.h> |
31 | #include <linux/random.h> | |
32 | #include <linux/smp.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/seq_file.h> | |
35 | #include <linux/errno.h> | |
36 | #include <linux/list.h> | |
37 | #include <linux/kallsyms.h> | |
38 | #include <linux/proc_fs.h> | |
39 | ||
1da177e4 | 40 | #include <asm/system.h> |
897d8527 | 41 | #include <asm/mach/irq.h> |
8749af68 | 42 | #include <asm/mach/time.h> |
1da177e4 | 43 | |
1da177e4 LT |
44 | /* |
45 | * No architecture-specific irq_finish function defined in arm/arch/irqs.h. | |
46 | */ | |
47 | #ifndef irq_finish | |
48 | #define irq_finish(irq) do { } while (0) | |
49 | #endif | |
50 | ||
4a2581a0 TG |
51 | void (*init_arch_irq)(void) __initdata = NULL; |
52 | unsigned long irq_err_count; | |
1da177e4 LT |
53 | |
54 | int show_interrupts(struct seq_file *p, void *v) | |
55 | { | |
56 | int i = *(loff_t *) v, cpu; | |
57 | struct irqaction * action; | |
58 | unsigned long flags; | |
59 | ||
60 | if (i == 0) { | |
61 | char cpuname[12]; | |
62 | ||
63 | seq_printf(p, " "); | |
64 | for_each_present_cpu(cpu) { | |
65 | sprintf(cpuname, "CPU%d", cpu); | |
66 | seq_printf(p, " %10s", cpuname); | |
67 | } | |
68 | seq_putc(p, '\n'); | |
69 | } | |
70 | ||
71 | if (i < NR_IRQS) { | |
4a2581a0 TG |
72 | spin_lock_irqsave(&irq_desc[i].lock, flags); |
73 | action = irq_desc[i].action; | |
1da177e4 LT |
74 | if (!action) |
75 | goto unlock; | |
76 | ||
77 | seq_printf(p, "%3d: ", i); | |
78 | for_each_present_cpu(cpu) | |
79 | seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]); | |
38c677cb | 80 | seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-"); |
1da177e4 LT |
81 | seq_printf(p, " %s", action->name); |
82 | for (action = action->next; action; action = action->next) | |
83 | seq_printf(p, ", %s", action->name); | |
84 | ||
85 | seq_putc(p, '\n'); | |
86 | unlock: | |
4a2581a0 | 87 | spin_unlock_irqrestore(&irq_desc[i].lock, flags); |
1da177e4 LT |
88 | } else if (i == NR_IRQS) { |
89 | #ifdef CONFIG_ARCH_ACORN | |
90 | show_fiq_list(p, v); | |
91 | #endif | |
92 | #ifdef CONFIG_SMP | |
93 | show_ipi_list(p); | |
37ee16ae | 94 | show_local_irqs(p); |
1da177e4 LT |
95 | #endif |
96 | seq_printf(p, "Err: %10lu\n", irq_err_count); | |
97 | } | |
98 | return 0; | |
99 | } | |
100 | ||
4a2581a0 TG |
101 | /* Handle bad interrupts */ |
102 | static struct irq_desc bad_irq_desc = { | |
103 | .handle_irq = handle_bad_irq, | |
6fd7ad96 | 104 | .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock), |
4a2581a0 | 105 | }; |
1da177e4 | 106 | |
e65e49d0 MT |
107 | #ifdef CONFIG_CPUMASK_OFFSTACK |
108 | /* We are not allocating bad_irq_desc.affinity or .pending_mask */ | |
109 | #error "ARM architecture does not support CONFIG_CPUMASK_OFFSTACK." | |
110 | #endif | |
111 | ||
1da177e4 LT |
112 | /* |
113 | * do_IRQ handles all hardware IRQ's. Decoded IRQs should not | |
114 | * come via this function. Instead, they should provide their | |
115 | * own 'handler' | |
116 | */ | |
7ab3f8d5 | 117 | asmlinkage void __exception asm_do_IRQ(unsigned int irq, struct pt_regs *regs) |
1da177e4 | 118 | { |
e6300155 | 119 | struct pt_regs *old_regs = set_irq_regs(regs); |
d8aa0251 DB |
120 | |
121 | irq_enter(); | |
1da177e4 LT |
122 | |
123 | /* | |
124 | * Some hardware gives randomly wrong interrupts. Rather | |
125 | * than crashing, do something sensible. | |
126 | */ | |
127 | if (irq >= NR_IRQS) | |
d8aa0251 DB |
128 | handle_bad_irq(irq, &bad_irq_desc); |
129 | else | |
130 | generic_handle_irq(irq); | |
1da177e4 | 131 | |
4a2581a0 | 132 | /* AT91 specific workaround */ |
1da177e4 LT |
133 | irq_finish(irq); |
134 | ||
1da177e4 | 135 | irq_exit(); |
e6300155 | 136 | set_irq_regs(old_regs); |
1da177e4 LT |
137 | } |
138 | ||
1da177e4 LT |
139 | void set_irq_flags(unsigned int irq, unsigned int iflags) |
140 | { | |
10dd5ce2 | 141 | struct irq_desc *desc; |
1da177e4 LT |
142 | unsigned long flags; |
143 | ||
144 | if (irq >= NR_IRQS) { | |
145 | printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); | |
146 | return; | |
147 | } | |
148 | ||
149 | desc = irq_desc + irq; | |
4a2581a0 TG |
150 | spin_lock_irqsave(&desc->lock, flags); |
151 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; | |
152 | if (iflags & IRQF_VALID) | |
153 | desc->status &= ~IRQ_NOREQUEST; | |
154 | if (iflags & IRQF_PROBE) | |
155 | desc->status &= ~IRQ_NOPROBE; | |
156 | if (!(iflags & IRQF_NOAUTOEN)) | |
157 | desc->status &= ~IRQ_NOAUTOEN; | |
158 | spin_unlock_irqrestore(&desc->lock, flags); | |
1da177e4 LT |
159 | } |
160 | ||
161 | void __init init_IRQ(void) | |
162 | { | |
1da177e4 LT |
163 | int irq; |
164 | ||
4a2581a0 | 165 | for (irq = 0; irq < NR_IRQS; irq++) |
d7e25f33 | 166 | irq_desc[irq].status |= IRQ_NOREQUEST | IRQ_NOPROBE; |
4a2581a0 | 167 | |
1da177e4 | 168 | #ifdef CONFIG_SMP |
e65e49d0 | 169 | cpumask_setall(bad_irq_desc.affinity); |
1da177e4 LT |
170 | bad_irq_desc.cpu = smp_processor_id(); |
171 | #endif | |
1da177e4 | 172 | init_arch_irq(); |
1da177e4 LT |
173 | } |
174 | ||
a054a811 | 175 | #ifdef CONFIG_HOTPLUG_CPU |
f7ede370 | 176 | |
10dd5ce2 | 177 | static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu) |
f7ede370 TG |
178 | { |
179 | pr_debug("IRQ%u: moving from cpu%u to cpu%u\n", irq, desc->cpu, cpu); | |
180 | ||
181 | spin_lock_irq(&desc->lock); | |
0de26520 | 182 | desc->chip->set_affinity(irq, cpumask_of(cpu)); |
f7ede370 TG |
183 | spin_unlock_irq(&desc->lock); |
184 | } | |
185 | ||
a054a811 RK |
186 | /* |
187 | * The CPU has been marked offline. Migrate IRQs off this CPU. If | |
188 | * the affinity settings do not allow other CPUs, force them onto any | |
189 | * available CPU. | |
190 | */ | |
191 | void migrate_irqs(void) | |
192 | { | |
193 | unsigned int i, cpu = smp_processor_id(); | |
194 | ||
195 | for (i = 0; i < NR_IRQS; i++) { | |
10dd5ce2 | 196 | struct irq_desc *desc = irq_desc + i; |
a054a811 RK |
197 | |
198 | if (desc->cpu == cpu) { | |
e65e49d0 MT |
199 | unsigned int newcpu = cpumask_any_and(desc->affinity, |
200 | cpu_online_mask); | |
201 | if (newcpu >= nr_cpu_ids) { | |
a054a811 RK |
202 | if (printk_ratelimit()) |
203 | printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", | |
204 | i, cpu); | |
205 | ||
e65e49d0 MT |
206 | cpumask_setall(desc->affinity); |
207 | newcpu = cpumask_any_and(desc->affinity, | |
208 | cpu_online_mask); | |
a054a811 RK |
209 | } |
210 | ||
211 | route_irq(desc, i, newcpu); | |
212 | } | |
213 | } | |
214 | } | |
215 | #endif /* CONFIG_HOTPLUG_CPU */ |