Merge branches 'release' and 'doc' into release
[linux-2.6-block.git] / arch / arm / kernel / head-nommu.S
CommitLineData
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1/*
2 * linux/arch/arm/kernel/head-nommu.S
3 *
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (C) 2003-2006 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Common kernel startup code (non-paged MM)
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12 *
13 */
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14#include <linux/linkage.h>
15#include <linux/init.h>
16
17#include <asm/assembler.h>
18#include <asm/mach-types.h>
75d90832 19#include <asm/ptrace.h>
2eb9d315 20#include <asm/asm-offsets.h>
3b920cef 21#include <asm/thread_info.h>
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22#include <asm/system.h>
23
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24/*
25 * Kernel startup entry point.
26 * ---------------------------
27 *
28 * This is normally called from the decompressor code. The requirements
29 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
30 * r1 = machine nr.
31 *
32 * See linux/arch/arm/tools/mach-types for the complete list of machine
33 * numbers for r1.
34 *
35 */
08fdffd4 36 .section ".text.head", "ax"
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37 .type stext, %function
38ENTRY(stext)
801194e3 39 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
75d90832 40 @ and irqs disabled
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41#ifndef CONFIG_CPU_CP15
42 ldr r9, =CONFIG_PROCESSOR_ID
43#else
75d90832 44 mrc p15, 0, r9, c0, c0 @ get processor id
f12d0d7c 45#endif
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46 bl __lookup_processor_type @ r5=procinfo r9=cpuid
47 movs r10, r5 @ invalid processor (r5=0)?
48 beq __error_p @ yes, error 'p'
49 bl __lookup_machine_type @ r5=machinfo
50 movs r8, r5 @ invalid machine (r5=0)?
51 beq __error_a @ yes, error 'a'
52
53 ldr r13, __switch_data @ address to jump to after
54 @ the initialization is done
55 adr lr, __after_proc_init @ return (PIC) address
56 add pc, r10, #PROCINFO_INITFUNC
57
58/*
59 * Set the Control Register and Read the process ID.
60 */
61 .type __after_proc_init, %function
62__after_proc_init:
f12d0d7c 63#ifdef CONFIG_CPU_CP15
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64 mrc p15, 0, r0, c1, c0, 0 @ read control reg
65#ifdef CONFIG_ALIGNMENT_TRAP
66 orr r0, r0, #CR_A
67#else
68 bic r0, r0, #CR_A
69#endif
70#ifdef CONFIG_CPU_DCACHE_DISABLE
71 bic r0, r0, #CR_C
72#endif
73#ifdef CONFIG_CPU_BPREDICT_DISABLE
74 bic r0, r0, #CR_Z
75#endif
76#ifdef CONFIG_CPU_ICACHE_DISABLE
77 bic r0, r0, #CR_I
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78#endif
79#ifdef CONFIG_CPU_HIGH_VECTOR
80 orr r0, r0, #CR_V
81#else
82 bic r0, r0, #CR_V
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83#endif
84 mcr p15, 0, r0, c1, c0, 0 @ write control reg
f12d0d7c 85#endif /* CONFIG_CPU_CP15 */
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86
87 mov pc, r13 @ clear the BSS and jump
88 @ to start_kernel
3b920cef 89 .ltorg
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90
91#include "head-common.S"