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75d90832 HC |
1 | /* |
2 | * linux/arch/arm/kernel/head-common.S | |
3 | * | |
4 | * Copyright (C) 1994-2002 Russell King | |
5 | * Copyright (c) 2003 ARM Limited | |
6 | * All Rights Reserved | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | */ | |
13 | ||
9c4c9f38 GU |
14 | #define ATAG_CORE 0x54410001 |
15 | #define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) | |
31abdb74 | 16 | #define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2) |
9c4c9f38 | 17 | |
4c2896e8 GL |
18 | #ifdef CONFIG_CPU_BIG_ENDIAN |
19 | #define OF_DT_MAGIC 0xd00dfeed | |
20 | #else | |
21 | #define OF_DT_MAGIC 0xedfe0dd0 /* 0xd00dfeed in big-endian */ | |
22 | #endif | |
23 | ||
75d90832 HC |
24 | /* |
25 | * Exception handling. Something went wrong and we can't proceed. We | |
26 | * ought to tell the user, but since we don't have any guarantee that | |
27 | * we're even running on the right architecture, we do virtually nothing. | |
28 | * | |
29 | * If CONFIG_DEBUG_LL is set we try to print out something about the error | |
30 | * and hope for the best (useful if bootloader fails to pass a proper | |
31 | * machine ID for example). | |
32 | */ | |
80924ac5 | 33 | __HEAD |
9d20fdd5 BG |
34 | |
35 | /* Determine validity of the r2 atags pointer. The heuristic requires | |
36 | * that the pointer be aligned, in the first 16k of physical RAM and | |
4c2896e8 GL |
37 | * that the ATAG_CORE marker is first and present. If CONFIG_OF_FLATTREE |
38 | * is selected, then it will also accept a dtb pointer. Future revisions | |
9d20fdd5 BG |
39 | * of this function may be more lenient with the physical address and |
40 | * may also be able to move the ATAGS block if necessary. | |
41 | * | |
9d20fdd5 | 42 | * Returns: |
4c2896e8 | 43 | * r2 either valid atags pointer, valid dtb pointer, or zero |
9d20fdd5 BG |
44 | * r5, r6 corrupted |
45 | */ | |
9d20fdd5 BG |
46 | __vet_atags: |
47 | tst r2, #0x3 @ aligned? | |
48 | bne 1f | |
49 | ||
4c2896e8 GL |
50 | ldr r5, [r2, #0] |
51 | #ifdef CONFIG_OF_FLATTREE | |
52 | ldr r6, =OF_DT_MAGIC @ is it a DTB? | |
53 | cmp r5, r6 | |
54 | beq 2f | |
55 | #endif | |
56 | cmp r5, #ATAG_CORE_SIZE @ is first tag ATAG_CORE? | |
31abdb74 | 57 | cmpne r5, #ATAG_CORE_SIZE_EMPTY |
9d20fdd5 BG |
58 | bne 1f |
59 | ldr r5, [r2, #4] | |
60 | ldr r6, =ATAG_CORE | |
61 | cmp r5, r6 | |
62 | bne 1f | |
63 | ||
4c2896e8 | 64 | 2: mov pc, lr @ atag/dtb pointer is ok |
9d20fdd5 BG |
65 | |
66 | 1: mov r2, #0 | |
67 | mov pc, lr | |
93ed3970 | 68 | ENDPROC(__vet_atags) |
5085f3ff | 69 | |
17bb5e2c RK |
70 | /* |
71 | * The following fragment of code is executed with the MMU on in MMU mode, | |
72 | * and uses absolute addresses; this is not position independent. | |
73 | * | |
74 | * r0 = cp#15 control register | |
75 | * r1 = machine ID | |
4c2896e8 | 76 | * r2 = atags/dtb pointer |
17bb5e2c RK |
77 | * r9 = processor ID |
78 | */ | |
79 | __INIT | |
80 | __mmap_switched: | |
81 | adr r3, __mmap_switched_data | |
82 | ||
83 | ldmia r3!, {r4, r5, r6, r7} | |
84 | cmp r4, r5 @ Copy data segment if needed | |
85 | 1: cmpne r5, r6 | |
86 | ldrne fp, [r4], #4 | |
87 | strne fp, [r5], #4 | |
88 | bne 1b | |
89 | ||
90 | mov fp, #0 @ Clear BSS (and zero fp) | |
91 | 1: cmp r6, r7 | |
92 | strcc fp, [r6],#4 | |
93 | bcc 1b | |
94 | ||
95 | ARM( ldmia r3, {r4, r5, r6, r7, sp}) | |
96 | THUMB( ldmia r3, {r4, r5, r6, r7} ) | |
97 | THUMB( ldr sp, [r3, #16] ) | |
98 | str r9, [r4] @ Save processor ID | |
99 | str r1, [r5] @ Save machine type | |
100 | str r2, [r6] @ Save atags pointer | |
b849a60e UKK |
101 | cmp r7, #0 |
102 | bicne r4, r0, #CR_A @ Clear 'A' bit | |
103 | stmneia r7, {r0, r4} @ Save control register values | |
17bb5e2c RK |
104 | b start_kernel |
105 | ENDPROC(__mmap_switched) | |
106 | ||
107 | .align 2 | |
108 | .type __mmap_switched_data, %object | |
109 | __mmap_switched_data: | |
110 | .long __data_loc @ r4 | |
a0a55682 | 111 | .long _sdata @ r5 |
17bb5e2c RK |
112 | .long __bss_start @ r6 |
113 | .long _end @ r7 | |
114 | .long processor_id @ r4 | |
115 | .long __machine_arch_type @ r5 | |
116 | .long __atags_pointer @ r6 | |
b849a60e | 117 | #ifdef CONFIG_CPU_CP15 |
17bb5e2c | 118 | .long cr_alignment @ r7 |
b849a60e UKK |
119 | #else |
120 | .long 0 @ r7 | |
121 | #endif | |
17bb5e2c RK |
122 | .long init_thread_union + THREAD_START_SP @ sp |
123 | .size __mmap_switched_data, . - __mmap_switched_data | |
124 | ||
17bb5e2c RK |
125 | /* |
126 | * This provides a C-API version of __lookup_processor_type | |
127 | */ | |
128 | ENTRY(lookup_processor_type) | |
129 | stmfd sp!, {r4 - r6, r9, lr} | |
130 | mov r9, r0 | |
131 | bl __lookup_processor_type | |
132 | mov r0, r5 | |
133 | ldmfd sp!, {r4 - r6, r9, pc} | |
134 | ENDPROC(lookup_processor_type) | |
135 | ||
8c69d7af SW |
136 | __FINIT |
137 | .text | |
138 | ||
5085f3ff RK |
139 | /* |
140 | * Read processor ID register (CP#15, CR0), and look up in the linker-built | |
141 | * supported processor list. Note that we can't use the absolute addresses | |
142 | * for the __proc_info lists since we aren't running with the MMU on | |
143 | * (and therefore, we are not in the correct address space). We have to | |
144 | * calculate the offset. | |
145 | * | |
146 | * r9 = cpuid | |
147 | * Returns: | |
148 | * r3, r4, r6 corrupted | |
149 | * r5 = proc_info pointer in physical address space | |
150 | * r9 = cpuid (preserved) | |
151 | */ | |
5085f3ff RK |
152 | __lookup_processor_type: |
153 | adr r3, __lookup_processor_type_data | |
154 | ldmia r3, {r4 - r6} | |
155 | sub r3, r3, r4 @ get offset between virt&phys | |
156 | add r5, r5, r3 @ convert virt addresses to | |
157 | add r6, r6, r3 @ physical address space | |
158 | 1: ldmia r5, {r3, r4} @ value, mask | |
159 | and r4, r4, r9 @ mask wanted bits | |
160 | teq r3, r4 | |
161 | beq 2f | |
162 | add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list) | |
163 | cmp r5, r6 | |
164 | blo 1b | |
165 | mov r5, #0 @ unknown processor | |
166 | 2: mov pc, lr | |
167 | ENDPROC(__lookup_processor_type) | |
168 | ||
169 | /* | |
170 | * Look in <asm/procinfo.h> for information about the __proc_info structure. | |
171 | */ | |
172 | .align 2 | |
173 | .type __lookup_processor_type_data, %object | |
174 | __lookup_processor_type_data: | |
175 | .long . | |
176 | .long __proc_info_begin | |
177 | .long __proc_info_end | |
178 | .size __lookup_processor_type_data, . - __lookup_processor_type_data | |
c083c660 | 179 | |
b3634575 TP |
180 | __error_lpae: |
181 | #ifdef CONFIG_DEBUG_LL | |
182 | adr r0, str_lpae | |
183 | bl printascii | |
184 | b __error | |
185 | str_lpae: .asciz "\nError: Kernel with LPAE support, but CPU does not support LPAE.\n" | |
186 | #else | |
187 | b __error | |
188 | #endif | |
189 | .align | |
190 | ENDPROC(__error_lpae) | |
191 | ||
c083c660 RK |
192 | __error_p: |
193 | #ifdef CONFIG_DEBUG_LL | |
194 | adr r0, str_p1 | |
195 | bl printascii | |
196 | mov r0, r9 | |
197 | bl printhex8 | |
198 | adr r0, str_p2 | |
199 | bl printascii | |
200 | b __error | |
201 | str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x" | |
202 | str_p2: .asciz ").\n" | |
203 | .align | |
204 | #endif | |
205 | ENDPROC(__error_p) | |
206 | ||
207 | __error: | |
208 | #ifdef CONFIG_ARCH_RPC | |
209 | /* | |
210 | * Turn the screen red on a error - RiscPC only. | |
211 | */ | |
212 | mov r0, #0x02000000 | |
213 | mov r3, #0x11 | |
214 | orr r3, r3, r3, lsl #8 | |
215 | orr r3, r3, r3, lsl #16 | |
216 | str r3, [r0], #4 | |
217 | str r3, [r0], #4 | |
218 | str r3, [r0], #4 | |
219 | str r3, [r0], #4 | |
220 | #endif | |
221 | 1: mov r0, r0 | |
222 | b 1b | |
223 | ENDPROC(__error) |