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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/dma.c | |
3 | * | |
4 | * Copyright (C) 1995-2000 Russell King | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * Front-end to the DMA handling. This handles the allocation/freeing | |
11 | * of DMA channels, and provides a unified interface to the machines | |
12 | * DMA facilities. | |
13 | */ | |
14 | #include <linux/module.h> | |
1da177e4 LT |
15 | #include <linux/init.h> |
16 | #include <linux/spinlock.h> | |
17 | #include <linux/errno.h> | |
d667522f | 18 | #include <linux/scatterlist.h> |
e193ba29 RK |
19 | #include <linux/seq_file.h> |
20 | #include <linux/proc_fs.h> | |
1da177e4 LT |
21 | |
22 | #include <asm/dma.h> | |
23 | ||
24 | #include <asm/mach/dma.h> | |
25 | ||
bd31b859 | 26 | DEFINE_RAW_SPINLOCK(dma_spin_lock); |
d7b4a756 | 27 | EXPORT_SYMBOL(dma_spin_lock); |
1da177e4 | 28 | |
2f757f2a | 29 | static dma_t *dma_chan[MAX_DMA_CHANNELS]; |
1da177e4 | 30 | |
3afb6e9c RK |
31 | static inline dma_t *dma_channel(unsigned int chan) |
32 | { | |
2f757f2a | 33 | if (chan >= MAX_DMA_CHANNELS) |
3afb6e9c RK |
34 | return NULL; |
35 | ||
2f757f2a RK |
36 | return dma_chan[chan]; |
37 | } | |
38 | ||
39 | int __init isa_dma_add(unsigned int chan, dma_t *dma) | |
40 | { | |
41 | if (!dma->d_ops) | |
42 | return -EINVAL; | |
d667522f RK |
43 | |
44 | sg_init_table(&dma->buf, 1); | |
45 | ||
2f757f2a RK |
46 | if (dma_chan[chan]) |
47 | return -EBUSY; | |
48 | dma_chan[chan] = dma; | |
49 | return 0; | |
3afb6e9c RK |
50 | } |
51 | ||
1da177e4 LT |
52 | /* |
53 | * Request DMA channel | |
54 | * | |
55 | * On certain platforms, we have to allocate an interrupt as well... | |
56 | */ | |
1df81302 | 57 | int request_dma(unsigned int chan, const char *device_id) |
1da177e4 | 58 | { |
3afb6e9c | 59 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
60 | int ret; |
61 | ||
3afb6e9c | 62 | if (!dma) |
1da177e4 LT |
63 | goto bad_dma; |
64 | ||
65 | if (xchg(&dma->lock, 1) != 0) | |
66 | goto busy; | |
67 | ||
68 | dma->device_id = device_id; | |
69 | dma->active = 0; | |
70 | dma->invalid = 1; | |
71 | ||
72 | ret = 0; | |
73 | if (dma->d_ops->request) | |
1df81302 | 74 | ret = dma->d_ops->request(chan, dma); |
1da177e4 LT |
75 | |
76 | if (ret) | |
77 | xchg(&dma->lock, 0); | |
78 | ||
79 | return ret; | |
80 | ||
81 | bad_dma: | |
4ed89f22 | 82 | pr_err("dma: trying to allocate DMA%d\n", chan); |
1da177e4 LT |
83 | return -EINVAL; |
84 | ||
85 | busy: | |
86 | return -EBUSY; | |
87 | } | |
d7b4a756 | 88 | EXPORT_SYMBOL(request_dma); |
1da177e4 LT |
89 | |
90 | /* | |
91 | * Free DMA channel | |
92 | * | |
93 | * On certain platforms, we have to free interrupt as well... | |
94 | */ | |
1df81302 | 95 | void free_dma(unsigned int chan) |
1da177e4 | 96 | { |
3afb6e9c | 97 | dma_t *dma = dma_channel(chan); |
1da177e4 | 98 | |
3afb6e9c | 99 | if (!dma) |
1da177e4 LT |
100 | goto bad_dma; |
101 | ||
102 | if (dma->active) { | |
4ed89f22 | 103 | pr_err("dma%d: freeing active DMA\n", chan); |
1df81302 | 104 | dma->d_ops->disable(chan, dma); |
1da177e4 LT |
105 | dma->active = 0; |
106 | } | |
107 | ||
108 | if (xchg(&dma->lock, 0) != 0) { | |
109 | if (dma->d_ops->free) | |
1df81302 | 110 | dma->d_ops->free(chan, dma); |
1da177e4 LT |
111 | return; |
112 | } | |
113 | ||
4ed89f22 | 114 | pr_err("dma%d: trying to free free DMA\n", chan); |
1da177e4 LT |
115 | return; |
116 | ||
117 | bad_dma: | |
4ed89f22 | 118 | pr_err("dma: trying to free DMA%d\n", chan); |
1da177e4 | 119 | } |
d7b4a756 | 120 | EXPORT_SYMBOL(free_dma); |
1da177e4 LT |
121 | |
122 | /* Set DMA Scatter-Gather list | |
123 | */ | |
1df81302 | 124 | void set_dma_sg (unsigned int chan, struct scatterlist *sg, int nr_sg) |
1da177e4 | 125 | { |
3afb6e9c | 126 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
127 | |
128 | if (dma->active) | |
4ed89f22 | 129 | pr_err("dma%d: altering DMA SG while DMA active\n", chan); |
1da177e4 LT |
130 | |
131 | dma->sg = sg; | |
132 | dma->sgcount = nr_sg; | |
1da177e4 LT |
133 | dma->invalid = 1; |
134 | } | |
d7b4a756 | 135 | EXPORT_SYMBOL(set_dma_sg); |
1da177e4 LT |
136 | |
137 | /* Set DMA address | |
138 | * | |
139 | * Copy address to the structure, and set the invalid bit | |
140 | */ | |
1df81302 | 141 | void __set_dma_addr (unsigned int chan, void *addr) |
1da177e4 | 142 | { |
3afb6e9c | 143 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
144 | |
145 | if (dma->active) | |
4ed89f22 | 146 | pr_err("dma%d: altering DMA address while DMA active\n", chan); |
1da177e4 | 147 | |
7cdad482 RK |
148 | dma->sg = NULL; |
149 | dma->addr = addr; | |
1da177e4 LT |
150 | dma->invalid = 1; |
151 | } | |
d7b4a756 | 152 | EXPORT_SYMBOL(__set_dma_addr); |
1da177e4 LT |
153 | |
154 | /* Set DMA byte count | |
155 | * | |
156 | * Copy address to the structure, and set the invalid bit | |
157 | */ | |
1df81302 | 158 | void set_dma_count (unsigned int chan, unsigned long count) |
1da177e4 | 159 | { |
3afb6e9c | 160 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
161 | |
162 | if (dma->active) | |
4ed89f22 | 163 | pr_err("dma%d: altering DMA count while DMA active\n", chan); |
1da177e4 | 164 | |
7cdad482 RK |
165 | dma->sg = NULL; |
166 | dma->count = count; | |
1da177e4 LT |
167 | dma->invalid = 1; |
168 | } | |
d7b4a756 | 169 | EXPORT_SYMBOL(set_dma_count); |
1da177e4 LT |
170 | |
171 | /* Set DMA direction mode | |
172 | */ | |
f0ffc816 | 173 | void set_dma_mode (unsigned int chan, unsigned int mode) |
1da177e4 | 174 | { |
3afb6e9c | 175 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
176 | |
177 | if (dma->active) | |
4ed89f22 | 178 | pr_err("dma%d: altering DMA mode while DMA active\n", chan); |
1da177e4 LT |
179 | |
180 | dma->dma_mode = mode; | |
181 | dma->invalid = 1; | |
182 | } | |
d7b4a756 | 183 | EXPORT_SYMBOL(set_dma_mode); |
1da177e4 LT |
184 | |
185 | /* Enable DMA channel | |
186 | */ | |
1df81302 | 187 | void enable_dma (unsigned int chan) |
1da177e4 | 188 | { |
3afb6e9c | 189 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
190 | |
191 | if (!dma->lock) | |
192 | goto free_dma; | |
193 | ||
194 | if (dma->active == 0) { | |
195 | dma->active = 1; | |
1df81302 | 196 | dma->d_ops->enable(chan, dma); |
1da177e4 LT |
197 | } |
198 | return; | |
199 | ||
200 | free_dma: | |
4ed89f22 | 201 | pr_err("dma%d: trying to enable free DMA\n", chan); |
1da177e4 LT |
202 | BUG(); |
203 | } | |
d7b4a756 | 204 | EXPORT_SYMBOL(enable_dma); |
1da177e4 LT |
205 | |
206 | /* Disable DMA channel | |
207 | */ | |
1df81302 | 208 | void disable_dma (unsigned int chan) |
1da177e4 | 209 | { |
3afb6e9c | 210 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
211 | |
212 | if (!dma->lock) | |
213 | goto free_dma; | |
214 | ||
215 | if (dma->active == 1) { | |
216 | dma->active = 0; | |
1df81302 | 217 | dma->d_ops->disable(chan, dma); |
1da177e4 LT |
218 | } |
219 | return; | |
220 | ||
221 | free_dma: | |
4ed89f22 | 222 | pr_err("dma%d: trying to disable free DMA\n", chan); |
1da177e4 LT |
223 | BUG(); |
224 | } | |
d7b4a756 | 225 | EXPORT_SYMBOL(disable_dma); |
1da177e4 LT |
226 | |
227 | /* | |
228 | * Is the specified DMA channel active? | |
229 | */ | |
1df81302 | 230 | int dma_channel_active(unsigned int chan) |
1da177e4 | 231 | { |
3afb6e9c RK |
232 | dma_t *dma = dma_channel(chan); |
233 | return dma->active; | |
1da177e4 | 234 | } |
ec14d796 | 235 | EXPORT_SYMBOL(dma_channel_active); |
1da177e4 | 236 | |
1df81302 | 237 | void set_dma_page(unsigned int chan, char pagenr) |
1da177e4 | 238 | { |
4ed89f22 | 239 | pr_err("dma%d: trying to set_dma_page\n", chan); |
1da177e4 | 240 | } |
d7b4a756 | 241 | EXPORT_SYMBOL(set_dma_page); |
1da177e4 | 242 | |
1df81302 | 243 | void set_dma_speed(unsigned int chan, int cycle_ns) |
1da177e4 | 244 | { |
3afb6e9c | 245 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
246 | int ret = 0; |
247 | ||
248 | if (dma->d_ops->setspeed) | |
1df81302 | 249 | ret = dma->d_ops->setspeed(chan, dma, cycle_ns); |
1da177e4 LT |
250 | dma->speed = ret; |
251 | } | |
d7b4a756 | 252 | EXPORT_SYMBOL(set_dma_speed); |
1da177e4 | 253 | |
1df81302 | 254 | int get_dma_residue(unsigned int chan) |
1da177e4 | 255 | { |
3afb6e9c | 256 | dma_t *dma = dma_channel(chan); |
1da177e4 LT |
257 | int ret = 0; |
258 | ||
259 | if (dma->d_ops->residue) | |
1df81302 | 260 | ret = dma->d_ops->residue(chan, dma); |
1da177e4 LT |
261 | |
262 | return ret; | |
263 | } | |
d7b4a756 | 264 | EXPORT_SYMBOL(get_dma_residue); |
e193ba29 RK |
265 | |
266 | #ifdef CONFIG_PROC_FS | |
267 | static int proc_dma_show(struct seq_file *m, void *v) | |
268 | { | |
269 | int i; | |
270 | ||
271 | for (i = 0 ; i < MAX_DMA_CHANNELS ; i++) { | |
272 | dma_t *dma = dma_channel(i); | |
273 | if (dma && dma->lock) | |
274 | seq_printf(m, "%2d: %s\n", i, dma->device_id); | |
275 | } | |
276 | return 0; | |
277 | } | |
278 | ||
279 | static int proc_dma_open(struct inode *inode, struct file *file) | |
280 | { | |
281 | return single_open(file, proc_dma_show, NULL); | |
282 | } | |
283 | ||
284 | static const struct file_operations proc_dma_operations = { | |
285 | .open = proc_dma_open, | |
286 | .read = seq_read, | |
287 | .llseek = seq_lseek, | |
288 | .release = single_release, | |
289 | }; | |
290 | ||
291 | static int __init proc_dma_init(void) | |
292 | { | |
293 | proc_create("dma", 0, NULL, &proc_dma_operations); | |
294 | return 0; | |
295 | } | |
296 | ||
297 | __initcall(proc_dma_init); | |
298 | #endif |