[linux-block.git] / arch / arm / kernel / asm-offsets.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 1995-2003 Russell King
 *               2001-2002 Keith Owens
 *     
 * Generate definitions needed by assembly language modules.
 * This code generates raw asm output which is post-processed to extract
 * and format the required data.
 */
#include <linux/compiler.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#ifdef CONFIG_KVM_ARM_HOST
#include <linux/kvm_host.h>
#endif
#include <asm/cacheflush.h>
#include <asm/glue-df.h>
#include <asm/glue-pf.h>
#include <asm/mach/arch.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/mpu.h>
#include <asm/procinfo.h>
#include <asm/suspend.h>
#include <asm/vdso_datapage.h>
#include <asm/hardware/cache-l2x0.h>
#include <linux/kbuild.h>
#include "signal.h"

/*
 * Make sure that the compiler and target are compatible.
 */
#if defined(__APCS_26__)
#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
#endif
/*
 * GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
 *	      miscompiles find_get_entry(), and can result in EXT3 and EXT4
 *	      filesystem corruption (possibly other FS too).
 */
#if defined(GCC_VERSION) && GCC_VERSION >= 40800 && GCC_VERSION < 40803
#error Your compiler is too buggy; it is known to miscompile kernels
#error and result in filesystem corruption and oopses.
#endif

int main(void)
{
  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
#ifdef CONFIG_STACKPROTECTOR
  DEFINE(TSK_STACK_CANARY,	offsetof(struct task_struct, stack_canary));
#endif
  BLANK();
  DEFINE(TI_FLAGS,		offsetof(struct thread_info, flags));
  DEFINE(TI_PREEMPT,		offsetof(struct thread_info, preempt_count));
  DEFINE(TI_ADDR_LIMIT,		offsetof(struct thread_info, addr_limit));
  DEFINE(TI_TASK,		offsetof(struct thread_info, task));
  DEFINE(TI_CPU,		offsetof(struct thread_info, cpu));
  DEFINE(TI_CPU_DOMAIN,		offsetof(struct thread_info, cpu_domain));
  DEFINE(TI_CPU_SAVE,		offsetof(struct thread_info, cpu_context));
  DEFINE(TI_USED_CP,		offsetof(struct thread_info, used_cp));
  DEFINE(TI_TP_VALUE,		offsetof(struct thread_info, tp_value));
  DEFINE(TI_FPSTATE,		offsetof(struct thread_info, fpstate));
#ifdef CONFIG_VFP
  DEFINE(TI_VFPSTATE,		offsetof(struct thread_info, vfpstate));
#ifdef CONFIG_SMP
  DEFINE(VFP_CPU,		offsetof(union vfp_state, hard.cpu));
#endif
#endif
#ifdef CONFIG_ARM_THUMBEE
  DEFINE(TI_THUMBEE_STATE,	offsetof(struct thread_info, thumbee_state));
#endif
#ifdef CONFIG_IWMMXT
  DEFINE(TI_IWMMXT_STATE,	offsetof(struct thread_info, fpstate.iwmmxt));
#endif
#ifdef CONFIG_CRUNCH
  DEFINE(TI_CRUNCH_STATE,	offsetof(struct thread_info, crunchstate));
#endif
#ifdef CONFIG_STACKPROTECTOR_PER_TASK
  DEFINE(TI_STACK_CANARY,	offsetof(struct thread_info, stack_canary));
#endif
  DEFINE(THREAD_SZ_ORDER,	THREAD_SIZE_ORDER);
  BLANK();
  DEFINE(S_R0,			offsetof(struct pt_regs, ARM_r0));
  DEFINE(S_R1,			offsetof(struct pt_regs, ARM_r1));
  DEFINE(S_R2,			offsetof(struct pt_regs, ARM_r2));
  DEFINE(S_R3,			offsetof(struct pt_regs, ARM_r3));
  DEFINE(S_R4,			offsetof(struct pt_regs, ARM_r4));
  DEFINE(S_R5,			offsetof(struct pt_regs, ARM_r5));
  DEFINE(S_R6,			offsetof(struct pt_regs, ARM_r6));
  DEFINE(S_R7,			offsetof(struct pt_regs, ARM_r7));
  DEFINE(S_R8,			offsetof(struct pt_regs, ARM_r8));
  DEFINE(S_R9,			offsetof(struct pt_regs, ARM_r9));
  DEFINE(S_R10,			offsetof(struct pt_regs, ARM_r10));
  DEFINE(S_FP,			offsetof(struct pt_regs, ARM_fp));
  DEFINE(S_IP,			offsetof(struct pt_regs, ARM_ip));
  DEFINE(S_SP,			offsetof(struct pt_regs, ARM_sp));
  DEFINE(S_LR,			offsetof(struct pt_regs, ARM_lr));
  DEFINE(S_PC,			offsetof(struct pt_regs, ARM_pc));
  DEFINE(S_PSR,			offsetof(struct pt_regs, ARM_cpsr));
  DEFINE(S_OLD_R0,		offsetof(struct pt_regs, ARM_ORIG_r0));
  DEFINE(PT_REGS_SIZE,		sizeof(struct pt_regs));
  DEFINE(SVC_DACR,		offsetof(struct svc_pt_regs, dacr));
  DEFINE(SVC_ADDR_LIMIT,	offsetof(struct svc_pt_regs, addr_limit));
  DEFINE(SVC_REGS_SIZE,		sizeof(struct svc_pt_regs));
  BLANK();
  DEFINE(SIGFRAME_RC3_OFFSET,	offsetof(struct sigframe, retcode[3]));
  DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
  BLANK();
#ifdef CONFIG_CACHE_L2X0
  DEFINE(L2X0_R_PHY_BASE,	offsetof(struct l2x0_regs, phy_base));
  DEFINE(L2X0_R_AUX_CTRL,	offsetof(struct l2x0_regs, aux_ctrl));
  DEFINE(L2X0_R_TAG_LATENCY,	offsetof(struct l2x0_regs, tag_latency));
  DEFINE(L2X0_R_DATA_LATENCY,	offsetof(struct l2x0_regs, data_latency));
  DEFINE(L2X0_R_FILTER_START,	offsetof(struct l2x0_regs, filter_start));
  DEFINE(L2X0_R_FILTER_END,	offsetof(struct l2x0_regs, filter_end));
  DEFINE(L2X0_R_PREFETCH_CTRL,	offsetof(struct l2x0_regs, prefetch_ctrl));
  DEFINE(L2X0_R_PWR_CTRL,	offsetof(struct l2x0_regs, pwr_ctrl));
  BLANK();
#endif
#ifdef CONFIG_CPU_HAS_ASID
  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id.counter));
  BLANK();
#endif
  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
  BLANK();
  DEFINE(VM_EXEC,	       	VM_EXEC);
  BLANK();
  DEFINE(PAGE_SZ,	       	PAGE_SIZE);
  BLANK();
  DEFINE(SYS_ERROR0,		0x9f0000);
  BLANK();
  DEFINE(SIZEOF_MACHINE_DESC,	sizeof(struct machine_desc));
  DEFINE(MACHINFO_TYPE,		offsetof(struct machine_desc, nr));
  DEFINE(MACHINFO_NAME,		offsetof(struct machine_desc, name));
  BLANK();
  DEFINE(PROC_INFO_SZ,		sizeof(struct proc_info_list));
  DEFINE(PROCINFO_INITFUNC,	offsetof(struct proc_info_list, __cpu_flush));
  DEFINE(PROCINFO_MM_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
  DEFINE(PROCINFO_IO_MMUFLAGS,	offsetof(struct proc_info_list, __cpu_io_mmu_flags));
  BLANK();
#ifdef MULTI_DABORT
  DEFINE(PROCESSOR_DABT_FUNC,	offsetof(struct processor, _data_abort));
#endif
#ifdef MULTI_PABORT
  DEFINE(PROCESSOR_PABT_FUNC,	offsetof(struct processor, _prefetch_abort));
#endif
#ifdef MULTI_CPU
  DEFINE(CPU_SLEEP_SIZE,	offsetof(struct processor, suspend_size));
  DEFINE(CPU_DO_SUSPEND,	offsetof(struct processor, do_suspend));
  DEFINE(CPU_DO_RESUME,		offsetof(struct processor, do_resume));
#endif
#ifdef MULTI_CACHE
  DEFINE(CACHE_FLUSH_KERN_ALL,	offsetof(struct cpu_cache_fns, flush_kern_all));
#endif
#ifdef CONFIG_ARM_CPU_SUSPEND
  DEFINE(SLEEP_SAVE_SP_SZ,	sizeof(struct sleep_save_sp));
  DEFINE(SLEEP_SAVE_SP_PHYS,	offsetof(struct sleep_save_sp, save_ptr_stash_phys));
  DEFINE(SLEEP_SAVE_SP_VIRT,	offsetof(struct sleep_save_sp, save_ptr_stash));
#endif
  BLANK();
  DEFINE(DMA_BIDIRECTIONAL,	DMA_BIDIRECTIONAL);
  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
  BLANK();
  DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
  DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
  BLANK();
#ifdef CONFIG_KVM_ARM_HOST
  DEFINE(VCPU_GUEST_CTXT,	offsetof(struct kvm_vcpu, arch.ctxt));
  DEFINE(VCPU_HOST_CTXT,	offsetof(struct kvm_vcpu, arch.host_cpu_context));
  DEFINE(CPU_CTXT_VFP,		offsetof(struct kvm_cpu_context, vfp));
  DEFINE(CPU_CTXT_GP_REGS,	offsetof(struct kvm_cpu_context, gp_regs));
  DEFINE(GP_REGS_USR,		offsetof(struct kvm_regs, usr_regs));
#endif
  BLANK();
#ifdef CONFIG_VDSO
  DEFINE(VDSO_DATA_SIZE,	sizeof(union vdso_data_store));
#endif
  BLANK();
#ifdef CONFIG_ARM_MPU
  DEFINE(MPU_RNG_INFO_RNGS,	offsetof(struct mpu_rgn_info, rgns));
  DEFINE(MPU_RNG_INFO_USED,	offsetof(struct mpu_rgn_info, used));

  DEFINE(MPU_RNG_SIZE,		sizeof(struct mpu_rgn));
  DEFINE(MPU_RGN_DRBAR,	offsetof(struct mpu_rgn, drbar));
  DEFINE(MPU_RGN_DRSR,	offsetof(struct mpu_rgn, drsr));
  DEFINE(MPU_RGN_DRACR,	offsetof(struct mpu_rgn, dracr));
  DEFINE(MPU_RGN_PRBAR,	offsetof(struct mpu_rgn, prbar));
  DEFINE(MPU_RGN_PRLAR,	offsetof(struct mpu_rgn, prlar));
#endif
  return 0; 
}
Commit	Line	Data
d2912cb1	1	// SPDX-License-Identifier: GPL-2.0-only
1da177e4 LT	2	/*
	3	* Copyright (C) 1995-2003 Russell King
	4	* 2001-2002 Keith Owens
	5	*
	6	* Generate definitions needed by assembly language modules.
	7	* This code generates raw asm output which is post-processed to extract
	8	* and format the required data.
1da177e4	9	*/
7fc15054	10	#include <linux/compiler.h>
1da177e4 LT	11	#include <linux/sched.h>
1da177e4 LT	12	#include <linux/mm.h>
a9c9147e	13	#include <linux/dma-mapping.h>
f7ed45be CD	14	#ifdef CONFIG_KVM_ARM_HOST
	15	#include <linux/kvm_host.h>
	16	#endif
f6b0fa02	17	#include <asm/cacheflush.h>
753790e7 RK	18	#include <asm/glue-df.h>
753790e7 RK	19	#include <asm/glue-pf.h>
1da177e4 LT	20	#include <asm/mach/arch.h>
	21	#include <asm/thread_info.h>
	22	#include <asm/memory.h>
a0995c08	23	#include <asm/mpu.h>
ee90dabc	24	#include <asm/procinfo.h>
7604537b	25	#include <asm/suspend.h>
8512287a	26	#include <asm/vdso_datapage.h>
91c2ebb9	27	#include <asm/hardware/cache-l2x0.h>
02cbe474	28	#include <linux/kbuild.h>
5c165953	29	#include "signal.h"
1da177e4 LT	30
	31	/*
	32	* Make sure that the compiler and target are compatible.
	33	*/
	34	#if defined(__APCS_26__)
	35	#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
	36	#endif
	37	/*
7fc15054 RK	38	* GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
	39	* miscompiles find_get_entry(), and can result in EXT3 and EXT4
	40	* filesystem corruption (possibly other FS too).
1da177e4	41	*/
815f0ddb	42	#if defined(GCC_VERSION) && GCC_VERSION >= 40800 && GCC_VERSION < 40803
7fc15054 RK	43	#error Your compiler is too buggy; it is known to miscompile kernels
	44	#error and result in filesystem corruption and oopses.
	45	#endif
1da177e4	46
1da177e4 LT	47	int main(void)
	48	{
	49	DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
050e9baa	50	#ifdef CONFIG_STACKPROTECTOR
df0698be NP	51	DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
df0698be NP	52	#endif
1da177e4 LT	53	BLANK();
	54	DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
	55	DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
	56	DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
	57	DEFINE(TI_TASK, offsetof(struct thread_info, task));
1da177e4 LT	58	DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
	59	DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
	60	DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
	61	DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
	62	DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
	63	DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
9fc31ddc	64	#ifdef CONFIG_VFP
1da177e4	65	DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
f8f2a852 RK	66	#ifdef CONFIG_SMP
	67	DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
	68	#endif
9fc31ddc	69	#endif
d7f864be CM	70	#ifdef CONFIG_ARM_THUMBEE
	71	DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
	72	#endif
cdaabbd7 RK	73	#ifdef CONFIG_IWMMXT
cdaabbd7 RK	74	DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
c17fad11 LB	75	#endif
	76	#ifdef CONFIG_CRUNCH
	77	DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
cdaabbd7	78	#endif
189af465 AB	79	#ifdef CONFIG_STACKPROTECTOR_PER_TASK
	80	DEFINE(TI_STACK_CANARY, offsetof(struct thread_info, stack_canary));
	81	#endif
	82	DEFINE(THREAD_SZ_ORDER, THREAD_SIZE_ORDER);
1da177e4	83	BLANK();
925c8a1a RK	84	DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
	85	DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
	86	DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
	87	DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
	88	DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
	89	DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
	90	DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
	91	DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
	92	DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
	93	DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
	94	DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
	95	DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
	96	DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
	97	DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
	98	DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
	99	DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
	100	DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
	101	DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
5745eef6	102	DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
e6a9dc61	103	DEFINE(SVC_DACR, offsetof(struct svc_pt_regs, dacr));
e6978e4b	104	DEFINE(SVC_ADDR_LIMIT, offsetof(struct svc_pt_regs, addr_limit));
e6a9dc61	105	DEFINE(SVC_REGS_SIZE, sizeof(struct svc_pt_regs));
5c165953 NP	106	BLANK();
	107	DEFINE(SIGFRAME_RC3_OFFSET, offsetof(struct sigframe, retcode[3]));
	108	DEFINE(RT_SIGFRAME_RC3_OFFSET, offsetof(struct rt_sigframe, sig.retcode[3]));
925c8a1a	109	BLANK();
91c2ebb9 BS	110	#ifdef CONFIG_CACHE_L2X0
	111	DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
	112	DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
	113	DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
	114	DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
	115	DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
	116	DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
	117	DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
	118	DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
	119	BLANK();
	120	#endif
516793c6	121	#ifdef CONFIG_CPU_HAS_ASID
8a4e3a9e	122	DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
1da177e4 LT	123	BLANK();
	124	#endif
	125	DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
	126	DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
	127	BLANK();
	128	DEFINE(VM_EXEC, VM_EXEC);
	129	BLANK();
	130	DEFINE(PAGE_SZ, PAGE_SIZE);
1da177e4 LT	131	BLANK();
	132	DEFINE(SYS_ERROR0, 0x9f0000);
	133	BLANK();
	134	DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
2eb9d315 UZ	135	DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
2eb9d315 UZ	136	DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
2ceec0c8 UZ	137	BLANK();
2ceec0c8 UZ	138	DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
2eb9d315	139	DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
8799ee9f RK	140	DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
8799ee9f RK	141	DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
48d7927b PB	142	BLANK();
	143	#ifdef MULTI_DABORT
	144	DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
	145	#endif
	146	#ifdef MULTI_PABORT
	147	DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
f6b0fa02 RK	148	#endif
	149	#ifdef MULTI_CPU
	150	DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
	151	DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
	152	DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
	153	#endif
	154	#ifdef MULTI_CACHE
	155	DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
7604537b LP	156	#endif
	157	#ifdef CONFIG_ARM_CPU_SUSPEND
	158	DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
	159	DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
	160	DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
48d7927b	161	#endif
a9c9147e RK	162	BLANK();
	163	DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
	164	DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
	165	DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
7fe31d28	166	BLANK();
1ae98561	167	DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
7fe31d28 DM	168	DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
7fe31d28 DM	169	BLANK();
f7ed45be	170	#ifdef CONFIG_KVM_ARM_HOST
0ca5565d MZ	171	DEFINE(VCPU_GUEST_CTXT, offsetof(struct kvm_vcpu, arch.ctxt));
	172	DEFINE(VCPU_HOST_CTXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
	173	DEFINE(CPU_CTXT_VFP, offsetof(struct kvm_cpu_context, vfp));
c2a8dab5 MZ	174	DEFINE(CPU_CTXT_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
c2a8dab5 MZ	175	DEFINE(GP_REGS_USR, offsetof(struct kvm_regs, usr_regs));
8512287a NL	176	#endif
	177	BLANK();
	178	#ifdef CONFIG_VDSO
	179	DEFINE(VDSO_DATA_SIZE, sizeof(union vdso_data_store));
a0995c08 VM	180	#endif
	181	BLANK();
	182	#ifdef CONFIG_ARM_MPU
	183	DEFINE(MPU_RNG_INFO_RNGS, offsetof(struct mpu_rgn_info, rgns));
	184	DEFINE(MPU_RNG_INFO_USED, offsetof(struct mpu_rgn_info, used));
	185
	186	DEFINE(MPU_RNG_SIZE, sizeof(struct mpu_rgn));
9cfb541a VM	187	DEFINE(MPU_RGN_DRBAR, offsetof(struct mpu_rgn, drbar));
	188	DEFINE(MPU_RGN_DRSR, offsetof(struct mpu_rgn, drsr));
	189	DEFINE(MPU_RGN_DRACR, offsetof(struct mpu_rgn, dracr));
046835b4 VM	190	DEFINE(MPU_RGN_PRBAR, offsetof(struct mpu_rgn, prbar));
046835b4 VM	191	DEFINE(MPU_RGN_PRLAR, offsetof(struct mpu_rgn, prlar));
f7ed45be	192	#endif
1da177e4 LT	193	return 0;
1da177e4 LT	194	}