[linux-2.6-block.git] / arch / arm / include / debug / icedcc.S

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 *  arch/arm/include/debug/icedcc.S
 *
 *  Copyright (C) 1994-1999 Russell King
 */

		@@ debug using ARM EmbeddedICE DCC channel

		.macro	addruart, rp, rv, tmp
		.endm

#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)

		.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c0, c5, 0
		.endm

		.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c0, c1, 0
		tst	\rx, #0x20000000
		beq	1001b
		.endm

		.macro	waituart, rd, rx
		mov	\rd, #0x2000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c0, c1, 0
		tst	\rx, #0x20000000
		bne	1001b
1002:
		.endm

#elif defined(CONFIG_CPU_XSCALE)

		.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c8, c0, 0
		.endm

		.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c14, c0, 0
		tst	\rx, #0x10000000
		beq	1001b
		.endm

		.macro	waituart, rd, rx
		mov	\rd, #0x10000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c14, c0, 0
		tst	\rx, #0x10000000
		bne	1001b
1002:
		.endm

#else

		.macro	senduart, rd, rx
		mcr	p14, 0, \rd, c1, c0, 0
		.endm

		.macro	busyuart, rd, rx
1001:
		mrc	p14, 0, \rx, c0, c0, 0
		tst	\rx, #2
		beq	1001b

		.endm

		.macro	waituart, rd, rx
		mov	\rd, #0x2000000
1001:
		subs	\rd, \rd, #1
		bmi	1002f
		mrc	p14, 0, \rx, c0, c0, 0
		tst	\rx, #2
		bne	1001b
1002:
		.endm

#endif	/* CONFIG_CPU_V6 */
Commit	Line	Data
d2912cb1	1	/* SPDX-License-Identifier: GPL-2.0-only */
91a9fec0 RH	2	/*
	3	* arch/arm/include/debug/icedcc.S
	4	*
	5	* Copyright (C) 1994-1999 Russell King
91a9fec0 RH	6	*/
	7
	8	@@ debug using ARM EmbeddedICE DCC channel
	9
	10	.macro addruart, rp, rv, tmp
	11	.endm
	12
	13	#if defined(CONFIG_CPU_V6) \|\| defined(CONFIG_CPU_V6K) \|\| defined(CONFIG_CPU_V7)
	14
	15	.macro senduart, rd, rx
	16	mcr p14, 0, \rd, c0, c5, 0
	17	.endm
	18
	19	.macro busyuart, rd, rx
	20	1001:
	21	mrc p14, 0, \rx, c0, c1, 0
	22	tst \rx, #0x20000000
	23	beq 1001b
	24	.endm
	25
	26	.macro waituart, rd, rx
	27	mov \rd, #0x2000000
	28	1001:
	29	subs \rd, \rd, #1
	30	bmi 1002f
	31	mrc p14, 0, \rx, c0, c1, 0
	32	tst \rx, #0x20000000
	33	bne 1001b
	34	1002:
	35	.endm
	36
	37	#elif defined(CONFIG_CPU_XSCALE)
	38
	39	.macro senduart, rd, rx
	40	mcr p14, 0, \rd, c8, c0, 0
	41	.endm
	42
	43	.macro busyuart, rd, rx
	44	1001:
	45	mrc p14, 0, \rx, c14, c0, 0
	46	tst \rx, #0x10000000
	47	beq 1001b
	48	.endm
	49
	50	.macro waituart, rd, rx
	51	mov \rd, #0x10000000
	52	1001:
	53	subs \rd, \rd, #1
	54	bmi 1002f
	55	mrc p14, 0, \rx, c14, c0, 0
	56	tst \rx, #0x10000000
	57	bne 1001b
	58	1002:
	59	.endm
	60
	61	#else
	62
	63	.macro senduart, rd, rx
	64	mcr p14, 0, \rd, c1, c0, 0
	65	.endm
	66
	67	.macro busyuart, rd, rx
	68	1001:
	69	mrc p14, 0, \rx, c0, c0, 0
70	tst \rx, #2
71	beq 1001b
72
73	.endm
74
75	.macro waituart, rd, rx
76	mov \rd, #0x2000000
77	1001:
78	subs \rd, \rd, #1
79	bmi 1002f
80	mrc p14, 0, \rx, c0, c0, 0
81	tst \rx, #2
82	bne 1001b
83	1002:
84	.endm
85
86	#endif /* CONFIG_CPU_V6 */